mirror of
https://gitlab.com/freepascal.org/fpc/source.git
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260 lines
7.6 KiB
ObjectPascal
260 lines
7.6 KiB
ObjectPascal
{
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Copyright (c) 2024 by J. Gareth "Kit" Moreton
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This unit implements the ARM and AArch64-specific assembly node
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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unit narmbas;
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{$i fpcdefs.inc}
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interface
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uses
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nbas, ncgbas, aasmtai;
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type
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TArmGenAsmNode = class(TCGAsmNode)
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{$ifdef DEBUG_NODE_XML}
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procedure XMLPrintNodeData(var T: Text); override;
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protected
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function XMLFormatOp(const Oper: POper): string; override;
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procedure XMLProcessInstruction(var T: Text; p: tai); override;
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{$endif DEBUG_NODE_XML}
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end;
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implementation
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{$ifdef DEBUG_NODE_XML}
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uses
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cutils,
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cgutils,
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cgbase,
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cpubase,
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itcpugas,
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aasmcpu,
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{$ifdef arm}
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agarmgas, { Needed for gas_shiftmode2str }
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{$endif arm}
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{$ifdef aarch64}
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agcpugas, { Needed for gas_shiftmode2str }
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{$endif aarch64}
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verbose;
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{$endif DEBUG_NODE_XML}
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{$ifdef DEBUG_NODE_XML}
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function TArmGenAsmNode.XMLFormatOp(const Oper: POper): string;
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{$ifdef arm}
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var
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NotFirst: Boolean;
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ThisSupReg: TSuperRegister;
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{$endif arm}
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begin
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case Oper^.typ of
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top_const:
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begin
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case Oper^.val of
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-15..15:
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Result := '#' + tostr(Oper^.val);
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$10..$FF:
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Result := '#0x' + hexstr(Oper^.val, 2);
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$100..$FFFF:
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Result := '#0x' + hexstr(Oper^.val, 4);
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{$ifdef CPU32}
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else
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Result := '#0x' + hexstr(Oper^.val, 8);
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{$else CPU32}
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$10000..$FFFFFFFF:
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Result := '#0x' + hexstr(Oper^.val, 8);
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else
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Result := '#0x' + hexstr(Oper^.val, 16);
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{$endif CPU32}
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end;
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end;
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top_ref:
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with Oper^.ref^ do
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begin
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if Assigned(symbol) then
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begin
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Result := symbol.Name;
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if (offset <> 0) then
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begin
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if (offset < 0) then
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Result := Result + ' - ' + tostr(-offset)
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else
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Result := Result + ' + ' + tostr(offset);
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end;
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end
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else
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begin
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if (base <> NR_NO) then
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begin
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Result := '[' + gas_regname(base);
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if addressmode = AM_POSTINDEXED then
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Result := Result + '], '
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else if (offset <> 0) or (shiftmode <> SM_None) then
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Result := Result + ', ';
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end
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else { Usually a special kind of reference used by ldm/stm instructions }
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Result := '';
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if index <> NR_NO then
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Result := Result + gas_regname(index)
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else if (offset <> 0) or (shiftmode <> SM_None) or (addressmode = AM_POSTINDEXED) then
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Result := Result + '#' + tostr(offset);
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{$ifdef arm}
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if shiftmode = SM_RRX then
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Result := Result + ', rrx' { Implicit value of 1 }
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else
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{$endif arm}
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if shiftmode <> SM_None then
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Result := Result + ', ' + gas_shiftmode2str[shiftmode] + ' #' + tostr(shiftimm);
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if addressmode <> AM_POSTINDEXED then
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begin
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if (base <> NR_NO) then
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Result := Result + ']';
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if addressmode = AM_PREINDEXED then
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Result := Result + '!';
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end;
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end;
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end;
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{$ifdef arm}
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top_regset:
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begin
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Result := '{';
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NotFirst := False;
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for ThisSupReg in Oper^.regset^ do
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begin
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if NotFirst then
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Result := Result + ', ';
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Result := Result + gas_regname(newreg(Oper^.regtyp, ThisSupReg, Oper^.subreg));
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NotFirst := True;
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end;
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Result := Result + '}';
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end;
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top_specialreg:
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with Oper^ do
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begin
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Result := gas_regname(specialreg) + '_';
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if (srC in specialflags) then
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Result := Result + 'c';
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if (srX in specialflags) then
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Result := Result + 'x';
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if (srF in specialflags) then
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Result := Result + 'f';
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if (srS in specialflags) then
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Result := Result + 's';
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end;
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{$endif arm}
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{$ifdef aarch64}
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top_indexedreg:
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with Oper^ do
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Result := gas_regname(indexedreg)+'['+tostr(regindex)+']';
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{$endif aarch64}
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top_conditioncode:
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Result := cond2str[Oper^.cc];
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top_realconst:
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Result := '#' + realtostr(Oper^.val_real);
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top_shifterop:
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with Oper^.shifterop^ do
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begin
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{$ifdef arm}
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if shiftmode = SM_RRX then
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begin
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Result := 'rrx'; { Implicit value of 1 }
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Exit;
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end;
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Result := gas_shiftmode2str[shiftmode] + ' ';
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if rs <> NR_NO then
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Result := Result + gas_regname(rs)
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else
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Result := Result + '#' + tostr(shiftimm);
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{$endif arm}
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{$ifdef aarch64}
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Result := gas_shiftmode2str[shiftmode] + ' #' + tostr(shiftimm);
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{$endif aarch64}
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end;
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else
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Result := inherited XMLFormatOp(Oper);
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end;
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end;
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procedure TArmGenAsmNode.XMLProcessInstruction(var T: Text; p: tai);
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var
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ThisOp, ThisOper: string;
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X: Integer;
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begin
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if p.typ = ait_instruction then
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begin
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ThisOp := gas_op2str[taicpu(p).opcode] + cond2str[taicpu(p).condition] + oppostfix2str[taicpu(p).oppostfix];
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{ Pad the opcode with spaces so the succeeding operands are aligned }
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XMLPadString(ThisOp, 7);
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Write(T, PrintNodeIndention, ' ', ThisOp); { Extra indentation to account for label formatting }
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for X := 0 to taicpu(p).ops - 1 do
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begin
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Write(T, ' ');
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ThisOper := XMLFormatOp(taicpu(p).oper[X]);
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if X < taicpu(p).ops - 1 then
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begin
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ThisOper := ThisOper + ',';
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XMLPadString(ThisOper, 4);
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end;
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Write(T, ThisOper);
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end;
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WriteLn(T);
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end
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else
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inherited XMLProcessInstruction(T, p);
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end;
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procedure TArmGenAsmNode.XMLPrintNodeData(var T: Text);
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var
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hp: tai;
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begin
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if not Assigned(p_asm) then
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Exit;
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hp := tai(p_asm.First);
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while Assigned(hp) do
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begin
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XMLProcessInstruction(T, hp);
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hp := tai(hp.Next);
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end;
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end;
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{$endif DEBUG_NODE_XML}
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initialization
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casmnode := TArmGenAsmNode;
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end.
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