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629 lines
24 KiB
ObjectPascal
629 lines
24 KiB
ObjectPascal
{
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Copyright (c) 1998-2014 by the Free Pascal development team
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This unit calls the optimization procedures to optimize the assembler
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code for m68k
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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unit aoptcpu;
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{$i fpcdefs.inc}
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{$ifdef EXTDEBUG}
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{$define DEBUG_AOPTCPU}
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{$endif EXTDEBUG}
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Interface
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uses
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cpubase, aoptobj, aoptcpub, aopt, aasmtai,
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cgbase;
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Type
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TCpuAsmOptimizer = class(TAsmOptimizer)
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function RegLoadedWithNewValue(reg: tregister; hp: tai): boolean; override;
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function PeepHoleOptPass1Cpu(var p: tai): boolean; override;
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function TryToFoldDoubleAND(var p: tai): boolean;
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function TryToRemoveTST(var p: tai): boolean;
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function TryToOptimizeMove(var p: tai): boolean;
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function MaybeRealConstOperSimplify(var p: tai): boolean;
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function OptPass1LEA(var p: tai): Boolean;
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function OptPass1MOVEM(var p: tai): Boolean;
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function OptPass1Bitwise(var p: tai): Boolean;
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{ outputs a debug message into the assembler file }
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procedure DebugMsg(const s: string; p: tai);
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End;
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Implementation
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uses
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cutils, aasmcpu, cgutils, globtype, globals, verbose, cpuinfo, itcpugas, procinfo, cpupi,
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aoptutils;
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{ Range check must be disabled explicitly as conversions between signed and unsigned
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32-bit values are done without explicit typecasts }
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{$R-}
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function opname(var p: tai): string;
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begin
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result:=upcase(gas_op2str[taicpu(p).opcode]);
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end;
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function RefsEqual(const r1, r2: treference): boolean;
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begin
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RefsEqual :=
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(r1.offset = r2.offset) and
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(r1.base = r2.base) and
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(r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
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(r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
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(r1.relsymbol = r2.relsymbol) and
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(r1.volatility=[]) and
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(r2.volatility=[]);
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end;
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function MatchOperand(const oper1: TOper; const oper2: TOper): boolean;
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begin
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result := oper1.typ = oper2.typ;
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if result then
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case oper1.typ of
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top_const:
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Result:=oper1.val = oper2.val;
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top_reg:
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Result:=oper1.reg = oper2.reg;
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top_ref:
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Result:=RefsEqual(oper1.ref^, oper2.ref^);
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else
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internalerror(2016112401);
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end
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end;
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function MatchInstruction(const instr: tai; const op: TAsmOp; const opsize: topsizes): boolean;
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begin
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result :=
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(instr.typ = ait_instruction) and
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(taicpu(instr).opcode = op) and
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((opsize = []) or (taicpu(instr).opsize in opsize));
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end;
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function MatchInstruction(const instr : tai;const ops : array of TAsmOp;
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const opsize : topsizes) : boolean;
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var
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op : TAsmOp;
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begin
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result:=false;
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for op in ops do
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begin
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if (instr.typ = ait_instruction) and
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(taicpu(instr).opcode = op) and
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((opsize = []) or (taicpu(instr).opsize in opsize)) then
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begin
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result:=true;
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exit;
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end;
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end;
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end;
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function TCpuAsmOptimizer.MaybeRealConstOperSimplify(var p: tai): boolean;
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var
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tmpint64: int64;
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tmpsingle: single;
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begin
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result:=false;
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if (taicpu(p).oper[0]^.typ = top_realconst) then
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begin
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{ if we work with actual integers, turn the operand into one }
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if frac(taicpu(p).oper[0]^.val_real) = 0 then
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begin
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tmpint64:=trunc(taicpu(p).oper[0]^.val_real);
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if (high(shortint) >= tmpint64) and (low(shortint) <= tmpint64) then
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begin
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taicpu(p).opsize := S_B;
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taicpu(p).oper[0]^.typ:=top_const;
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end
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else
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if (high(smallint) >= tmpint64) and (low(smallint) <= tmpint64) then
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begin
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taicpu(p).opsize := S_W;
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taicpu(p).oper[0]^.typ:=top_const;
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end
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else
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if (high(longint) >= tmpint64) and (low(longint) <= tmpint64) then
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begin
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taicpu(p).opsize := S_L;
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taicpu(p).oper[0]^.typ:=top_const;
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end;
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if (taicpu(p).oper[0]^.typ) = top_const then
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begin
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DebugMsg('Optimizer: FPU real const to integer',p);
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taicpu(p).oper[0]^.val:=tmpint64;
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result:=true;
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end;
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end
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else
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begin
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tmpsingle:=taicpu(p).oper[0]^.val_real;
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if (taicpu(p).opsize = S_FD) and
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((taicpu(p).oper[0]^.val_real - tmpsingle) = 0.0) then
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begin
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DebugMsg('Optimizer: FPU real const to lesser precision',p);
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taicpu(p).opsize:=S_FS;
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result:=true;
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end;
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end;
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end;
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end;
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function TCpuAsmOptimizer.RegLoadedWithNewValue(reg: tregister; hp: tai): boolean;
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var
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p: taicpu;
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begin
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if not assigned(hp) or
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(hp.typ <> ait_instruction) then
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begin
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Result := false;
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exit;
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end;
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p := taicpu(hp);
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Result :=
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(((p.opcode=A_MOVE) or (p.opcode=A_MOVEA) or (p.opcode=A_MVS) or
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(p.opcode=A_MVZ) or (p.opcode=A_MOVEQ) or (p.opcode=A_LEA)) and
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(p.oper[1]^.typ = top_reg) and
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(SuperRegistersEqual(p.oper[1]^.reg,reg)) and
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((p.oper[0]^.typ = top_const) or
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((p.oper[0]^.typ = top_reg) and
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not(SuperRegistersEqual(p.oper[0]^.reg,reg))) or
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((p.oper[0]^.typ = top_ref) and
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not RegInRef(reg,p.oper[0]^.ref^)))) or
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((p.opcode = A_FMOVE) and
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(p.oper[1]^.typ = top_reg) and
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(SuperRegistersEqual(p.oper[1]^.reg,reg)) and
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((p.oper[0]^.typ = top_realconst) or
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((p.oper[0]^.typ = top_reg) and
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not(SuperRegistersEqual(p.oper[0]^.reg,reg))))) or
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((p.opcode = A_MOVEM) and
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(p.oper[1]^.typ = top_regset) and
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((getsupreg(reg) in p.oper[1]^.dataregset) or
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(getsupreg(reg) in p.oper[1]^.addrregset))) or
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((p.opcode = A_FMOVEM) and
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(p.oper[1]^.typ = top_regset) and
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(getsupreg(reg) in p.oper[1]^.fpuregset));
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end;
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{$ifdef DEBUG_AOPTCPU}
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procedure TCpuAsmOptimizer.DebugMsg(const s: string; p : tai);
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begin
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asml.insertbefore(tai_comment.Create(strpnew(s)), p);
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end;
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{$else DEBUG_AOPTCPU}
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procedure TCpuAsmOptimizer.DebugMsg(const s: string; p : tai);inline;
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begin
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end;
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{$endif DEBUG_AOPTCPU}
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function TCpuAsmOptimizer.TryToFoldDoubleAND(var p: tai): boolean;
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var
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next, next2: tai;
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opstr: string[15];
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begin
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result:=false;
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if ((taicpu(p).oper[0]^.typ=top_const) and (taicpu(p).oper[1]^.typ=top_reg)) and
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GetNextInstruction(p,next) and
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MatchInstruction(next,A_AND,[taicpu(p).opsize]) and
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(taicpu(next).oper[0]^.typ=top_const) and
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MatchOperand(taicpu(p).oper[1]^,taicpu(next).oper[1]^) then
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begin
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DebugMsg('Optimizer: folding double AND',p);
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taicpu(p).oper[0]^.val:=taicpu(p).oper[0]^.val and taicpu(next).oper[0]^.val;
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RemoveInstruction(next);
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result:=true;
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end;
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end;
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function TCpuAsmOptimizer.TryToRemoveTST(var p: tai): boolean;
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var
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next, next2: tai;
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opstr: string[15];
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begin
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result:=false;
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if not((taicpu(p).oper[1]^.typ=top_reg) and isaddressregister(taicpu(p).oper[1]^.reg)) and
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GetNextInstruction(p,next) and
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MatchInstruction(next,A_TST,[taicpu(p).opsize]) and
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MatchOperand(taicpu(p).oper[1]^,taicpu(next).oper[0]^) and
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GetNextInstruction(next,next2) and
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MatchInstruction(next2,[A_BXX,A_SXX],[S_NO,S_B]) and
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(taicpu(next2).condition in [C_NE,C_EQ,C_PL,C_MI]) then
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begin
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opstr:=opname(p);
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DebugMsg('Optimizer: '+opstr+', TST, Jxx/Sxx to '+opstr+', Jxx/Sxx',p);
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RemoveInstruction(next);
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result:=true;
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end;
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end;
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function TCpuAsmOptimizer.TryToOptimizeMove(var p: tai): boolean;
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var
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next, next2: tai;
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opstr: string[15];
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begin
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result:=false;
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if (taicpu(p).opcode=A_MOVE) then
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begin
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result:=TryToRemoveTST(p);
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if result then
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exit;
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end;
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if GetNextInstruction(p,next) and
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(next.typ = ait_instruction) and
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(taicpu(next).opcode = taicpu(p).opcode) and
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(taicpu(p).opsize = taicpu(next).opsize) and
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(taicpu(p).oper[1]^.typ = top_reg) and
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MatchOperand(taicpu(p).oper[1]^,taicpu(next).oper[0]^) then
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begin
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if not(RegInOp(taicpu(p).oper[1]^.reg,taicpu(next).oper[1]^)) and
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RegEndOfLife(taicpu(next).oper[0]^.reg, taicpu(next)) then
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begin
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opstr:=opname(p);
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case taicpu(p).oper[0]^.typ of
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top_reg:
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{ do not optimize away FPU to INT to FPU reg moves. These are used for
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to-single-rounding on FPUs which have no FSMOVE/FDMOVE. (KB) }
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if not ((taicpu(p).opcode = A_FMOVE) and
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(getregtype(taicpu(p).oper[0]^.reg) <> getregtype(taicpu(p).oper[1]^.reg))) then
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begin
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{ move %reg0, %tmpreg; move %tmpreg, <ea> -> move %reg0, <ea> }
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taicpu(p).loadOper(1,taicpu(next).oper[1]^);
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UpdateUsedRegs(p);
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RemoveInstruction(next);
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result:=true;
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{ also remove leftover move %reg0, %reg0, which can occur as the result
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of the previous optimization, if %reg0 and %tmpreg was different types
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(addr vs. data), so these moves were left in by the cg }
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if MatchOperand(taicpu(p).oper[0]^,taicpu(p).oper[1]^) then
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begin
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DebugMsg('Optimizer: '+opstr+' + '+opstr+' removed',p);
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RemoveCurrentP(p);
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end
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else
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DebugMsg('Optimizer: '+opstr+' + '+opstr+' to '+opstr+' #1',p)
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end;
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top_const:
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begin
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// DebugMsg('Optimizer: '+opstr+' + '+opstr+' to '+opstr+' #2',p);
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end;
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top_ref:
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begin
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{ move ref, %tmpreg; move %tmpreg, <ea> -> move ref, <ea> }
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{ we only want to do this when <ea> is a reg or a simple reference }
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with taicpu(next).oper[1]^ do
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if (taicpu(next).opcode <> A_FMOVE) and
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((typ = top_reg) or
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((typ = top_ref) and
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((ref^.index = NR_NO) or
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(ref^.base = NR_NO)) and
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(ref^.symbol = nil) and
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(ref^.offset = 0))) then
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begin
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DebugMsg('Optimizer: '+opstr+' + '+opstr+' to '+opstr+' #3',p);
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taicpu(p).loadOper(1,taicpu(next).oper[1]^);
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UpdateUsedRegs(p);
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RemoveInstruction(next);
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result:=true;
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end;
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end;
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else
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;
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end;
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end;
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exit;
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end;
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if GetNextInstruction(p,next) and
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(next.typ = ait_instruction) and
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GetNextInstruction(next,next2) and
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(next2.typ = ait_instruction) and
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(taicpu(next).opcode <> taicpu(p).opcode) and
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(taicpu(next2).opcode = taicpu(p).opcode) and
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(taicpu(p).oper[0]^.typ = top_reg) and
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(taicpu(p).oper[1]^.typ = top_reg) and
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(getregtype(taicpu(p).oper[0]^.reg) = getregtype(taicpu(p).oper[1]^.reg)) and
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MatchOperand(taicpu(p).oper[1]^,taicpu(next2).oper[0]^) and
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MatchOperand(taicpu(next2).oper[1]^,taicpu(p).oper[0]^) and
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(taicpu(p).opsize = taicpu(next2).opsize) and
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((taicpu(p).opcode = A_FMOVE) or
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(taicpu(p).opsize = taicpu(next).opsize)) then
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begin
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opstr:=opname(p);
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if not(RegInOp(taicpu(p).oper[1]^.reg,taicpu(next2).oper[1]^)) and
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not(RegInOp(taicpu(p).oper[1]^.reg,taicpu(next).oper[0]^)) and
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RegEndOfLife(taicpu(p).oper[0]^.reg, taicpu(next2)) then
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begin
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{ move %reg0, %tmpreg
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op ???, %tmpreg
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move %tmpreg, %reg0
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to:
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op ???, %reg0 }
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if MatchOperand(taicpu(p).oper[1]^,taicpu(next).oper[taicpu(next).ops-1]^) then
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begin
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{
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Disabled, because it breaks some tests... :( (KB)
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DebugMsg('Optimizer: '+opstr+' + OP + '+opstr+' to OP #1',next);
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taicpu(next).loadOper(taicpu(next).ops-1,taicpu(p).oper[0]^);
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asml.remove(p);
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asml.remove(next2);
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p.free;
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next2.free;
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result:=true;
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}
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end;
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end;
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end;
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end;
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function TCpuAsmOptimizer.OptPass1LEA(var p: tai): Boolean;
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var
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next: tai;
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begin
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Result:=false;
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{ LEA (Ax),Ax is a NOP if src and dest reg is equal, so remove it. }
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if not assigned(taicpu(p).oper[0]^.ref^.symbol) and
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(((taicpu(p).oper[0]^.ref^.base = taicpu(p).oper[1]^.reg) and
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(taicpu(p).oper[0]^.ref^.index = NR_NO)) or
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((taicpu(p).oper[0]^.ref^.index = taicpu(p).oper[1]^.reg) and
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(taicpu(p).oper[0]^.ref^.base = NR_NO))) and
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(taicpu(p).oper[0]^.ref^.offset = 0) then
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begin
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DebugMsg('Optimizer: LEA 0(Ax),Ax removed',p);
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result:=RemoveCurrentP(p);
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if result then
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exit;
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end;
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if (taicpu(p).oper[1]^.reg=NR_A7) and
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(taicpu(p).oper[0]^.ref^.base=NR_A7) and
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(taicpu(p).oper[0]^.ref^.index=NR_NO) and
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(taicpu(p).oper[0]^.ref^.symbol=nil) and
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(taicpu(p).oper[0]^.ref^.direction=dir_none) and
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GetNextInstruction(p,next) and
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MatchInstruction(next,A_MOVEM,[S_L]) and
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MatchOpType(taicpu(next),top_regset,top_ref) and
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((taicpu(p).oper[0]^.ref^.offset=-(PopCnt(Byte(taicpu(next).oper[0]^.dataregset))+PopCnt(Byte(taicpu(next).oper[0]^.addrregset)))*4)) and
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(taicpu(next).oper[1]^.ref^.base=NR_A7) and
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(taicpu(next).oper[1]^.ref^.index=NR_NO) and
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(taicpu(next).oper[1]^.ref^.symbol=nil) and
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(taicpu(next).oper[1]^.ref^.direction=dir_none) and
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not (current_settings.cputype in cpu_coldfire) then
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begin
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DebugMsg('Optimizer: LEA, MOVE(M) to MOVE(M) predecremented',p);
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taicpu(next).oper[1]^.ref^.direction:=dir_dec;
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RemoveCurrentP(p,next);
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result:=true;
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exit;
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end;
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end;
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function TCpuAsmOptimizer.OptPass1MOVEM(var p: tai): Boolean;
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var
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next: tai;
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begin
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Result:=false;
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if MatchOpType(taicpu(p),top_ref,top_regset) and
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(taicpu(p).oper[0]^.ref^.base=NR_A7) and
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(taicpu(p).oper[0]^.ref^.index=NR_NO) and
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(taicpu(p).oper[0]^.ref^.symbol=nil) and
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(taicpu(p).oper[0]^.ref^.direction=dir_none) and
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GetNextInstruction(p,next) and
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MatchInstruction(next,A_LEA,[S_NO]) and
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(taicpu(next).oper[1]^.reg=NR_A7) and
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(taicpu(next).oper[0]^.ref^.base=NR_A7) and
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(taicpu(next).oper[0]^.ref^.index=NR_NO) and
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(taicpu(next).oper[0]^.ref^.symbol=nil) and
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(taicpu(next).oper[0]^.ref^.direction=dir_none) and
|
|
((taicpu(next).oper[0]^.ref^.offset=(PopCnt(Byte(taicpu(p).oper[1]^.dataregset))+PopCnt(Byte(taicpu(p).oper[1]^.addrregset)))*4)) and
|
|
not (current_settings.cputype in cpu_coldfire) then
|
|
begin
|
|
DebugMsg('Optimizer: MOVE(M), LEA to MOVE(M) postincremented',p);
|
|
taicpu(p).oper[0]^.ref^.direction:=dir_inc;
|
|
RemoveInstruction(next);
|
|
result:=true;
|
|
exit;
|
|
end;
|
|
end;
|
|
|
|
function TCpuAsmOptimizer.OptPass1Bitwise(var p: tai): Boolean;
|
|
begin
|
|
result:=false;
|
|
case p.typ of
|
|
ait_instruction:
|
|
begin
|
|
if taicpu(p).opcode = A_AND then
|
|
result:=TryToFoldDoubleAND(p);
|
|
if not result then
|
|
result:=TryToRemoveTST(p);
|
|
end;
|
|
else
|
|
;
|
|
end;
|
|
end;
|
|
|
|
function TCpuAsmOptimizer.PeepHoleOptPass1Cpu(var p: tai): boolean;
|
|
var
|
|
next: tai;
|
|
tmpref: treference;
|
|
begin
|
|
result:=false;
|
|
case p.typ of
|
|
ait_instruction:
|
|
begin
|
|
//asml.insertbefore(tai_comment.Create(strpnew('pass1 called for instr')), p);
|
|
|
|
case taicpu(p).opcode of
|
|
A_MOVE:
|
|
result:=TryToOptimizeMove(p);
|
|
A_MOVEM:
|
|
result:=OptPass1MOVEM(p);
|
|
A_LEA:
|
|
result:=OptPass1LEA(p);
|
|
{ Bitwise operations }
|
|
A_AND,A_OR,A_EOR:
|
|
result:=OptPass1Bitwise(p);
|
|
{ Address register sub/add can be replaced with ADDQ/SUBQ or LEA if the value is in the
|
|
SmallInt range, which is shorter to encode and faster to execute on most 68k }
|
|
A_SUB,A_SUBA,A_ADD,A_ADDA:
|
|
if (taicpu(p).oper[1]^.typ = top_reg) and isaddressregister(taicpu(p).oper[1]^.reg) and
|
|
(taicpu(p).oper[0]^.typ = top_const) then
|
|
begin
|
|
if isvalueforaddqsubq(taicpu(p).oper[0]^.val) then
|
|
begin
|
|
DebugMsg('Optimizer: SUB/ADD #val,Ax to SUBQ/ADDQ',p);
|
|
taicpu(p).opsize:=S_L; // this is safe, because we're targetting an address reg
|
|
if taicpu(p).opcode in [A_ADD,A_ADDA] then
|
|
taicpu(p).opcode:=A_ADDQ
|
|
else
|
|
taicpu(p).opcode:=A_SUBQ;
|
|
result:=true;
|
|
end
|
|
else
|
|
if isvalue16bit(abs(taicpu(p).oper[0]^.val)) then
|
|
begin
|
|
DebugMsg('Optimizer: SUB/ADD #val,Ax to LEA val(Ax),Ax',p);
|
|
if (taicpu(p).opcode=A_SUB) or (taicpu(p).opcode=A_SUBA) then
|
|
reference_reset_base(tmpref,taicpu(p).oper[1]^.reg,-taicpu(p).oper[0]^.val,ctempposinvalid,0,[])
|
|
else
|
|
reference_reset_base(tmpref,taicpu(p).oper[1]^.reg,taicpu(p).oper[0]^.val,ctempposinvalid,0,[]);
|
|
taicpu(p).opcode:=A_LEA;
|
|
taicpu(p).opsize:=S_NO;
|
|
taicpu(p).loadref(0,tmpref);
|
|
result:=true;
|
|
end;
|
|
end
|
|
else
|
|
result:=TryToRemoveTST(p);
|
|
A_SUBQ,A_ADDQ:
|
|
result:=TryToRemoveTST(p);
|
|
{ MOVEA #0,Ax to SUBA Ax,Ax, because it's shorter }
|
|
A_MOVEA:
|
|
if (taicpu(p).oper[0]^.typ = top_const) and
|
|
(taicpu(p).oper[0]^.val = 0) then
|
|
begin
|
|
DebugMsg('Optimizer: MOVEA #0,Ax to SUBA Ax,Ax',p);
|
|
taicpu(p).opcode:=A_SUBA;
|
|
taicpu(p).opsize:=S_L; { otherwise it will be .W -> BOOM }
|
|
taicpu(p).loadoper(0,taicpu(p).oper[1]^);
|
|
result:=true;
|
|
end;
|
|
{ CLR.L Dx on a 68000 is slower than MOVEQ #0,Dx }
|
|
A_CLR:
|
|
if (current_settings.cputype in [cpu_mc68000]) and
|
|
(taicpu(p).oper[0]^.typ = top_reg) and
|
|
(taicpu(p).opsize = S_L) and
|
|
isintregister(taicpu(p).oper[0]^.reg) then
|
|
begin
|
|
//DebugMsg('Optimizer: CLR.L Dx to MOVEQ #0,Dx',p);
|
|
taicpu(p).opcode:=A_MOVEQ;
|
|
taicpu(p).loadoper(1,taicpu(p).oper[0]^);
|
|
taicpu(p).loadconst(0,0);
|
|
taicpu(p).ops:=2;
|
|
result:=true;
|
|
end;
|
|
A_JSR:
|
|
begin
|
|
if (cs_opt_level4 in current_settings.optimizerswitches) and
|
|
GetNextInstruction(p,next) and
|
|
MatchInstruction(next,A_RTS,[S_NO]) and
|
|
{ play safe: if any parameter is pushed on the stack, we cannot to this optimization
|
|
as the bottom stack element might be a parameter and not the return address as it is expected
|
|
after a call (which we simulate by a jmp)
|
|
|
|
Actually, as in this case the stack pointer is no used as a frame pointer and
|
|
there will be more instructions to restore the stack frame before jsr, so this
|
|
is unlikedly to happen }
|
|
(current_procinfo.maxpushedparasize=0) then
|
|
begin
|
|
DebugMsg('Optimizer: JSR, RTS to JMP',p);
|
|
taicpu(p).opcode:=A_JMP;
|
|
RemoveInstruction(next);
|
|
result:=true;
|
|
end;
|
|
end;
|
|
{ CMP #0,<ea> equals to TST <ea>, just shorter and TST is more flexible anyway }
|
|
A_CMP,A_CMPI:
|
|
if ((taicpu(p).oper[0]^.typ = top_const) and
|
|
(taicpu(p).oper[0]^.val = 0)) and
|
|
((taicpu(p).oper[1]^.typ = top_ref) or
|
|
((taicpu(p).oper[1]^.typ = top_reg) and
|
|
not (isaddressregister(taicpu(p).oper[1]^.reg) and
|
|
not (CPUM68K_HAS_TSTAREG in cpu_capabilities[current_settings.cputype])))) then
|
|
begin
|
|
DebugMsg('Optimizer: CMP #0 to TST',p);
|
|
taicpu(p).opcode:=A_TST;
|
|
taicpu(p).loadoper(0,taicpu(p).oper[1]^);
|
|
taicpu(p).clearop(1);
|
|
taicpu(p).ops:=1;
|
|
result:=true;
|
|
end;
|
|
A_FCMP:
|
|
if (taicpu(p).oper[0]^.typ = top_realconst) then
|
|
begin
|
|
if (taicpu(p).oper[0]^.val_real = 0.0) then
|
|
begin
|
|
DebugMsg('Optimizer: FCMP #0.0 to FTST',p);
|
|
taicpu(p).opcode:=A_FTST;
|
|
taicpu(p).opsize:=S_FX;
|
|
taicpu(p).loadoper(0,taicpu(p).oper[1]^);
|
|
taicpu(p).clearop(1);
|
|
taicpu(p).ops:=1;
|
|
result:=true;
|
|
end
|
|
else
|
|
result:=result or MaybeRealConstOperSimplify(p);
|
|
end;
|
|
A_FMOVE,A_FSMOVE,A_FDMOVE,
|
|
A_FADD,A_FSADD,A_FDADD,A_FSUB,A_FSSUB,A_FDSUB,
|
|
A_FMUL,A_FSMUL,A_FDMUL,A_FDIV,A_FSDIV,A_FDDIV,
|
|
A_FSGLMUL,A_FSGLDIV:
|
|
begin
|
|
if (taicpu(p).opcode = A_FMOVE) and TryToOptimizeMove(p) then
|
|
begin
|
|
result:=true;
|
|
exit;
|
|
end;
|
|
result:=result or MaybeRealConstOperSimplify(p);
|
|
end;
|
|
else
|
|
;
|
|
end;
|
|
end;
|
|
else
|
|
;
|
|
end;
|
|
end;
|
|
|
|
begin
|
|
casmoptimizer:=TCpuAsmOptimizer;
|
|
end.
|