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480 lines
21 KiB
ObjectPascal
480 lines
21 KiB
ObjectPascal
{
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Copyright (c) 1998-2002 by Florian Klaempfl
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Generate for x86-64 and i386 assembler for type converting nodes
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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unit nx86cnv;
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{$i fpcdefs.inc}
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interface
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uses
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node,ncgcnv,defutil;
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type
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tx86typeconvnode = class(tcgtypeconvnode)
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private
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function int_to_real_mm_location: boolean;
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protected
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function first_real_to_real : tnode;override;
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{ procedure second_int_to_int;override; }
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{ procedure second_string_to_string;override; }
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{ procedure second_cstring_to_pchar;override; }
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{ procedure second_string_to_chararray;override; }
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{ procedure second_array_to_pointer;override; }
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{ procedure second_pointer_to_array;override; }
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{ procedure second_chararray_to_string;override; }
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{ procedure second_char_to_string;override; }
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function first_int_to_real: tnode; override;
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procedure second_int_to_real;override;
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{ procedure second_real_to_real;override; }
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{ procedure second_cord_to_pointer;override; }
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{ procedure second_proc_to_procvar;override; }
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{ procedure second_bool_to_int;override; }
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procedure second_int_to_bool;override;
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{ procedure second_set_to_set;override; }
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{ procedure second_ansistring_to_pchar;override; }
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{ procedure second_pchar_to_string;override; }
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{ procedure second_class_to_intf;override; }
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{ procedure second_char_to_char;override; }
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end;
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implementation
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uses
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verbose,globals,globtype,
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aasmbase,aasmtai,aasmdata,aasmcpu,
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symconst,symdef,
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cgbase,cga,pass_1,pass_2,
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cpuinfo,
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ncnv,
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cpubase,
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cgutils,cgobj,hlcgobj,cgx86,
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tgobj;
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function tx86typeconvnode.first_real_to_real : tnode;
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begin
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first_real_to_real:=nil;
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if use_vectorfpu(resultdef) then
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expectloc:=LOC_MMREGISTER
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else
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expectloc:=LOC_FPUREGISTER;
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end;
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procedure tx86typeconvnode.second_int_to_bool;
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var
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{$ifndef cpu64bitalu}
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hreg2,
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hregister : tregister;
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href : treference;
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i : integer;
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{$endif not cpu64bitalu}
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resflags : tresflags;
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hlabel : tasmlabel;
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newsize : tcgsize;
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begin
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secondpass(left);
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if codegenerror then
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exit;
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{ Explicit typecasts from any ordinal type to a boolean type }
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{ must not change the ordinal value }
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if (nf_explicit in flags) and
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not(left.location.loc in [LOC_FLAGS,LOC_JUMP]) then
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begin
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location_copy(location,left.location);
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newsize:=def_cgsize(resultdef);
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{ change of size? change sign only if location is LOC_(C)REGISTER? Then we have to sign/zero-extend }
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if (tcgsize2size[newsize]<>tcgsize2size[left.location.size]) or
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((newsize<>left.location.size) and (location.loc in [LOC_REGISTER,LOC_CREGISTER])) then
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hlcg.location_force_reg(current_asmdata.CurrAsmList,location,left.resultdef,resultdef,true)
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else
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location.size:=newsize;
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exit;
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end;
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{ Load left node into flag F_NE/F_E }
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resflags:=F_NE;
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if (left.location.loc in [LOC_SUBSETREG,LOC_CSUBSETREG,LOC_SUBSETREF,LOC_CSUBSETREF]) then
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hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
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case left.location.loc of
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LOC_CREFERENCE,
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LOC_REFERENCE :
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begin
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cg.a_reg_alloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
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{$ifndef cpu64bitalu}
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if left.location.size in [OS_64,OS_S64{$ifdef cpu16bitalu},OS_32,OS_S32{$endif}] then
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begin
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hregister:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
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cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,left.location.reference,hregister);
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href:=left.location.reference;
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for i:=2 to tcgsize2size[left.location.size] div tcgsize2size[OS_INT] do
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begin
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inc(href.offset,tcgsize2size[OS_INT]);
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cg.a_op_ref_reg(current_asmdata.CurrAsmList,OP_OR,OS_INT,href,hregister);
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end;
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end
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else
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{$endif not cpu64bitalu}
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begin
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hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
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cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,left.location.size,left.location.register,left.location.register);
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end;
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end;
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LOC_FLAGS :
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begin
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resflags:=left.location.resflags;
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end;
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LOC_REGISTER,LOC_CREGISTER :
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begin
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cg.a_reg_alloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
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{$if defined(cpu32bitalu)}
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if left.location.size in [OS_64,OS_S64] then
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begin
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hregister:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
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cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_32,OS_32,left.location.register64.reglo,hregister);
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cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_32,left.location.register64.reghi,hregister);
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end
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else
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{$elseif defined(cpu16bitalu)}
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if left.location.size in [OS_64,OS_S64] then
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begin
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hregister:=cg.getintregister(current_asmdata.CurrAsmList,OS_16);
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cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_16,OS_16,left.location.register64.reglo,hregister);
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cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_16,cg.GetNextReg(left.location.register64.reglo),hregister);
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cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_16,left.location.register64.reghi,hregister);
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cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_16,cg.GetNextReg(left.location.register64.reghi),hregister);
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end
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else
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if left.location.size in [OS_32,OS_S32] then
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cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_16,left.location.register,cg.GetNextReg(left.location.register))
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else
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{$endif}
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cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,left.location.size,left.location.register,left.location.register);
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end;
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LOC_JUMP :
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begin
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location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
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location.register:=cg.getintregister(current_asmdata.CurrAsmList,location.size);
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current_asmdata.getjumplabel(hlabel);
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cg.a_label(current_asmdata.CurrAsmList,left.location.truelabel);
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if not(is_cbool(resultdef)) then
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cg.a_load_const_reg(current_asmdata.CurrAsmList,location.size,1,location.register)
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else
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cg.a_load_const_reg(current_asmdata.CurrAsmList,location.size,-1,location.register);
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cg.a_jmp_always(current_asmdata.CurrAsmList,hlabel);
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cg.a_label(current_asmdata.CurrAsmList,left.location.falselabel);
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cg.a_load_const_reg(current_asmdata.CurrAsmList,location.size,0,location.register);
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cg.a_label(current_asmdata.CurrAsmList,hlabel);
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end;
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else
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internalerror(10062);
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end;
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if (left.location.loc<>LOC_JUMP) then
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begin
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{ load flags to register }
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location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
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{$ifndef cpu64bitalu}
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if (location.size in [OS_64,OS_S64]) then
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begin
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hreg2:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
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cg.g_flags2reg(current_asmdata.CurrAsmList,OS_32,resflags,hreg2);
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cg.a_reg_dealloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
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if (is_cbool(resultdef)) then
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cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_NEG,OS_32,hreg2,hreg2);
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location.register64.reglo:=hreg2;
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location.register64.reghi:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
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if (is_cbool(resultdef)) then
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{ reglo is either 0 or -1 -> reghi has to become the same }
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cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_32,OS_32,location.register64.reglo,location.register64.reghi)
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else
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{ unsigned }
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cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_32,0,location.register64.reghi);
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end
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else
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{$endif not cpu64bitalu}
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begin
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location.register:=cg.getintregister(current_asmdata.CurrAsmList,location.size);
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cg.g_flags2reg(current_asmdata.CurrAsmList,location.size,resflags,location.register);
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cg.a_reg_dealloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
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if (is_cbool(resultdef)) then
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cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_NEG,location.size,location.register,location.register);
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end
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end;
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end;
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function tx86typeconvnode.int_to_real_mm_location : boolean;
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begin
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result:=use_vectorfpu(resultdef) and
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{$ifdef cpu64bitalu}
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((torddef(left.resultdef).ordtype in [s32bit,s64bit]) or
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((torddef(left.resultdef).ordtype in [u32bit,u64bit]) and
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(FPUX86_HAS_AVX512F in fpu_capabilities[current_settings.fputype]))
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);
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{$else cpu64bitalu}
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((torddef(left.resultdef).ordtype=s32bit)
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{$ifdef i386}
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or ((torddef(left.resultdef).ordtype=u32bit) and
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(FPUX86_HAS_AVX512F in fpu_capabilities[current_settings.fputype]))
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{$endif i386}
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);
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{$endif cpu64bitalu}
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end;
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function tx86typeconvnode.first_int_to_real : tnode;
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begin
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first_int_to_real:=nil;
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if (left.resultdef.size<4) then
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begin
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inserttypeconv(left,s32inttype);
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firstpass(left)
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end;
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if int_to_real_mm_location then
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expectloc:=LOC_MMREGISTER
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else
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expectloc:=LOC_FPUREGISTER;
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end;
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procedure tx86typeconvnode.second_int_to_real;
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var
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leftref,
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href : treference;
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l1,l2 : tasmlabel;
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op: tasmop;
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opsize: topsize;
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signtested : boolean;
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use_bt: boolean; { true = use BT (386+), false = use TEST (286-) }
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begin
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{$ifdef i8086}
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use_bt:=current_settings.cputype>=cpu_386;
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{$else i8086}
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use_bt:=true;
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{$endif i8086}
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if not(left.location.loc in [LOC_REGISTER,LOC_CREGISTER,LOC_REFERENCE,LOC_CREFERENCE]) then
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hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,false);
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if int_to_real_mm_location then
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begin
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location_reset(location,LOC_MMREGISTER,def_cgsize(resultdef));
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location.register:=cg.getmmregister(current_asmdata.CurrAsmList,location.size);
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if UseAVX then
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case location.size of
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OS_F32:
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if torddef(left.resultdef).ordtype in [s32bit,s64bit] then
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op:=A_VCVTSI2SS
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else
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op:=A_VCVTUSI2SS;
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OS_F64:
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if torddef(left.resultdef).ordtype in [s32bit,s64bit] then
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op:=A_VCVTSI2SD
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else
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op:=A_VCVTUSI2SD;
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else
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internalerror(2007120902);
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end
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else
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begin
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{ do not use is_signed here as it checks the boundaries instead
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of the ordtype }
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if not(torddef(left.resultdef).ordtype in [s32bit,s64bit]) then
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Internalerror(2020101001);
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case location.size of
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OS_F32:
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op:=A_CVTSI2SS;
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OS_F64:
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op:=A_CVTSI2SD;
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else
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internalerror(2007120904);
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end;
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end;
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{ don't use left.location.size, because that one may be OS_32/OS_64
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if the lower bound of the orddef >= 0
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}
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case torddef(left.resultdef).ordtype of
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s32bit,u32bit:
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opsize:=S_L;
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s64bit,u64bit:
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opsize:=S_Q;
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else
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internalerror(2007120903);
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end;
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case left.location.loc of
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LOC_REFERENCE,
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LOC_CREFERENCE:
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begin
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href:=left.location.reference;
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tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList,href);
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if UseAVX then
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{ VCVTSI2.. requires a second source operand to copy bits 64..127 }
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current_asmdata.CurrAsmList.concat(taicpu.op_ref_reg_reg(op,opsize,href,location.register,location.register))
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else
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current_asmdata.CurrAsmList.concat(taicpu.op_ref_reg(op,opsize,href,location.register));
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end;
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LOC_REGISTER,
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LOC_CREGISTER:
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if UseAVX then
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{ VCVTSI2.. requires a second source operand to copy bits 64..127 }
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(op,opsize,left.location.register,location.register,location.register))
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else
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(op,opsize,left.location.register,location.register));
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else
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internalerror(2019050708);
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end;
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end
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else
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begin
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location_reset(location,LOC_FPUREGISTER,def_cgsize(resultdef));
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if (left.location.loc=LOC_REGISTER) and (torddef(left.resultdef).ordtype=u64bit) then
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begin
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cg.a_reg_alloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
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if use_bt then
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begin
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{$if defined(cpu64bitalu)}
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emit_const_reg(A_BT,S_Q,63,left.location.register);
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{$elseif defined(cpu32bitalu)}
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emit_const_reg(A_BT,S_L,31,left.location.register64.reghi);
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{$elseif defined(cpu16bitalu)}
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emit_const_reg(A_BT,S_W,15,cg.GetNextReg(left.location.register64.reghi));
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{$endif}
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end
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else
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begin
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{$ifdef i8086}
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emit_const_reg(A_TEST,S_W,aint($8000),cg.GetNextReg(left.location.register64.reghi));
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{$else i8086}
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internalerror(2013052510);
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{$endif i8086}
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end;
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signtested:=true;
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end
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else
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signtested:=false;
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{ We need to load from a reference }
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hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef);
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{ don't change left.location.reference, because if it's a temp we
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need the original location at the end so we can free it }
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leftref:=left.location.reference;
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tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList,leftref);
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{ For u32bit we need to load it as comp and need to
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make it 64bits }
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if (torddef(left.resultdef).ordtype=u32bit) then
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begin
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tg.GetTemp(current_asmdata.CurrAsmList,8,8,tt_normal,href);
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location_freetemp(current_asmdata.CurrAsmList,left.location);
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cg.a_load_ref_ref(current_asmdata.CurrAsmList,left.location.size,OS_32,leftref,href);
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inc(href.offset,4);
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cg.a_load_const_ref(current_asmdata.CurrAsmList,OS_32,0,href);
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dec(href.offset,4);
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{ could be a temp with an offset > 32 bit on x86_64 }
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tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList,href);
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leftref:=href;
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end;
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{ Load from reference to fpu reg }
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case torddef(left.resultdef).ordtype of
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u32bit,
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scurrency,
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s64bit:
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begin
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current_asmdata.CurrAsmList.concat(taicpu.op_ref(A_FILD,S_IQ,leftref));
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end;
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u64bit:
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begin
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{ unsigned 64 bit ints are harder to handle:
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we load bits 0..62 and then check bit 63:
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if it is 1 then we add 2**64 as float.
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Since 2**64 can be represented exactly, use a single-precision
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constant to save space. }
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current_asmdata.getlocaldatalabel(l1);
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current_asmdata.getjumplabel(l2);
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if not(signtested) then
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begin
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if use_bt then
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begin
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{$if defined(cpu64bitalu) or defined(cpu32bitalu)}
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inc(leftref.offset,4);
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cg.a_reg_alloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
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emit_const_ref(A_BT,S_L,31,leftref);
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dec(leftref.offset,4);
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{$elseif defined(cpu16bitalu)}
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inc(leftref.offset,6);
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cg.a_reg_alloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
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emit_const_ref(A_BT,S_W,15,leftref);
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dec(leftref.offset,6);
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{$endif}
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end
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else
|
|
begin
|
|
{$ifdef i8086}
|
|
{ reading a byte, instead of word is faster on a true }
|
|
{ 8088, because of the 8-bit data bus }
|
|
inc(leftref.offset,7);
|
|
cg.a_reg_alloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
|
|
emit_const_ref(A_TEST,S_B,aint($80),leftref);
|
|
dec(leftref.offset,7);
|
|
{$else i8086}
|
|
internalerror(2013052511);
|
|
{$endif i8086}
|
|
end;
|
|
end;
|
|
|
|
current_asmdata.CurrAsmList.concat(taicpu.op_ref(A_FILD,S_IQ,leftref));
|
|
if use_bt then
|
|
cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NC,l2)
|
|
else
|
|
cg.a_jmp_flags(current_asmdata.CurrAsmList,F_E,l2);
|
|
cg.a_reg_dealloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
|
|
new_section(current_asmdata.asmlists[al_typedconsts],sec_rodata_norel,l1.name,const_align(sizeof(pint)));
|
|
current_asmdata.asmlists[al_typedconsts].concat(Tai_label.Create(l1));
|
|
{ I got this constant from a test program (FK) }
|
|
{ It's actually the bit representation of 2^64 as a Single [Kit] }
|
|
current_asmdata.asmlists[al_typedconsts].concat(Tai_const.Create_32bit($5f800000));
|
|
reference_reset_symbol(href,l1,0,4,[]);
|
|
tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList,href);
|
|
current_asmdata.CurrAsmList.concat(Taicpu.Op_ref(A_FADD,S_FS,href));
|
|
cg.a_label(current_asmdata.CurrAsmList,l2);
|
|
end
|
|
else
|
|
begin
|
|
if left.resultdef.size<4 then
|
|
internalerror(2007120901);
|
|
current_asmdata.CurrAsmList.concat(taicpu.op_ref(A_FILD,S_IL,leftref));
|
|
end;
|
|
end;
|
|
tcgx86(cg).inc_fpu_stack;
|
|
location.register:=NR_ST;
|
|
tg.ungetiftemp(current_asmdata.CurrAsmList,leftref);
|
|
end;
|
|
end;
|
|
|
|
begin
|
|
ctypeconvnode:=tx86typeconvnode
|
|
end.
|