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https://gitlab.com/freepascal.org/fpc/source.git
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2291 lines
84 KiB
ObjectPascal
2291 lines
84 KiB
ObjectPascal
{
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Copyright (c) 1998-2002 by Carl Eric Codere and Peter Vreman
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Handles the common x86 assembler reader routines
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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{
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Contains the common x86 (i386 and x86-64) assembler reader routines.
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}
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unit rax86;
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{$i fpcdefs.inc}
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interface
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uses
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aasmbase,aasmtai,aasmdata,aasmcpu,
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cpubase,rautils,cclasses;
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{ Parser helpers }
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function is_prefix(t:tasmop):boolean;
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function is_override(t:tasmop):boolean;
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Function CheckPrefix(prefixop,op:tasmop): Boolean;
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Function CheckOverride(overrideop,op:tasmop): Boolean;
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Procedure FWaitWarning;
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type
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Tx86Operand=class(TOperand)
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opsize : topsize;
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vopext : smallint; // bitmask: vector-operand extention AVX512 (e.g. vaddps xmm0 {k1} {z})
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vbcst : byte;
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Procedure SetSize(_size:longint;force:boolean);override;
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Procedure SetCorrectSize(opcode:tasmop);override;
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Function CheckOperand(ins : TInstruction): boolean; override;
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{ handles the @Code symbol }
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Procedure SetupCode;
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{ handles the @Data symbol }
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Procedure SetupData;
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constructor create; override;
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end;
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{ Operands are always in AT&T order.
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Intel reader attaches them right-to-left, then shifts to start with 1 }
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{ Tx86Instruction }
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Tx86Instruction=class(TInstruction)
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opsize : topsize;
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constructor Create(optype : tcoperand);override;
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{ Operand sizes }
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procedure AddReferenceSizes; virtual;
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procedure SetInstructionOpsize;
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procedure CheckOperandSizes;
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procedure CheckNonCommutativeOpcodes;
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{ Additional actions required by specific reader }
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procedure FixupOpcode;virtual;
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{ opcode adding }
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function ConcatInstruction(p : TAsmList) : tai;override;
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function getstring(aAddMemRefSize: boolean = true): string;
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{ returns true, if the opcode might have an extension as used by AVX512 }
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function MightHaveExtension : boolean;
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end;
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const
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AsmPrefixes = 8{$ifdef i8086}+2{$endif i8086};
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AsmPrefix : array[0..AsmPrefixes-1] of TasmOP =(
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A_LOCK,A_REP,A_REPE,A_REPNE,A_REPNZ,A_REPZ,A_XACQUIRE,A_XRELEASE{$ifdef i8086},A_REPC,A_REPNC{$endif i8086}
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);
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AsmOverrides = 6;
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AsmOverride : array[0..AsmOverrides-1] of TasmOP =(
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A_SEGCS,A_SEGES,A_SEGDS,A_SEGFS,A_SEGGS,A_SEGSS
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);
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CondAsmOps=3;
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CondAsmOp:array[0..CondAsmOps-1] of TasmOp=(
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A_CMOVcc, A_Jcc, A_SETcc
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);
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CondAsmOpStr:array[0..CondAsmOps-1] of string[4]=(
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'CMOV','J','SET'
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);
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implementation
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uses
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globtype,globals,systems,verbose,
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procinfo,
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cgbase,cgutils,
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itcpugas,cgx86, cutils;
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{*****************************************************************************
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Parser Helpers
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*****************************************************************************}
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function is_prefix(t:tasmop):boolean;
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var
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i : longint;
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Begin
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is_prefix:=false;
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for i:=1 to AsmPrefixes do
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if t=AsmPrefix[i-1] then
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begin
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is_prefix:=true;
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exit;
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end;
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end;
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function is_override(t:tasmop):boolean;
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var
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i : longint;
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Begin
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is_override:=false;
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for i:=1 to AsmOverrides do
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if t=AsmOverride[i-1] then
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begin
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is_override:=true;
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exit;
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end;
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end;
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Function CheckPrefix(prefixop,op:tasmop): Boolean;
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{ Checks if the prefix is valid with the following opcode }
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{ return false if not, otherwise true }
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Begin
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CheckPrefix := TRUE;
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(* Case prefix of
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A_REP,A_REPNE,A_REPE:
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Case opcode Of
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A_SCASB,A_SCASW,A_SCASD,
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A_INS,A_OUTS,A_MOVS,A_CMPS,A_LODS,A_STOS:;
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Else
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Begin
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CheckPrefix := FALSE;
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exit;
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end;
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end; { case }
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A_LOCK:
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Case opcode Of
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A_BT,A_BTS,A_BTR,A_BTC,A_XCHG,A_ADD,A_OR,A_ADC,A_SBB,A_AND,A_SUB,
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A_XOR,A_NOT,A_NEG,A_INC,A_DEC:;
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Else
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Begin
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CheckPrefix := FALSE;
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Exit;
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end;
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end; { case }
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A_NONE: exit; { no prefix here }
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else
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CheckPrefix := FALSE;
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end; { end case } *)
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end;
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Function CheckOverride(overrideop,op:tasmop): Boolean;
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{ Check if the override is valid, and if so then }
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{ update the instr variable accordingly. }
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Begin
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CheckOverride := true;
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{ Case instr.getinstruction of
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A_MOVS,A_XLAT,A_CMPS:
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Begin
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CheckOverride := TRUE;
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Message(assem_e_segment_override_not_supported);
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end
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end }
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end;
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Procedure FWaitWarning;
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begin
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if (target_info.system=system_i386_GO32V2) and (cs_fp_emulation in current_settings.moduleswitches) then
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Message(asmr_w_fwait_emu_prob);
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end;
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{*****************************************************************************
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TX86Operand
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*****************************************************************************}
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Procedure Tx86Operand.SetSize(_size:longint;force:boolean);
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begin
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inherited SetSize(_size,force);
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{ OS_64 will be set to S_L and be fixed later
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in SetCorrectSize }
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// multimedia register
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case _size of
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16: size := OS_M128;
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32: size := OS_M256;
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64: size := OS_M512;
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end;
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{$ifdef i8086}
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{ allows e.g. using 32-bit registers in i8086 inline asm }
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if size in [OS_32,OS_S32] then
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opsize:=S_L
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else
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{$endif i8086}
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opsize:=TCGSize2Opsize[size];
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end;
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Procedure Tx86Operand.SetCorrectSize(opcode:tasmop);
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begin
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if gas_needsuffix[opcode]=attsufFPU then
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begin
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case size of
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OS_32 : opsize:=S_FS;
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OS_64 : opsize:=S_FL;
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else
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;
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end;
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end
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else if gas_needsuffix[opcode]=attsufFPUint then
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begin
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case size of
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OS_16 : opsize:=S_IS;
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OS_32 : opsize:=S_IL;
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OS_64 : opsize:=S_IQ;
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else
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;
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end;
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end
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else if gas_needsuffix[opcode] in [AttSufMM, AttSufMMX, AttSufMMS] then
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begin
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if (opr.typ=OPR_Reference) then
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begin
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case size of
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OS_32 : size := OS_M32;
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OS_64 : size := OS_M64;
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else
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;
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end;
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end;
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end
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else
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begin
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if size=OS_64 then
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opsize:=S_Q;
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end;
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end;
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Function Tx86Operand.CheckOperand(ins : TInstruction): boolean;
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var
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ErrorRefStr: string;
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begin
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result:=true;
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if (opr.typ=OPR_Reference) then
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begin
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if not hasvar then
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begin
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if (getsupreg(opr.ref.base)=RS_EBP) and (opr.ref.offset>0) then
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begin
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if current_settings.asmmode in asmmodes_x86_intel then
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begin
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case getsubreg(opr.ref.base) of
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R_SUBW:
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ErrorRefStr:='[BP+offset]';
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R_SUBD:
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ErrorRefStr:='[EBP+offset]';
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R_SUBQ:
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ErrorRefStr:='[RBP+offset]';
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else
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internalerror(2019061001);
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end;
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end
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else
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begin
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case getsubreg(opr.ref.base) of
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R_SUBW:
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ErrorRefStr:='+offset(%bp)';
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R_SUBD:
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ErrorRefStr:='+offset(%ebp)';
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R_SUBQ:
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ErrorRefStr:='+offset(%rbp)';
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else
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internalerror(2019061002);
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end;
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end;
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if current_procinfo.procdef.proccalloption=pocall_register then
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message1(asmr_w_no_direct_ebp_for_parameter,ErrorRefStr)
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else
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message1(asmr_w_direct_ebp_for_parameter_regcall,ErrorRefStr);
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end
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else if (getsupreg(opr.ref.base)=RS_EBP) and (opr.ref.offset<0) then
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begin
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if current_settings.asmmode in asmmodes_x86_intel then
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begin
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case getsubreg(opr.ref.base) of
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R_SUBW:
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ErrorRefStr:='[BP-offset]';
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R_SUBD:
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ErrorRefStr:='[EBP-offset]';
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R_SUBQ:
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ErrorRefStr:='[RBP-offset]';
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else
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internalerror(2019061003);
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end;
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end
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else
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begin
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case getsubreg(opr.ref.base) of
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R_SUBW:
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ErrorRefStr:='-offset(%bp)';
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R_SUBD:
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ErrorRefStr:='-offset(%ebp)';
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R_SUBQ:
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ErrorRefStr:='-offset(%rbp)';
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else
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internalerror(2019061004);
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end;
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end;
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message1(asmr_w_direct_ebp_neg_offset,ErrorRefStr);
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end
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else if ((ins.opcode<>A_LEA) and (getsupreg(opr.ref.base)=RS_ESP) and (getsubreg(opr.ref.base)<>R_SUBW) and (opr.ref.offset<0)) or
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((ins.opcode=A_LEA) and (getsupreg(ins.operands[2].opr.reg)<>RS_ESP) and (getsupreg(opr.ref.base)=RS_ESP) and (getsubreg(opr.ref.base)<>R_SUBW) and (opr.ref.offset<0)) then
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begin
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if current_settings.asmmode in asmmodes_x86_intel then
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begin
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case getsubreg(opr.ref.base) of
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R_SUBD:
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ErrorRefStr:='[ESP-offset]';
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R_SUBQ:
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ErrorRefStr:='[RSP-offset]';
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else
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internalerror(2019061005);
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end;
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end
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else
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begin
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case getsubreg(opr.ref.base) of
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R_SUBD:
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ErrorRefStr:='-offset(%esp)';
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R_SUBQ:
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ErrorRefStr:='-offset(%rsp)';
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else
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internalerror(2019061006);
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end;
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end;
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message1(asmr_w_direct_esp_neg_offset,ErrorRefStr);
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end;
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end;
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if (cs_create_pic in current_settings.moduleswitches) and
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assigned(opr.ref.symbol) and
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not assigned(opr.ref.relsymbol) then
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begin
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if not(opr.ref.refaddr in [addr_pic,addr_pic_no_got]) then
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begin
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if (opr.ref.symbol.name <> '_GLOBAL_OFFSET_TABLE_') then
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begin
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message(asmr_e_need_pic_ref);
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result:=false;
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end
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else
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opr.ref.refaddr:=addr_pic;
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end
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else
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begin
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{$ifdef x86_64}
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{ should probably be extended to i386, but there the situation
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is more complex and ELF-style PIC still need to be
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tested/debugged }
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if (opr.ref.symbol.bind in [AB_LOCAL,AB_PRIVATE_EXTERN]) and
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(opr.ref.refaddr=addr_pic) then
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message(asmr_w_useless_got_for_local)
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else if (opr.ref.symbol.bind in [AB_GLOBAL,AB_EXTERNAL,AB_COMMON,AB_WEAK_EXTERNAL]) and
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(opr.ref.refaddr=addr_pic_no_got) then
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message(asmr_w_global_access_without_got);
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{$endif x86_64}
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end;
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end;
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end;
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end;
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procedure Tx86Operand.SetupCode;
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begin
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{$ifdef i8086}
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opr.typ:=OPR_SYMBOL;
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opr.symofs:=0;
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opr.symbol:=current_asmdata.RefAsmSymbol(current_procinfo.procdef.mangledname,AT_FUNCTION);
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opr.symseg:=true;
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opr.sym_farproc_entry:=false;
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{$else i8086}
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Message(asmr_w_CODE_and_DATA_not_supported);
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{$endif i8086}
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end;
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procedure Tx86Operand.SetupData;
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begin
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{$ifdef i8086}
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InitRef;
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if current_settings.x86memorymodel=mm_huge then
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opr.ref.refaddr:=addr_fardataseg
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else
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opr.ref.refaddr:=addr_dgroup;
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{$else i8086}
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Message(asmr_w_CODE_and_DATA_not_supported);
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{$endif i8086}
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end;
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constructor Tx86Operand.create;
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begin
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inherited;
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vopext := 0;
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vbcst := 0;
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end;
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{*****************************************************************************
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T386Instruction
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*****************************************************************************}
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constructor Tx86Instruction.Create(optype : tcoperand);
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begin
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inherited Create(optype);
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Opsize:=S_NO;
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end;
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{ this will add the sizes for references like [esi] which do not
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have the size set yet, it will take only the size if the other
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operand is a register }
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procedure Tx86Instruction.AddReferenceSizes;
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var
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operand2,i,j,k : longint;
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s : tasmsymbol;
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so : aint;
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ExistsMemRefNoSize: boolean;
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ExistsMemRef: boolean;
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ExistsConstNoSize: boolean;
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ExistConst: boolean;
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ExistsLocalSymSize: boolean;
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ExistsBCST: boolean;
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memrefsize: integer;
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memopsize: integer;
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memoffset: asizeint;
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vbcst: byte;
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mmregs: Set of TSubregister;
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multiplicator: integer;
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bcst1,bcst2: string;
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function ScanLowestOpsize(aValue: int64): int64;
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var
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i: integer;
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begin
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result := 0;
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if aValue and OT_BITS8 = OT_BITS8 then result := 8
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else if aValue and OT_BITS16 = OT_BITS16 then result := 16
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else if aValue and OT_BITS32 = OT_BITS32 then result := 32
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else if aValue and OT_BITS64 = OT_BITS64 then result := 64
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else if aValue and OT_BITS128 = OT_BITS128 then result := 128
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else if aValue and OT_BITS256 = OT_BITS256 then result := 256
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else if aValue and OT_BITS512 = OT_BITS512 then result := 512;
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end;
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begin
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ExistsMemRefNoSize := false;
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ExistsMemRef := false;
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ExistsConstNoSize := false;
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ExistsLocalSymSize := false;
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ExistsBCST := false;
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// EXIST A MEMORY- OR CONSTANT-OPERAND WITHOUT SIZE ?
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for i := 1 to ops do
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begin
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if operands[i].Opr.Typ in [OPR_REFERENCE, OPR_LOCAL] then
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begin
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ExistsMemRef := true;
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ExistsBCST := (MemRefInfo(opcode).ExistsSSEAVX) and
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(tx86operand(operands[i]).vbcst <> 0);
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if (tx86operand(operands[i]).opsize = S_NO) then
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begin
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ExistsMemRefNoSize := true;
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case operands[i].opr.Typ of
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OPR_LOCAL: ExistsLocalSymSize := tx86operand(operands[i]).opr.localsym.getsize > 0;
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OPR_REFERENCE: ExistsLocalSymSize := true;
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else
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;
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end;
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end;
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end
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else if operands[i].Opr.Typ in [OPR_CONSTANT] then
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begin
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ExistsConstNoSize := tx86operand(operands[i]).opsize = S_NO;
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end;
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end;
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// ONLY SUPPORTED OPCODES WITH SSE- OR AVX-REGISTERS
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if (ExistsMemRef) and
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(MemRefInfo(opcode).ExistsSSEAVX) then
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begin
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// 1. WE HAVE AN SSE- OR AVX-OPCODE WITH MEMORY OPERAND
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if (not(ExistsMemRefNoSize)) or
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(ExistsLocalSymSize) then
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begin
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// 2. WE KNOWN THE MEMORYSIZE OF THE MEMORY-OPERAND OR WE CAN
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// CALC THE MEMORYSIZE
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// 3. CALC THE SIZE OF THE MEMORYOPERAND BY OPCODE-DEFINITION
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// 4. COMPARE THE SIZE FROM OPCODE-DEFINITION AND THE REAL MEMORY-OPERAND-SIZE
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// - validate memory-reference-size
|
|
for i := 1 to ops do
|
|
begin
|
|
if (operands[i].Opr.Typ in [OPR_REFERENCE, OPR_LOCAL]) then
|
|
begin
|
|
memrefsize := -1;
|
|
|
|
if ExistsBCST then
|
|
begin
|
|
case MemRefInfo(opcode).MemRefSizeBCST of
|
|
msbBCST32: memrefsize := 32;
|
|
msbBCST64: memrefsize := 64;
|
|
else
|
|
Internalerror(2019081015);
|
|
end;
|
|
end
|
|
else
|
|
case MemRefInfo(opcode).MemRefSize of
|
|
msiMem8: memrefsize := 8;
|
|
msiMem16: memrefsize := 16;
|
|
msiMem32: memrefsize := 32;
|
|
msiMem64: memrefsize := 64;
|
|
msiMem128: memrefsize := 128;
|
|
msiMem256: memrefsize := 256;
|
|
msiMem512: memrefsize := 512;
|
|
msiMemRegx16y32:
|
|
begin
|
|
for j := 1 to ops do
|
|
begin
|
|
if operands[j].Opr.Typ = OPR_REGISTER then
|
|
begin
|
|
case getsubreg(operands[j].opr.reg) of
|
|
R_SUBMMX: memrefsize := 16;
|
|
R_SUBMMY: memrefsize := 32;
|
|
else Message(asmr_e_unable_to_determine_reference_size);
|
|
end;
|
|
end;
|
|
end;
|
|
end;
|
|
msiMemRegx16y32z64:
|
|
begin
|
|
for j := 1 to ops do
|
|
begin
|
|
if operands[j].Opr.Typ = OPR_REGISTER then
|
|
begin
|
|
case getsubreg(operands[j].opr.reg) of
|
|
R_SUBMMX: memrefsize := 16;
|
|
R_SUBMMY: memrefsize := 32;
|
|
R_SUBMMZ: memrefsize := 64;
|
|
else Message(asmr_e_unable_to_determine_reference_size);
|
|
end;
|
|
end;
|
|
end;
|
|
end;
|
|
msiMemRegx32y64:
|
|
begin
|
|
for j := 1 to ops do
|
|
begin
|
|
if operands[j].Opr.Typ = OPR_REGISTER then
|
|
begin
|
|
case getsubreg(operands[j].opr.reg) of
|
|
R_SUBMMX: memrefsize := 32;
|
|
R_SUBMMY: memrefsize := 64;
|
|
else Message(asmr_e_unable_to_determine_reference_size);
|
|
end;
|
|
end;
|
|
end;
|
|
end;
|
|
msiMemRegx32y64z128:
|
|
begin
|
|
for j := 1 to ops do
|
|
begin
|
|
if operands[j].Opr.Typ = OPR_REGISTER then
|
|
begin
|
|
case getsubreg(operands[j].opr.reg) of
|
|
R_SUBMMX: memrefsize := 32;
|
|
R_SUBMMY: memrefsize := 64;
|
|
R_SUBMMZ: memrefsize := 128;
|
|
else Message(asmr_e_unable_to_determine_reference_size);
|
|
end;
|
|
end;
|
|
end;
|
|
end;
|
|
msiMemRegx64y128:
|
|
begin
|
|
for j := 1 to ops do
|
|
begin
|
|
if operands[j].Opr.Typ = OPR_REGISTER then
|
|
begin
|
|
case getsubreg(operands[j].opr.reg) of
|
|
R_SUBMMX: memrefsize := 64;
|
|
R_SUBMMY: memrefsize := 128;
|
|
else Message(asmr_e_unable_to_determine_reference_size);
|
|
end;
|
|
end;
|
|
end;
|
|
end;
|
|
msiMemRegx64y256:
|
|
begin
|
|
for j := 1 to ops do
|
|
begin
|
|
if operands[j].Opr.Typ = OPR_REGISTER then
|
|
begin
|
|
case getsubreg(operands[j].opr.reg) of
|
|
R_SUBMMX: memrefsize := 64;
|
|
R_SUBMMY: memrefsize := 256;
|
|
else Message(asmr_e_unable_to_determine_reference_size);
|
|
end;
|
|
end;
|
|
end;
|
|
end;
|
|
msiMemRegx64y128z256:
|
|
begin
|
|
begin
|
|
for j := 1 to ops do
|
|
begin
|
|
if operands[j].Opr.Typ = OPR_REGISTER then
|
|
begin
|
|
case getsubreg(operands[j].opr.reg) of
|
|
R_SUBMMX: memrefsize := 64;
|
|
R_SUBMMY: memrefsize := 128;
|
|
R_SUBMMZ: memrefsize := 256;
|
|
else Message(asmr_e_unable_to_determine_reference_size);
|
|
end;
|
|
end;
|
|
end;
|
|
end;
|
|
end;
|
|
msiMemRegx64y256z512:
|
|
begin
|
|
begin
|
|
for j := 1 to ops do
|
|
begin
|
|
if operands[j].Opr.Typ = OPR_REGISTER then
|
|
begin
|
|
case getsubreg(operands[j].opr.reg) of
|
|
R_SUBMMX: memrefsize := 64;
|
|
R_SUBMMY: memrefsize := 256;
|
|
R_SUBMMZ: memrefsize := 512;
|
|
else Message(asmr_e_unable_to_determine_reference_size);
|
|
end;
|
|
end;
|
|
end;
|
|
end;
|
|
end;
|
|
msiMemRegSize:
|
|
begin
|
|
for j := 1 to ops do
|
|
begin
|
|
if operands[j].Opr.Typ = OPR_REGISTER then
|
|
begin
|
|
if (tx86operand(operands[j]).opsize <> S_NO) and
|
|
(tx86operand(operands[j]).size <> OS_NO) then
|
|
begin
|
|
case tx86operand(operands[j]).opsize of
|
|
S_B : memrefsize := 8;
|
|
S_W : memrefsize := 16;
|
|
S_L : memrefsize := 32;
|
|
S_Q : memrefsize := 64;
|
|
S_XMM : memrefsize := 128;
|
|
S_YMM : memrefsize := 256;
|
|
S_ZMM : memrefsize := 512;
|
|
else Internalerror(2019081010);
|
|
end;
|
|
break;
|
|
end;
|
|
end;
|
|
end;
|
|
end;
|
|
msiMemRegConst128,
|
|
msiMemRegConst256,
|
|
msiMemRegConst512:
|
|
begin
|
|
for j := 1 to ops do
|
|
begin
|
|
if operands[j].Opr.Typ = OPR_CONSTANT then
|
|
begin
|
|
for k := 1 to ops do
|
|
begin
|
|
if operands[k].Opr.Typ = OPR_REGISTER then
|
|
begin
|
|
if (tx86operand(operands[k]).opsize <> S_NO) and
|
|
(tx86operand(operands[k]).size <> OS_NO) then
|
|
begin
|
|
case tx86operand(operands[k]).opsize of
|
|
S_B : memrefsize := 8;
|
|
S_W : memrefsize := 16;
|
|
S_L : memrefsize := 32;
|
|
S_Q : memrefsize := 64;
|
|
S_XMM : memrefsize := 128;
|
|
S_YMM : memrefsize := 256;
|
|
S_ZMM : memrefsize := 512;
|
|
else Internalerror(777200);
|
|
end;
|
|
break;
|
|
end;
|
|
end;
|
|
end;
|
|
|
|
break;
|
|
end;
|
|
end;
|
|
|
|
// no exists const-operand
|
|
if memrefsize = -1 then
|
|
begin
|
|
case MemRefInfo(opcode).MemRefSize of
|
|
msiMemRegConst128: memrefsize := 128;
|
|
msiMemRegConst256: memrefsize := 256;
|
|
msiMemRegConst512: memrefsize := 512;
|
|
else Internalerror(2019081012);
|
|
end;
|
|
end;
|
|
end;
|
|
msiXMem32,
|
|
msiYMem32,
|
|
msiZMem32,
|
|
msiXMem64,
|
|
msiYMem64,
|
|
msiZMem64: ; // ignore; gather/scatter opcodes haven a fixed element-size, not a fixed memory-size
|
|
// the vector-register have indices with base of the memory-address in the memory-operand
|
|
msiMultipleMinSize8,
|
|
msiMultipleMinSize16,
|
|
msiMultipleMinSize32,
|
|
msiMultipleMinSize64,
|
|
msiMultipleMinSize128,
|
|
msiMultipleMinSize256,
|
|
msiMultipleMinSize512:
|
|
begin
|
|
for j := 1 to ops do
|
|
begin
|
|
if operands[j].Opr.Typ = OPR_REGISTER then
|
|
begin
|
|
case getsubreg(operands[j].opr.reg) of
|
|
R_SUBMMX: begin
|
|
memrefsize := ScanLowestOpsize(MemRefInfo(opcode).RegXMMSizeMask);
|
|
break;
|
|
end;
|
|
R_SUBMMY: begin
|
|
memrefsize := ScanLowestOpsize(MemRefInfo(opcode).RegYMMSizeMask);
|
|
break;
|
|
end;
|
|
R_SUBMMZ: begin
|
|
memrefsize := ScanLowestOpsize(MemRefInfo(opcode).RegZMMSizeMask);
|
|
break;
|
|
end;
|
|
else;
|
|
end;
|
|
end;
|
|
end;
|
|
|
|
if memrefsize = -1 then
|
|
begin
|
|
case MemRefInfo(opcode).MemRefSize of
|
|
msiMultipleMinSize8: memrefsize := 8;
|
|
msiMultipleMinSize16: memrefsize := 16;
|
|
msiMultipleMinSize32: memrefsize := 32;
|
|
msiMultipleMinSize64: memrefsize := 64;
|
|
msiMultipleMinSize128: memrefsize := 128;
|
|
msiMultipleMinSize256: memrefsize := 256;
|
|
msiMultipleMinSize512: memrefsize := 512;
|
|
else;
|
|
end;
|
|
end;
|
|
end;
|
|
msiNoSize,
|
|
msiNoMemRef,
|
|
msiUnknown,
|
|
msiUnsupported,
|
|
msiVMemMultiple,
|
|
msiVMemRegSize,
|
|
msiMultiple:
|
|
;
|
|
else
|
|
Internalerror(2020111001);
|
|
end;
|
|
|
|
if memrefsize > -1 then
|
|
begin
|
|
// CALC REAL-MEMORY-OPERAND-SIZE AND A POSSIBLE OFFSET
|
|
|
|
// OFFSET:
|
|
// e.g. PAND XMM0, [RAX + 16] =>> OFFSET = 16 BYTES
|
|
// PAND XMM0, [RAX + a.b + 10] =>> OFFSET = 10 BYTES (a = record-variable)
|
|
|
|
memopsize := 0;
|
|
case operands[i].opr.typ of
|
|
OPR_LOCAL: memopsize := operands[i].opr.localvarsize * 8;
|
|
OPR_REFERENCE:
|
|
if operands[i].opr.ref.refaddr = addr_pic then
|
|
memopsize := sizeof(pint) * 8
|
|
else
|
|
memopsize := operands[i].opr.varsize * 8;
|
|
else
|
|
;
|
|
end;
|
|
|
|
//if memopsize = 0 then memopsize := topsize2memsize[tx86operand(operands[i]).opsize];
|
|
|
|
if memopsize = 0 then
|
|
begin
|
|
{$ifdef i386}
|
|
{ 64-bit operands are allowed for SSE and AVX instructions, so
|
|
go by the byte size instead for these families of opcodes }
|
|
if (MemRefInfo(opcode).ExistsSSEAVX) then
|
|
begin
|
|
memopsize := tx86operand(operands[i]).typesize * 8;
|
|
if tx86operand(operands[i]).typesize = 8 then
|
|
{ Will be S_L otherwise and won't be corrected in time }
|
|
tx86operand(operands[i]).opsize := S_Q;
|
|
end
|
|
else
|
|
{$endif i386}
|
|
memopsize := topsize2memsize[tx86operand(operands[i]).opsize];
|
|
end;
|
|
|
|
|
|
if (memopsize > 0) and
|
|
(memrefsize > 0) then
|
|
begin
|
|
memoffset := 0;
|
|
|
|
case operands[i].opr.typ of
|
|
OPR_LOCAL:
|
|
memoffset := operands[i].opr.localconstoffset;
|
|
OPR_REFERENCE:
|
|
memoffset := operands[i].opr.constoffset;
|
|
else
|
|
;
|
|
end;
|
|
|
|
if ((operands[i].opr.ref.base=NR_ESP) or (operands[i].opr.ref.index=NR_ESP)) and (memoffset < 0) then
|
|
begin
|
|
Message2(asmr_w_check_mem_operand_negative_offset,
|
|
//std_op2str[opcode],
|
|
getstring(false),
|
|
ToStr(memoffset));
|
|
end
|
|
else if ((tx86operand(operands[i]).hastype) and (memopsize < memrefsize)) or
|
|
(memopsize < (memrefsize + memoffset * 8)) then
|
|
begin
|
|
if memopsize < memrefsize then
|
|
begin
|
|
if memoffset = 0 then
|
|
begin
|
|
Message3(asmr_w_check_mem_operand_size3,
|
|
getstring(false),
|
|
ToStr(memopsize),
|
|
ToStr(memrefsize)
|
|
);
|
|
end
|
|
else
|
|
begin
|
|
Message4(asmr_w_check_mem_operand_size_offset,
|
|
getstring(false),
|
|
ToStr(memopsize),
|
|
ToStr(memrefsize),
|
|
ToStr(memoffset)
|
|
);
|
|
end;
|
|
end;
|
|
end;
|
|
end;
|
|
end;
|
|
end;
|
|
end;
|
|
end;
|
|
end;
|
|
|
|
if (ExistsMemRefNoSize or ExistsConstNoSize) and
|
|
(MemRefInfo(opcode).ExistsSSEAVX) then
|
|
begin
|
|
for i := 1 to ops do
|
|
begin
|
|
if (tx86operand(operands[i]).opsize = S_NO) then
|
|
begin
|
|
case operands[i].Opr.Typ of
|
|
OPR_REFERENCE,
|
|
OPR_LOCAL:
|
|
begin
|
|
if ExistsBCST then
|
|
begin
|
|
case MemRefInfo(opcode).MemRefSizeBCST of
|
|
msbBCST32: begin
|
|
tx86operand(operands[i]).opsize := S_L;
|
|
tx86operand(operands[i]).size := OS_32;
|
|
end;
|
|
msbBCST64: begin
|
|
tx86operand(operands[i]).opsize := S_Q;
|
|
tx86operand(operands[i]).size := OS_M64;
|
|
end;
|
|
else
|
|
Internalerror(2019081017);
|
|
end;
|
|
end
|
|
else
|
|
|
|
case MemRefInfo(opcode).MemRefSize of
|
|
msiMem8:
|
|
begin
|
|
tx86operand(operands[i]).opsize := S_B;
|
|
tx86operand(operands[i]).size := OS_8;
|
|
end;
|
|
msiMultipleMinSize8:
|
|
begin
|
|
tx86operand(operands[i]).opsize := S_B;
|
|
tx86operand(operands[i]).size := OS_8;
|
|
|
|
Message2(asmr_w_check_mem_operand_automap_multiple_size, GetString(false), '"8 bit memory operand"');
|
|
end;
|
|
msiMem16:
|
|
begin
|
|
tx86operand(operands[i]).opsize := S_W;
|
|
tx86operand(operands[i]).size := OS_16;
|
|
end;
|
|
msiMultipleMinSize16:
|
|
begin
|
|
tx86operand(operands[i]).opsize := S_W;
|
|
tx86operand(operands[i]).size := OS_16;
|
|
|
|
Message2(asmr_w_check_mem_operand_automap_multiple_size, GetString(false), '"16 bit memory operand"');
|
|
end;
|
|
msiMem32:
|
|
begin
|
|
tx86operand(operands[i]).opsize := S_L;
|
|
tx86operand(operands[i]).size := OS_32;
|
|
end;
|
|
msiMultipleMinSize32:
|
|
begin
|
|
tx86operand(operands[i]).opsize := S_L;
|
|
tx86operand(operands[i]).size := OS_32;
|
|
|
|
Message2(asmr_w_check_mem_operand_automap_multiple_size, GetString(false), '"32 bit memory operand"');
|
|
end;
|
|
msiMem64:
|
|
begin
|
|
tx86operand(operands[i]).opsize := S_Q;
|
|
tx86operand(operands[i]).size := OS_M64;
|
|
end;
|
|
msiMultipleMinSize64:
|
|
begin
|
|
tx86operand(operands[i]).opsize := S_Q;
|
|
tx86operand(operands[i]).size := OS_M64;
|
|
|
|
Message2(asmr_w_check_mem_operand_automap_multiple_size, GetString(false), '"64 bit memory operand"');
|
|
end;
|
|
msiMem128:
|
|
begin
|
|
tx86operand(operands[i]).opsize := S_XMM;
|
|
tx86operand(operands[i]).size := OS_M128;
|
|
end;
|
|
msiMultipleMinSize128:
|
|
begin
|
|
tx86operand(operands[i]).opsize := S_XMM;
|
|
tx86operand(operands[i]).size := OS_M128;
|
|
|
|
Message2(asmr_w_check_mem_operand_automap_multiple_size, GetString(false), '"128 bit memory operand"');
|
|
end;
|
|
msiMem256:
|
|
begin
|
|
tx86operand(operands[i]).opsize := S_YMM;
|
|
tx86operand(operands[i]).size := OS_M256;
|
|
opsize := S_YMM;
|
|
end;
|
|
msiMultipleMinSize256:
|
|
begin
|
|
tx86operand(operands[i]).opsize := S_YMM;
|
|
tx86operand(operands[i]).size := OS_M256;
|
|
opsize := S_YMM;
|
|
|
|
Message2(asmr_w_check_mem_operand_automap_multiple_size, GetString(false), '"256 bit memory operand"');
|
|
end;
|
|
msiMem512:
|
|
begin
|
|
tx86operand(operands[i]).opsize := S_ZMM;
|
|
tx86operand(operands[i]).size := OS_M512;
|
|
opsize := S_ZMM;
|
|
end;
|
|
msiMultipleMinSize512:
|
|
begin
|
|
tx86operand(operands[i]).opsize := S_ZMM;
|
|
tx86operand(operands[i]).size := OS_M512;
|
|
opsize := S_ZMM;
|
|
|
|
Message2(asmr_w_check_mem_operand_automap_multiple_size, GetString(false), '"512 bit memory operand"');
|
|
end;
|
|
|
|
msiMemRegSize:
|
|
begin
|
|
// mem-ref-size = register size
|
|
for j := 1 to ops do
|
|
begin
|
|
if operands[j].Opr.Typ = OPR_REGISTER then
|
|
begin
|
|
if (tx86operand(operands[j]).opsize <> S_NO) and
|
|
(tx86operand(operands[j]).size <> OS_NO) then
|
|
begin
|
|
tx86operand(operands[i]).opsize := tx86operand(operands[j]).opsize;
|
|
tx86operand(operands[i]).size := tx86operand(operands[j]).size;
|
|
break;
|
|
end
|
|
else Message(asmr_e_unable_to_determine_reference_size);
|
|
end;
|
|
end;
|
|
end;
|
|
msiMemRegx16y32:
|
|
begin
|
|
for j := 1 to ops do
|
|
begin
|
|
if operands[j].Opr.Typ = OPR_REGISTER then
|
|
begin
|
|
case getsubreg(operands[j].opr.reg) of
|
|
R_SUBMMX: begin
|
|
tx86operand(operands[i]).opsize := S_W;
|
|
tx86operand(operands[i]).size := OS_M16;
|
|
break;
|
|
end;
|
|
R_SUBMMY: begin
|
|
tx86operand(operands[i]).opsize := S_L;
|
|
tx86operand(operands[i]).size := OS_M32;
|
|
break;
|
|
end;
|
|
else Message(asmr_e_unable_to_determine_reference_size);
|
|
end;
|
|
end;
|
|
end;
|
|
end;
|
|
msiMemRegx16y32z64:
|
|
begin
|
|
for j := 1 to ops do
|
|
begin
|
|
if operands[j].Opr.Typ = OPR_REGISTER then
|
|
begin
|
|
case getsubreg(operands[j].opr.reg) of
|
|
R_SUBMMX: begin
|
|
tx86operand(operands[i]).opsize := S_W;
|
|
tx86operand(operands[i]).size := OS_M16;
|
|
break;
|
|
end;
|
|
R_SUBMMY: begin
|
|
tx86operand(operands[i]).opsize := S_L;
|
|
tx86operand(operands[i]).size := OS_M32;
|
|
break;
|
|
end;
|
|
R_SUBMMZ: begin
|
|
tx86operand(operands[i]).opsize := S_Q;
|
|
tx86operand(operands[i]).size := OS_M64;
|
|
break;
|
|
end;
|
|
else Message(asmr_e_unable_to_determine_reference_size);
|
|
end;
|
|
end;
|
|
end;
|
|
end;
|
|
msiMemRegx32y64:
|
|
begin
|
|
for j := 1 to ops do
|
|
begin
|
|
if operands[j].Opr.Typ = OPR_REGISTER then
|
|
begin
|
|
case getsubreg(operands[j].opr.reg) of
|
|
R_SUBMMX: begin
|
|
tx86operand(operands[i]).opsize := S_L;
|
|
tx86operand(operands[i]).size := OS_M32;
|
|
break;
|
|
end;
|
|
R_SUBMMY: begin
|
|
tx86operand(operands[i]).opsize := S_Q;
|
|
tx86operand(operands[i]).size := OS_M64;
|
|
break;
|
|
end;
|
|
else Message(asmr_e_unable_to_determine_reference_size);
|
|
end;
|
|
end;
|
|
end;
|
|
end;
|
|
msiMemRegx32y64z128:
|
|
for j := 1 to ops do
|
|
begin
|
|
if operands[j].Opr.Typ = OPR_REGISTER then
|
|
begin
|
|
case getsubreg(operands[j].opr.reg) of
|
|
R_SUBMMX: begin
|
|
tx86operand(operands[i]).opsize := S_L;
|
|
tx86operand(operands[i]).size := OS_M32;
|
|
break;
|
|
end;
|
|
R_SUBMMY: begin
|
|
tx86operand(operands[i]).opsize := S_Q;
|
|
tx86operand(operands[i]).size := OS_M64;
|
|
break;
|
|
end;
|
|
R_SUBMMZ: begin
|
|
tx86operand(operands[i]).opsize := S_XMM;
|
|
tx86operand(operands[i]).size := OS_M128;
|
|
break;
|
|
end;
|
|
else Message(asmr_e_unable_to_determine_reference_size);
|
|
end;
|
|
end;
|
|
end;
|
|
msiMemRegx64y128:
|
|
begin
|
|
for j := 1 to ops do
|
|
begin
|
|
if operands[j].Opr.Typ = OPR_REGISTER then
|
|
begin
|
|
case getsubreg(operands[j].opr.reg) of
|
|
R_SUBMMX: begin
|
|
tx86operand(operands[i]).opsize := S_Q;
|
|
tx86operand(operands[i]).size := OS_M64;
|
|
break;
|
|
end;
|
|
R_SUBMMY: begin
|
|
tx86operand(operands[i]).opsize := S_XMM;
|
|
tx86operand(operands[i]).size := OS_M128;
|
|
break;
|
|
end;
|
|
else Message(asmr_e_unable_to_determine_reference_size);
|
|
end;
|
|
end;
|
|
end;
|
|
end;
|
|
msiMemRegx64y128z256:
|
|
begin
|
|
for j := 1 to ops do
|
|
begin
|
|
if operands[j].Opr.Typ = OPR_REGISTER then
|
|
begin
|
|
case getsubreg(operands[j].opr.reg) of
|
|
R_SUBMMX: begin
|
|
tx86operand(operands[i]).opsize := S_Q;
|
|
tx86operand(operands[i]).size := OS_M64;
|
|
break;
|
|
end;
|
|
R_SUBMMY: begin
|
|
tx86operand(operands[i]).opsize := S_XMM;
|
|
tx86operand(operands[i]).size := OS_M128;
|
|
break;
|
|
end;
|
|
R_SUBMMZ: begin
|
|
tx86operand(operands[i]).opsize := S_YMM;
|
|
tx86operand(operands[i]).size := OS_M256;
|
|
break;
|
|
end;
|
|
|
|
else Message(asmr_e_unable_to_determine_reference_size);
|
|
end;
|
|
end;
|
|
end;
|
|
end;
|
|
msiMemRegx64y256:
|
|
begin
|
|
for j := 1 to ops do
|
|
begin
|
|
if operands[j].Opr.Typ = OPR_REGISTER then
|
|
begin
|
|
case getsubreg(operands[j].opr.reg) of
|
|
R_SUBMMX: begin
|
|
tx86operand(operands[i]).opsize := S_Q;
|
|
tx86operand(operands[i]).size := OS_M64;
|
|
break;
|
|
end;
|
|
R_SUBMMY: begin
|
|
tx86operand(operands[i]).opsize := S_YMM;
|
|
tx86operand(operands[i]).size := OS_M256;
|
|
break;
|
|
end;
|
|
else Message(asmr_e_unable_to_determine_reference_size);
|
|
end;
|
|
end;
|
|
end;
|
|
end;
|
|
msiMemRegx64y256z512:
|
|
begin
|
|
for j := 1 to ops do
|
|
begin
|
|
if operands[j].Opr.Typ = OPR_REGISTER then
|
|
begin
|
|
case getsubreg(operands[j].opr.reg) of
|
|
R_SUBMMX: begin
|
|
tx86operand(operands[i]).opsize := S_Q;
|
|
tx86operand(operands[i]).size := OS_M64;
|
|
break;
|
|
end;
|
|
R_SUBMMY: begin
|
|
tx86operand(operands[i]).opsize := S_YMM;
|
|
tx86operand(operands[i]).size := OS_M256;
|
|
break;
|
|
end;
|
|
R_SUBMMZ: begin
|
|
tx86operand(operands[i]).opsize := S_ZMM;
|
|
tx86operand(operands[i]).size := OS_M512;
|
|
break;
|
|
end;
|
|
else Message(asmr_e_unable_to_determine_reference_size);
|
|
end;
|
|
end;
|
|
end;
|
|
end;
|
|
|
|
msiMemRegConst128,
|
|
msiMemRegConst256,
|
|
msiMemRegConst512:
|
|
begin
|
|
ExistConst := false;
|
|
for j := 1 to ops do
|
|
begin
|
|
if operands[j].Opr.Typ = OPR_CONSTANT then
|
|
begin
|
|
ExistConst := true;
|
|
break;
|
|
end;
|
|
end;
|
|
|
|
if ExistConst then
|
|
begin
|
|
for j := 1 to ops do
|
|
begin
|
|
if operands[j].Opr.Typ = OPR_REGISTER then
|
|
begin
|
|
if (tx86operand(operands[j]).opsize <> S_NO) and
|
|
(tx86operand(operands[j]).size <> OS_NO) then
|
|
begin
|
|
tx86operand(operands[i]).opsize := tx86operand(operands[j]).opsize;
|
|
tx86operand(operands[i]).size := tx86operand(operands[j]).size;
|
|
break;
|
|
end
|
|
else Message(asmr_e_unable_to_determine_reference_size);
|
|
end;
|
|
end;
|
|
end
|
|
else
|
|
begin
|
|
case MemRefInfo(opcode).MemRefSize of
|
|
msiMemRegConst128: begin
|
|
tx86operand(operands[i]).opsize := S_XMM;
|
|
tx86operand(operands[i]).size := OS_M128;
|
|
break;
|
|
end;
|
|
msiMemRegConst256: begin
|
|
tx86operand(operands[i]).opsize := S_YMM;
|
|
tx86operand(operands[i]).size := OS_M256;
|
|
break;
|
|
end;
|
|
msiMemRegConst512: begin
|
|
tx86operand(operands[i]).opsize := S_ZMM;
|
|
tx86operand(operands[i]).size := OS_M512;
|
|
break;
|
|
end;
|
|
else
|
|
Internalerror(2019081018);
|
|
end;
|
|
end;
|
|
end;
|
|
|
|
msiXMem32,
|
|
msiYMem32,
|
|
msiZMem32,
|
|
msiXMem64,
|
|
msiYMem64,
|
|
msiZMem64: ; // ignore; gather/scatter opcodes haven a fixed element-size, not a fixed memory-size
|
|
// the vector-register have indices with base of the memory-address in the memory-operand
|
|
msiNoSize: ; // all memory-sizes are ok
|
|
msiNoMemRef:; // ignore;
|
|
msiVMemMultiple,
|
|
msiVMemRegSize: ; // ignore
|
|
msiUnknown,
|
|
msiUnsupported,
|
|
msiMultiple: Message(asmr_e_unable_to_determine_reference_size); // TODO individual message
|
|
else
|
|
Internalerror(2019081008);
|
|
end;
|
|
end;
|
|
OPR_CONSTANT:
|
|
case MemRefInfo(opcode).ConstSize of
|
|
csiMem8: begin
|
|
tx86operand(operands[i]).opsize := S_B;
|
|
tx86operand(operands[i]).size := OS_8;
|
|
end;
|
|
csiMem16: begin
|
|
tx86operand(operands[i]).opsize := S_W;
|
|
tx86operand(operands[i]).size := OS_16;
|
|
end;
|
|
csiMem32: begin
|
|
tx86operand(operands[i]).opsize := S_L;
|
|
tx86operand(operands[i]).size := OS_32;
|
|
end;
|
|
{$ifdef x86_64}
|
|
csiMem64: begin
|
|
tx86operand(operands[i]).opsize := S_Q;
|
|
tx86operand(operands[i]).size := OS_64;
|
|
end;
|
|
{$else}
|
|
csiMem64: begin
|
|
internalerror(2019050910);
|
|
end;
|
|
{$endif}
|
|
csiUnknown, csiMultiple, csiNoSize:
|
|
;
|
|
end;
|
|
else
|
|
;
|
|
end;
|
|
end;
|
|
end;
|
|
end;
|
|
|
|
|
|
for i:=1 to ops do
|
|
begin
|
|
operands[i].SetCorrectSize(opcode);
|
|
if tx86operand(operands[i]).opsize=S_NO then
|
|
begin
|
|
{$ifdef x86_64}
|
|
if (opcode=A_MOVQ) and
|
|
(ops=2) and
|
|
(operands[1].opr.typ=OPR_CONSTANT) then
|
|
opsize:=S_Q
|
|
else
|
|
{$endif x86_64}
|
|
case operands[i].Opr.Typ of
|
|
OPR_LOCAL,
|
|
OPR_REFERENCE :
|
|
begin
|
|
{ for 3-operand opcodes, operand #1 (in ATT order) is always an immediate,
|
|
don't consider it. }
|
|
if i=ops then
|
|
operand2:=i-1
|
|
else
|
|
operand2:=i+1;
|
|
if operand2>0 then
|
|
begin
|
|
{ Only allow register as operand to take the size from }
|
|
if operands[operand2].opr.typ=OPR_REGISTER then
|
|
begin
|
|
if ((opcode<>A_MOVD) and
|
|
(opcode<>A_CVTSI2SS)) then
|
|
begin
|
|
//tx86operand(operands[i]).opsize:=tx86operand(operands[operand2]).opsize;
|
|
|
|
// torsten - 31.01.2012
|
|
// old: xmm/ymm-register operands have a opsize = "S_NO"
|
|
// new: xmm/ymm-register operands have a opsize = "S_XMM/S_YMM"
|
|
|
|
// any SSE- and AVX-opcodes have mixed operand sizes (e.g. cvtsd2ss xmmreg, xmmreg/m32)
|
|
// in this case is we need the old handling ("S_NO")
|
|
// =>> ignore
|
|
if (tx86operand(operands[operand2]).opsize <> S_XMM) and
|
|
(tx86operand(operands[operand2]).opsize <> S_YMM) and
|
|
(tx86operand(operands[operand2]).opsize <> S_ZMM) then
|
|
|
|
tx86operand(operands[i]).opsize:=tx86operand(operands[operand2]).opsize
|
|
else tx86operand(operands[operand2]).opsize := S_NO;
|
|
end;
|
|
end
|
|
else
|
|
begin
|
|
{ if no register then take the opsize (which is available with ATT),
|
|
if not availble then give an error }
|
|
if opsize<>S_NO then
|
|
tx86operand(operands[i]).opsize:=opsize
|
|
else
|
|
begin
|
|
if (m_delphi in current_settings.modeswitches) then
|
|
Message(asmr_w_unable_to_determine_reference_size_using_dword)
|
|
else
|
|
Message(asmr_e_unable_to_determine_reference_size);
|
|
{ recovery }
|
|
tx86operand(operands[i]).opsize:=S_L;
|
|
end;
|
|
end;
|
|
end
|
|
else
|
|
begin
|
|
if opsize<>S_NO then
|
|
tx86operand(operands[i]).opsize:=opsize
|
|
else if not(NoMemorySizeRequired(opcode) or
|
|
(opcode=A_JMP) or (opcode=A_JCC) or (opcode=A_CALL) or (opcode=A_LCALL) or (opcode=A_LJMP)) then
|
|
begin
|
|
if (m_delphi in current_settings.modeswitches) then
|
|
Message(asmr_w_unable_to_determine_reference_size_using_dword)
|
|
else
|
|
Message(asmr_e_unable_to_determine_reference_size);
|
|
{ recovery }
|
|
tx86operand(operands[i]).opsize:=S_L;
|
|
end;
|
|
end;
|
|
end;
|
|
OPR_SYMBOL :
|
|
begin
|
|
{ Fix lea which need a reference }
|
|
if opcode=A_LEA then
|
|
begin
|
|
s:=operands[i].opr.symbol;
|
|
so:=operands[i].opr.symofs;
|
|
operands[i].opr.typ:=OPR_REFERENCE;
|
|
Fillchar(operands[i].opr.ref,sizeof(treference),0);
|
|
operands[i].opr.ref.symbol:=s;
|
|
operands[i].opr.ref.offset:=so;
|
|
end;
|
|
{$if defined(x86_64)}
|
|
tx86operand(operands[i]).opsize:=S_Q;
|
|
{$elseif defined(i386)}
|
|
tx86operand(operands[i]).opsize:=S_L;
|
|
{$elseif defined(i8086)}
|
|
tx86operand(operands[i]).opsize:=S_W;
|
|
{$endif}
|
|
end;
|
|
else
|
|
;
|
|
end;
|
|
end;
|
|
end;
|
|
|
|
if MemRefInfo(opcode).ExistsSSEAVX then
|
|
begin
|
|
// validate broadcast-memory-operands
|
|
vbcst := 0;
|
|
mmregs := [];
|
|
|
|
for i := 1 to ops do
|
|
if operands[i].Opr.Typ in [OPR_REFERENCE, OPR_LOCAL] then vbcst := tx86operand(operands[i]).vbcst
|
|
else if operands[i].Opr.Typ = OPR_REGISTER then
|
|
begin
|
|
if getsubreg(operands[i].opr.reg) in [R_SUBMMX, R_SUBMMY, R_SUBMMZ] then
|
|
begin
|
|
include(mmregs, getsubreg(operands[i].opr.reg));
|
|
end;
|
|
end;
|
|
|
|
if vbcst <> 0 then
|
|
begin
|
|
// found broadcast-memory-operand (e.g. "{1to8}")
|
|
// check is correct
|
|
|
|
multiplicator := 0;
|
|
if mmregs = [R_SUBMMX] then multiplicator := 1
|
|
else if mmregs = [R_SUBMMY] then multiplicator := 2
|
|
else if mmregs = [R_SUBMMZ] then multiplicator := 4
|
|
else
|
|
begin
|
|
//TG TODO
|
|
|
|
end;
|
|
|
|
if MemRefInfo(opcode).BCSTTypes <> [] then
|
|
begin
|
|
str(MemRefInfo(opcode).BCSTXMMMultiplicator * multiplicator, bcst1);
|
|
str(vbcst, bcst2);
|
|
|
|
case vbcst of
|
|
2: if not(bt1to2 in MemRefInfo(opcode).BCSTTypes) then
|
|
Message2(asmr_e_mismatch_broadcasting_elements, '1to' + bcst1, '1to' + bcst2);
|
|
4: if not(bt1to4 in MemRefInfo(opcode).BCSTTypes) then
|
|
Message2(asmr_e_mismatch_broadcasting_elements, '1to' + bcst1, '1to' + bcst2);
|
|
8: if not(bt1to8 in MemRefInfo(opcode).BCSTTypes) then
|
|
Message2(asmr_e_mismatch_broadcasting_elements, '1to' + bcst1, '1to' + bcst2);
|
|
16: if not(bt1to16 in MemRefInfo(opcode).BCSTTypes) then
|
|
Message2(asmr_e_mismatch_broadcasting_elements, '1to' + bcst1, '1to' + bcst2);
|
|
end;
|
|
end
|
|
else if MemRefInfo(opcode).BCSTXMMMultiplicator * multiplicator <> vbcst then
|
|
begin
|
|
str(MemRefInfo(opcode).BCSTXMMMultiplicator * multiplicator, bcst1);
|
|
str(vbcst, bcst2);
|
|
Message2(asmr_e_mismatch_broadcasting_elements, '1to' + bcst1, '1to' + bcst2);
|
|
end;
|
|
end;
|
|
end;
|
|
|
|
|
|
end;
|
|
|
|
|
|
procedure Tx86Instruction.SetInstructionOpsize;
|
|
|
|
function CheckSSEAVX: Boolean;
|
|
var
|
|
i: integer;
|
|
iSizeMask: int64;
|
|
bBroadcastMemRef: boolean;
|
|
bExistMemRef: boolean;
|
|
ValidOpSizes: Set of topsize;
|
|
begin
|
|
Result := False;
|
|
|
|
with MemRefInfo(opcode) do
|
|
begin
|
|
if (ExistsSSEAVX) then
|
|
begin
|
|
bBroadcastMemRef := false;
|
|
for i := 1 to ops do
|
|
bBroadcastMemRef := bBroadcastMemRef or ((tx86operand(operands[i]).vopext and OTVE_VECTOR_BCST) = OTVE_VECTOR_BCST);
|
|
|
|
if bBroadcastMemRef then
|
|
begin
|
|
opsize := S_NO;
|
|
result := true;
|
|
end
|
|
else
|
|
begin
|
|
if (gas_needsuffix[opcode] = AttSufMMS) and (ops > 0) then
|
|
begin
|
|
// special handling = use source operand for calculate instructions-opsize
|
|
// e.g. vcvtsi2sd, vcvtsi2ss, vcvtusi2sd, vcvtusi2ss,
|
|
// vfpclass..
|
|
|
|
if (ops > 2) and
|
|
(tx86operand(operands[1]).opr.typ = OPR_CONSTANT) then
|
|
opsize:=tx86operand(operands[2]).opsize
|
|
else opsize:=tx86operand(operands[1]).opsize;
|
|
|
|
if (MemRefSize in [msiMultipleMinSize128, msiMultipleMinSize256, msiMultipleMinSize512]) and
|
|
(not(opsize in [S_XMM, S_YMM, S_ZMM])) then
|
|
begin
|
|
// special handling for external gas assembler, special opcodes (e.g. vfpclassps/pd)
|
|
case MemRefSize of
|
|
msiMultipleMinSize128: opsize := S_XMM;
|
|
msiMultipleMinSize256: opsize := S_YMM;
|
|
msiMultipleMinSize512: opsize := S_ZMM;
|
|
else;
|
|
end;
|
|
end;
|
|
|
|
result := true;
|
|
end
|
|
else if MemRefSize in MemRefMultiples - [msiVMemMultiple] then
|
|
begin
|
|
case ops of
|
|
2: begin
|
|
opsize:=tx86operand(operands[1]).opsize;
|
|
result := true;
|
|
end;
|
|
3,4:
|
|
begin
|
|
if (tx86operand(operands[1]).opr.typ <> OPR_CONSTANT) then
|
|
opsize:=tx86operand(operands[1]).opsize
|
|
else opsize:=tx86operand(operands[2]).opsize;
|
|
result := true;
|
|
end;
|
|
end;
|
|
|
|
if (result) and
|
|
(ops > 0) and
|
|
(MemRefSize in [msiMultipleMinSize128, msiMultipleMinSize256, msiMultipleMinSize512]) and
|
|
(gas_needsuffix[opcode] in [AttSufMMS, AttSufMMX]) then
|
|
begin
|
|
// external gas assembler need suffix (different opsizes possible)
|
|
// - in fpc not exists datatypes for vector-variables
|
|
// =>> all memsize = ok, but any special opcodes (marked with attSufMMS,attSUFMMX) needed in any combination of operandtypes the exact opsize
|
|
// =>> check instructions-opsize and use the correct vector-mem-opsize
|
|
|
|
for i := 1 to ops do
|
|
if tx86operand(operands[i]).opr.typ in [OPR_REGISTER] then
|
|
begin
|
|
ValidOpSizes := [];
|
|
|
|
case tx86operand(operands[i]).opsize of
|
|
S_XMM: iSizeMask := RegXMMSizeMask;
|
|
S_YMM: iSizeMask := RegYMMSizeMask;
|
|
S_ZMM: iSizeMask := RegZMMSizeMask;
|
|
else iSizeMask := 0;
|
|
end;
|
|
|
|
if iSizemask and OT_BITS128 = OT_BITS128 then include(ValidOpSizes, S_XMM);
|
|
if iSizemask and OT_BITS256 = OT_BITS256 then include(ValidOpSizes, S_YMM);
|
|
if iSizemask and OT_BITS512 = OT_BITS512 then include(ValidOpSizes, S_ZMM);
|
|
|
|
if (ValidOpsizes <> []) then
|
|
begin
|
|
if not(opsize in ValidOpSizes) then
|
|
begin
|
|
// instructions-opsize is invalid =>> use smallest valid opsize
|
|
if iSizemask and OT_BITS128 = OT_BITS128 then opsize := S_XMM
|
|
else if iSizemask and OT_BITS256 = OT_BITS256 then opsize := S_YMM
|
|
else if iSizemask and OT_BITS512 = OT_BITS512 then opsize := S_ZMM;
|
|
end;
|
|
end
|
|
else ; // empty ValidOpsize =>> nothing todo???
|
|
|
|
break;
|
|
end;
|
|
end;
|
|
end
|
|
else if
|
|
(gas_needsuffix[opcode] = AttSufNone) and
|
|
(not(MemRefSize in [msiMemRegSize])) then
|
|
begin
|
|
// external gnu-assembler: no suffix =>> use instructions.opsize to define memory-reference size
|
|
// Tx86Instruction: local variable: operand.opsize
|
|
|
|
for i := 1 to ops do
|
|
if tx86operand(operands[i]).opr.typ in [OPR_REFERENCE,OPR_LOCAL] then
|
|
begin
|
|
opsize := tx86operand(operands[i]).opsize;
|
|
result := true;
|
|
break;
|
|
end;
|
|
end;
|
|
end;
|
|
end;
|
|
end;
|
|
end;
|
|
|
|
begin
|
|
if opsize<>S_NO then
|
|
exit;
|
|
case ops of
|
|
0 : ;
|
|
1 :
|
|
begin
|
|
{ "push es" must be stored as a long PM }
|
|
if ((opcode=A_PUSH) or
|
|
(opcode=A_POP)) and
|
|
(operands[1].opr.typ=OPR_REGISTER) and
|
|
is_segment_reg(operands[1].opr.reg) then
|
|
{$ifdef i8086}
|
|
opsize:=S_W
|
|
{$else i8086}
|
|
opsize:=S_L
|
|
{$endif i8086}
|
|
else
|
|
opsize:=tx86operand(operands[1]).opsize;
|
|
end;
|
|
2 : begin
|
|
case opcode of
|
|
A_MOVZX,A_MOVSX :
|
|
begin
|
|
if tx86operand(operands[1]).opsize=S_NO then
|
|
begin
|
|
tx86operand(operands[1]).opsize:=S_B;
|
|
if (m_delphi in current_settings.modeswitches) then
|
|
Message(asmr_w_unable_to_determine_reference_size_using_byte)
|
|
else
|
|
Message(asmr_e_unable_to_determine_reference_size);
|
|
end;
|
|
case tx86operand(operands[1]).opsize of
|
|
S_W :
|
|
case tx86operand(operands[2]).opsize of
|
|
S_L :
|
|
opsize:=S_WL;
|
|
{$ifdef x86_64}
|
|
S_Q :
|
|
opsize:=S_WQ;
|
|
{$endif}
|
|
else
|
|
;
|
|
end;
|
|
S_B :
|
|
begin
|
|
case tx86operand(operands[2]).opsize of
|
|
S_W :
|
|
opsize:=S_BW;
|
|
S_L :
|
|
opsize:=S_BL;
|
|
{$ifdef x86_64}
|
|
S_Q :
|
|
opsize:=S_BQ;
|
|
{$endif}
|
|
else
|
|
;
|
|
end;
|
|
end;
|
|
else
|
|
;
|
|
end;
|
|
end;
|
|
A_MOVD : { movd is a move from a mmx register to a
|
|
32 bit register or memory, so no opsize is correct here PM }
|
|
exit;
|
|
A_MOVQ :
|
|
opsize:=S_IQ;
|
|
A_OUT :
|
|
opsize:=tx86operand(operands[1]).opsize;
|
|
else
|
|
if not CheckSSEAVX then
|
|
opsize:=tx86operand(operands[2]).opsize;
|
|
end;
|
|
end;
|
|
3,4 : if not CheckSSEAVX then
|
|
opsize:=tx86operand(operands[ops]).opsize;
|
|
end;
|
|
end;
|
|
|
|
|
|
procedure Tx86Instruction.CheckOperandSizes;
|
|
var
|
|
sizeerr : boolean;
|
|
i : longint;
|
|
begin
|
|
{ Check only the most common opcodes here, the others are done in
|
|
the assembler pass }
|
|
case opcode of
|
|
A_PUSH,A_POP,A_DEC,A_INC,A_NOT,A_NEG,
|
|
A_CMP,A_MOV,
|
|
A_ADD,A_SUB,A_ADC,A_SBB,
|
|
A_AND,A_OR,A_TEST,A_XOR: ;
|
|
else
|
|
exit;
|
|
end;
|
|
{ Handle the BW,BL,WL separatly }
|
|
sizeerr:=false;
|
|
{ special push/pop selector case }
|
|
if ((opcode=A_PUSH) or
|
|
(opcode=A_POP)) and
|
|
(operands[1].opr.typ=OPR_REGISTER) and
|
|
is_segment_reg(operands[1].opr.reg) then
|
|
exit;
|
|
if opsize in [S_BW,S_BL,S_WL] then
|
|
begin
|
|
if ops<>2 then
|
|
sizeerr:=true
|
|
else
|
|
begin
|
|
case opsize of
|
|
S_BW :
|
|
sizeerr:=(tx86operand(operands[1]).opsize<>S_B) or (tx86operand(operands[2]).opsize<>S_W);
|
|
S_BL :
|
|
sizeerr:=(tx86operand(operands[1]).opsize<>S_B) or (tx86operand(operands[2]).opsize<>S_L);
|
|
S_WL :
|
|
sizeerr:=(tx86operand(operands[1]).opsize<>S_W) or (tx86operand(operands[2]).opsize<>S_L);
|
|
{$ifdef x86_64}
|
|
S_BQ:
|
|
sizeerr:=(tx86operand(operands[1]).opsize<>S_B) or (tx86operand(operands[2]).opsize<>S_Q);
|
|
S_WQ:
|
|
sizeerr:=(tx86operand(operands[1]).opsize<>S_W) or (tx86operand(operands[2]).opsize<>S_Q);
|
|
S_LQ:
|
|
sizeerr:=(tx86operand(operands[1]).opsize<>S_L) or (tx86operand(operands[2]).opsize<>S_Q);
|
|
{$endif}
|
|
else
|
|
;
|
|
end;
|
|
end;
|
|
end
|
|
else
|
|
begin
|
|
for i:=1 to ops do
|
|
begin
|
|
if (operands[i].opr.typ<>OPR_CONSTANT) and
|
|
(tx86operand(operands[i]).opsize in [S_B,S_W,S_L]) and
|
|
(tx86operand(operands[i]).opsize<>opsize) then
|
|
sizeerr:=true;
|
|
end;
|
|
end;
|
|
if sizeerr then
|
|
begin
|
|
{ if range checks are on then generate an error }
|
|
if (cs_compilesystem in current_settings.moduleswitches) or
|
|
not (cs_check_range in current_settings.localswitches) then
|
|
Message(asmr_w_size_suffix_and_dest_dont_match)
|
|
else
|
|
Message(asmr_e_size_suffix_and_dest_dont_match);
|
|
end;
|
|
end;
|
|
|
|
|
|
{ This check must be done with the operand in ATT order
|
|
i.e.after swapping in the intel reader
|
|
but before swapping in the NASM and TASM writers PM }
|
|
procedure Tx86Instruction.CheckNonCommutativeOpcodes;
|
|
begin
|
|
if (
|
|
(ops=2) and
|
|
(operands[1].opr.typ=OPR_REGISTER) and
|
|
(operands[2].opr.typ=OPR_REGISTER) and
|
|
{ if the first is ST and the second is also a register
|
|
it is necessarily ST1 .. ST7 }
|
|
((operands[1].opr.reg=NR_ST) or
|
|
(operands[1].opr.reg=NR_ST0))
|
|
) or
|
|
(ops=0) then
|
|
if opcode=A_FSUBR then
|
|
opcode:=A_FSUB
|
|
else if opcode=A_FSUB then
|
|
opcode:=A_FSUBR
|
|
else if opcode=A_FDIVR then
|
|
opcode:=A_FDIV
|
|
else if opcode=A_FDIV then
|
|
opcode:=A_FDIVR
|
|
else if opcode=A_FSUBRP then
|
|
opcode:=A_FSUBP
|
|
else if opcode=A_FSUBP then
|
|
opcode:=A_FSUBRP
|
|
else if opcode=A_FDIVRP then
|
|
opcode:=A_FDIVP
|
|
else if opcode=A_FDIVP then
|
|
opcode:=A_FDIVRP;
|
|
if (
|
|
(ops=1) and
|
|
(operands[1].opr.typ=OPR_REGISTER) and
|
|
(getregtype(operands[1].opr.reg)=R_FPUREGISTER) and
|
|
(operands[1].opr.reg<>NR_ST) and
|
|
(operands[1].opr.reg<>NR_ST0)
|
|
) then
|
|
if opcode=A_FSUBRP then
|
|
opcode:=A_FSUBP
|
|
else if opcode=A_FSUBP then
|
|
opcode:=A_FSUBRP
|
|
else if opcode=A_FDIVRP then
|
|
opcode:=A_FDIVP
|
|
else if opcode=A_FDIVP then
|
|
opcode:=A_FDIVRP;
|
|
end;
|
|
|
|
procedure Tx86Instruction.FixupOpcode;
|
|
begin
|
|
{ does nothing by default }
|
|
end;
|
|
|
|
{*****************************************************************************
|
|
opcode Adding
|
|
*****************************************************************************}
|
|
|
|
function Tx86Instruction.ConcatInstruction(p : TAsmList) : tai;
|
|
var
|
|
siz : topsize;
|
|
i : longint;
|
|
asize : int64;
|
|
ai : taicpu;
|
|
begin
|
|
ConcatInstruction:=nil;
|
|
|
|
ai:=nil;
|
|
for i:=1 to Ops do
|
|
if not operands[i].CheckOperand(self) then
|
|
exit;
|
|
|
|
{ Get Opsize }
|
|
if (opsize<>S_NO) or (Ops=0) then
|
|
siz:=opsize
|
|
else
|
|
begin
|
|
if (Ops=2) and (operands[1].opr.typ=OPR_REGISTER) then
|
|
siz:=tx86operand(operands[1]).opsize
|
|
else
|
|
siz:=tx86operand(operands[Ops]).opsize;
|
|
{ MOVD should be of size S_LQ or S_QL, but these do not exist PM }
|
|
if (ops=2) and
|
|
(tx86operand(operands[1]).opsize<>S_NO) and
|
|
(tx86operand(operands[2]).opsize<>S_NO) and
|
|
(tx86operand(operands[1]).opsize<>tx86operand(operands[2]).opsize) then
|
|
siz:=S_NO;
|
|
end;
|
|
|
|
if ((opcode=A_MOVD)or
|
|
(opcode=A_CVTSI2SS)) and
|
|
((tx86operand(operands[1]).opsize=S_NO) or
|
|
(tx86operand(operands[2]).opsize=S_NO)) then
|
|
siz:=S_NO;
|
|
{ NASM does not support FADD without args
|
|
as alias of FADDP
|
|
and GNU AS interprets FADD without operand differently
|
|
for version 2.9.1 and 2.9.5 !! }
|
|
if (ops=0) and
|
|
((opcode=A_FADD) or
|
|
(opcode=A_FMUL) or
|
|
(opcode=A_FSUB) or
|
|
(opcode=A_FSUBR) or
|
|
(opcode=A_FDIV) or
|
|
(opcode=A_FDIVR)) then
|
|
begin
|
|
if opcode=A_FADD then
|
|
opcode:=A_FADDP
|
|
else if opcode=A_FMUL then
|
|
opcode:=A_FMULP
|
|
else if opcode=A_FSUB then
|
|
opcode:=A_FSUBP
|
|
else if opcode=A_FSUBR then
|
|
opcode:=A_FSUBRP
|
|
else if opcode=A_FDIV then
|
|
opcode:=A_FDIVP
|
|
else if opcode=A_FDIVR then
|
|
opcode:=A_FDIVRP;
|
|
message1(asmr_w_fadd_to_faddp,std_op2str[opcode]);
|
|
end;
|
|
|
|
{It is valid to specify some instructions without operand size.}
|
|
if siz=S_NO then
|
|
begin
|
|
if (ops=1) and (opcode=A_INT) then
|
|
siz:=S_B;
|
|
if (ops=1) and (opcode=A_XABORT) then
|
|
siz:=S_B;
|
|
{$ifdef i8086}
|
|
if (ops=1) and (opcode=A_BRKEM) then
|
|
siz:=S_B;
|
|
{$endif i8086}
|
|
if (ops=1) and (opcode=A_RET) or (opcode=A_RETN) or (opcode=A_RETF) or
|
|
(opcode=A_RETW) or (opcode=A_RETNW) or (opcode=A_RETFW) or
|
|
{$ifndef x86_64}
|
|
(opcode=A_RETD) or (opcode=A_RETND) or
|
|
{$endif x86_64}
|
|
(opcode=A_RETFD)
|
|
{$ifdef x86_64}
|
|
or (opcode=A_RETQ) or (opcode=A_RETNQ) or (opcode=A_RETFQ)
|
|
{$endif x86_64}
|
|
then
|
|
siz:=S_W;
|
|
if (ops=1) and (opcode=A_PUSH) then
|
|
begin
|
|
{$ifdef i8086}
|
|
if (tx86operand(operands[1]).opr.val>=-128) and (tx86operand(operands[1]).opr.val<=127) then
|
|
begin
|
|
siz:=S_B;
|
|
message(asmr_w_unable_to_determine_constant_size_using_byte);
|
|
end
|
|
else
|
|
begin
|
|
siz:=S_W;
|
|
message(asmr_w_unable_to_determine_constant_size_using_word);
|
|
end;
|
|
{$else i8086}
|
|
{ We are a 32 compiler, assume 32-bit by default. This is Delphi
|
|
compatible but bad coding practise.}
|
|
|
|
siz:=S_L;
|
|
message(asmr_w_unable_to_determine_reference_size_using_dword);
|
|
{$endif i8086}
|
|
end;
|
|
if (opcode=A_JMP) or (opcode=A_JCC) or (opcode=A_CALL) then
|
|
if ops=1 then
|
|
siz:=S_NEAR
|
|
else
|
|
siz:=S_FAR;
|
|
end;
|
|
|
|
{ GNU AS interprets FDIV without operand differently
|
|
for version 2.9.1 and 2.10
|
|
we add explicit args to it !! }
|
|
if (ops=0) and
|
|
((opcode=A_FSUBP) or
|
|
(opcode=A_FSUBRP) or
|
|
(opcode=A_FDIVP) or
|
|
(opcode=A_FDIVRP) or
|
|
(opcode=A_FSUB) or
|
|
(opcode=A_FSUBR) or
|
|
(opcode=A_FADD) or
|
|
(opcode=A_FADDP) or
|
|
(opcode=A_FDIV) or
|
|
(opcode=A_FDIVR)) then
|
|
begin
|
|
message1(asmr_w_adding_explicit_args_fXX,std_op2str[opcode]);
|
|
ops:=2;
|
|
operands[1].opr.typ:=OPR_REGISTER;
|
|
operands[2].opr.typ:=OPR_REGISTER;
|
|
operands[1].opr.reg:=NR_ST0;
|
|
operands[2].opr.reg:=NR_ST1;
|
|
end;
|
|
if (ops=1) and
|
|
(
|
|
(operands[1].opr.typ=OPR_REGISTER) and
|
|
(getregtype(operands[1].opr.reg)=R_FPUREGISTER) and
|
|
(operands[1].opr.reg<>NR_ST) and
|
|
(operands[1].opr.reg<>NR_ST0)
|
|
) and
|
|
(
|
|
(opcode=A_FSUBP) or
|
|
(opcode=A_FSUBRP) or
|
|
(opcode=A_FDIVP) or
|
|
(opcode=A_FDIVRP) or
|
|
(opcode=A_FADDP) or
|
|
(opcode=A_FMULP)
|
|
) then
|
|
begin
|
|
message1(asmr_w_adding_explicit_first_arg_fXX,std_op2str[opcode]);
|
|
ops:=2;
|
|
operands[2].opr.typ:=OPR_REGISTER;
|
|
operands[2].opr.reg:=operands[1].opr.reg;
|
|
operands[1].opr.reg:=NR_ST0;
|
|
end;
|
|
|
|
if (ops=1) and
|
|
(
|
|
(operands[1].opr.typ=OPR_REGISTER) and
|
|
(getregtype(operands[1].opr.reg)=R_FPUREGISTER) and
|
|
(operands[1].opr.reg<>NR_ST) and
|
|
(operands[1].opr.reg<>NR_ST0)
|
|
) and
|
|
(
|
|
(opcode=A_FSUB) or
|
|
(opcode=A_FSUBR) or
|
|
(opcode=A_FDIV) or
|
|
(opcode=A_FDIVR) or
|
|
(opcode=A_FADD) or
|
|
(opcode=A_FMUL)
|
|
) then
|
|
begin
|
|
message1(asmr_w_adding_explicit_second_arg_fXX,std_op2str[opcode]);
|
|
ops:=2;
|
|
operands[2].opr.typ:=OPR_REGISTER;
|
|
operands[2].opr.reg:=NR_ST0;
|
|
end;
|
|
|
|
{ Check for 'POP CS' }
|
|
if (opcode=A_POP) and (ops=1) and (operands[1].opr.typ=OPR_REGISTER) and
|
|
(operands[1].opr.reg=NR_CS) then
|
|
{$ifdef i8086}
|
|
{ On i8086 we print only a warning, because 'POP CS' works on 8086 and 8088
|
|
CPUs, but isn't supported on any later CPU }
|
|
Message(asmr_w_pop_cs_not_portable);
|
|
{$else i8086}
|
|
{ On the i386 and x86_64 targets, we print out an error, because no CPU,
|
|
supported by these targets support 'POP CS' }
|
|
Message(asmr_e_pop_cs_not_valid);
|
|
{$endif i8086}
|
|
|
|
{ I tried to convince Linus Torvalds to add
|
|
code to support ENTER instruction
|
|
(when raising a stack page fault)
|
|
but he replied that ENTER is a bad instruction and
|
|
Linux does not need to support it
|
|
So I think its at least a good idea to add a warning
|
|
if someone uses this in assembler code
|
|
FPC itself does not use it at all PM }
|
|
if (opcode=A_ENTER) and
|
|
(target_info.system in [system_i386_linux,system_i386_FreeBSD,system_i386_android]) then
|
|
Message(asmr_w_enter_not_supported_by_linux);
|
|
|
|
ai:=taicpu.op_none(opcode,siz);
|
|
ai.fileinfo:=filepos;
|
|
ai.SetOperandOrder(op_att);
|
|
ai.Ops:=Ops;
|
|
ai.Allocate_oper(Ops);
|
|
for i:=1 to Ops do
|
|
begin
|
|
ai.oper[i-1]^.vopext := (operands[i] as tx86operand).vopext;
|
|
|
|
case operands[i].opr.typ of
|
|
OPR_CONSTANT :
|
|
ai.loadconst(i-1,operands[i].opr.val);
|
|
OPR_REGISTER:
|
|
ai.loadreg(i-1,operands[i].opr.reg);
|
|
OPR_SYMBOL:
|
|
{$ifdef i8086}
|
|
if operands[i].opr.symseg then
|
|
taicpu(ai).loadsegsymbol(i-1,operands[i].opr.symbol)
|
|
else
|
|
{$endif i8086}
|
|
ai.loadsymbol(i-1,operands[i].opr.symbol,operands[i].opr.symofs);
|
|
OPR_LOCAL :
|
|
with operands[i].opr do
|
|
begin
|
|
ai.loadlocal(i-1,localsym,localsymofs,localindexreg,
|
|
localscale,localgetoffset,localforceref);
|
|
ai.oper[i-1]^.localoper^.localsegment:=localsegment;
|
|
|
|
// check for embedded broadcast
|
|
if MemRefInfo(opcode).ExistsSSEAVX then
|
|
begin
|
|
asize := 0;
|
|
|
|
if ((operands[i] as tx86operand).vopext and OTVE_VECTOR_BCST = OTVE_VECTOR_BCST) and
|
|
(MemRefInfo(opcode).MemRefSizeBCST in [msbBCST32,msbBCST64]) then
|
|
begin
|
|
case operands[i].size of
|
|
OS_32,OS_M32: asize:=OT_BITS32;
|
|
OS_64,OS_M64: asize:=OT_BITS64;
|
|
else;
|
|
end;
|
|
end;
|
|
|
|
if asize<>0 then
|
|
//ai.oper[i-1]^.ot:=(ai.oper[i-1]^.ot and not OT_SIZE_MASK) or asize;
|
|
ai.oper[i-1]^.ot:=(ai.oper[i-1]^.ot and OT_NON_SIZE) or asize;
|
|
end;
|
|
end;
|
|
OPR_REFERENCE:
|
|
begin
|
|
|
|
if current_settings.optimizerswitches <> [] then
|
|
if (not(MemRefInfo(opcode).MemRefSize in MemRefSizeInfoVMems)) and (opcode<>A_XLAT) and not is_x86_string_op(opcode) then
|
|
optimize_ref(operands[i].opr.ref,true);
|
|
|
|
ai.loadref(i-1,operands[i].opr.ref);
|
|
if operands[i].size<>OS_NO then
|
|
begin
|
|
asize:=0;
|
|
case operands[i].size of
|
|
OS_8,OS_S8 :
|
|
asize:=OT_BITS8;
|
|
OS_16,OS_S16, OS_M16:
|
|
asize:=OT_BITS16;
|
|
OS_32,OS_S32 :
|
|
{$ifdef i8086}
|
|
if siz=S_FAR then
|
|
asize:=OT_FAR
|
|
else
|
|
asize:=OT_BITS32;
|
|
{$else i8086}
|
|
asize:=OT_BITS32;
|
|
{$endif i8086}
|
|
OS_F32,OS_M32 :
|
|
asize:=OT_BITS32;
|
|
OS_64,OS_S64:
|
|
begin
|
|
{ Only FPU and SSE/AVX operations know about 64bit
|
|
values, for all integer operations it is seen as 32bit
|
|
|
|
this applies only to i386, see tw16622}
|
|
|
|
if (gas_needsuffix[opcode] in [attsufFPU,attsufFPUint]) or (MemRefInfo(opcode).ExistsSSEAVX) then
|
|
asize:=OT_BITS64
|
|
{$ifdef i386}
|
|
else
|
|
asize:=OT_BITS32
|
|
{$endif i386}
|
|
;
|
|
end;
|
|
OS_F64,OS_C64, OS_M64 :
|
|
asize:=OT_BITS64;
|
|
OS_F80 :
|
|
asize:=OT_BITS80;
|
|
OS_128,OS_M128:
|
|
asize := OT_BITS128;
|
|
OS_M256:
|
|
asize := OT_BITS256;
|
|
OS_M512:
|
|
asize := OT_BITS512;
|
|
else
|
|
;
|
|
end;
|
|
if asize<>0 then
|
|
ai.oper[i-1]^.ot:=(ai.oper[i-1]^.ot and OT_NON_SIZE) or asize;
|
|
end;
|
|
end;
|
|
else
|
|
;
|
|
end;
|
|
|
|
|
|
end;
|
|
|
|
{ Condition ? }
|
|
if condition<>C_None then
|
|
ai.SetCondition(condition);
|
|
|
|
{ Set is_jmp, it enables asmwriter to emit short jumps if appropriate }
|
|
if (opcode=A_JMP) or (opcode=A_JCC) then
|
|
ai.is_jmp := True;
|
|
|
|
{ Concat the opcode or give an error }
|
|
if assigned(ai) then
|
|
p.concat(ai)
|
|
else
|
|
Message(asmr_e_invalid_opcode_and_operand);
|
|
result:=ai;
|
|
end;
|
|
|
|
function Tx86Instruction.getstring(aAddMemRefSize: boolean): string;
|
|
var
|
|
i : longint;
|
|
s, sval : string;
|
|
regnr: string;
|
|
addsize : boolean;
|
|
begin
|
|
s:='['+std_op2str[opcode];
|
|
for i:=1 to ops do
|
|
begin
|
|
with operands[i] as Tx86Operand do
|
|
begin
|
|
if i=1 then
|
|
s:=s+' '
|
|
else
|
|
s:=s+',';
|
|
{ type }
|
|
addsize:=false;
|
|
|
|
case operands[i].opr.typ of
|
|
OPR_CONSTANT : begin
|
|
str(operands[i].opr.val, sval);
|
|
s:=s+ sval;
|
|
end;
|
|
OPR_REGISTER : begin
|
|
regnr := '';
|
|
str(getsupreg(opr.reg),regnr);
|
|
|
|
if getsubreg(opr.reg)= R_SUBMMX then
|
|
s:=s+'xmmreg' + regnr
|
|
else
|
|
if getsubreg(opr.reg)= R_SUBMMY then
|
|
s:=s+'ymmreg' + regnr
|
|
else
|
|
if getsubreg(opr.reg)= R_SUBMMZ then
|
|
s:=s+'zmmreg' + regnr
|
|
else
|
|
if getregtype(opr.reg)= R_MMXREGISTER then
|
|
s:=s+'mmxreg'
|
|
else
|
|
if getregtype(opr.reg)= R_FPUREGISTER then
|
|
s:=s+'fpureg'
|
|
else
|
|
if getregtype(opr.reg)=R_INTREGISTER then
|
|
begin
|
|
s:=s+'reg';
|
|
addsize:=true;
|
|
end
|
|
else
|
|
if getregtype(opr.reg)=R_ADDRESSREGISTER then
|
|
begin
|
|
s:=s+'k' + regnr;
|
|
end;
|
|
|
|
end;
|
|
OPR_LOCAL,
|
|
OPR_REFERENCE: begin
|
|
s:=s + 'mem';
|
|
|
|
if aAddMemRefSize then
|
|
addsize:=true;
|
|
end;
|
|
else s:=s + '???';
|
|
end;
|
|
|
|
if addsize then
|
|
begin
|
|
sval := '';
|
|
str(tcgsize2size[size], sval);
|
|
|
|
s := s + sval;
|
|
end;
|
|
|
|
if vopext <> 0 then
|
|
begin
|
|
str(vopext and $07, regnr);
|
|
if vopext and OTVE_VECTOR_WRITEMASK = OTVE_VECTOR_WRITEMASK then
|
|
s := s + ' {k' + regnr + '}';
|
|
|
|
if vopext and OTVE_VECTOR_ZERO = OTVE_VECTOR_ZERO then
|
|
s := s + ' {z}';
|
|
|
|
if vopext and OTVE_VECTOR_SAE = OTVE_VECTOR_SAE then
|
|
s := s + ' {sae}';
|
|
|
|
|
|
if vopext and OTVE_VECTOR_BCST = OTVE_VECTOR_BCST then
|
|
case vopext and OTVE_VECTOR_BCST_MASK of
|
|
OTVE_VECTOR_BCST2: s := s + ' {1to2}';
|
|
OTVE_VECTOR_BCST4: s := s + ' {1to4}';
|
|
OTVE_VECTOR_BCST8: s := s + ' {1to8}';
|
|
OTVE_VECTOR_BCST16: s := s + ' {1to16}';
|
|
end;
|
|
|
|
if vopext and OTVE_VECTOR_ER = OTVE_VECTOR_ER then
|
|
case vopext and OTVE_VECTOR_ER_MASK of
|
|
OTVE_VECTOR_RNSAE: s := s + ' {rn-sae}';
|
|
OTVE_VECTOR_RDSAE: s := s + ' {rd-sae}';
|
|
OTVE_VECTOR_RUSAE: s := s + ' {ru-sae}';
|
|
OTVE_VECTOR_RZSAE: s := s + ' {rz-sae}';
|
|
end;
|
|
|
|
end;
|
|
end;
|
|
end;
|
|
GetString:=s+']';
|
|
end;
|
|
|
|
function Tx86Instruction.MightHaveExtension: boolean;
|
|
|
|
begin
|
|
Result:=aasmcpu.MightHaveExtension(opcode);
|
|
end;
|
|
|
|
end.
|