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90 lines
3.0 KiB
ObjectPascal
90 lines
3.0 KiB
ObjectPascal
{
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Copyright (c) 1998-2020 by Florian Klaempfl
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Generate xtensa assembler for in memory related nodes
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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unit ncpumem;
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{$i fpcdefs.inc}
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interface
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uses
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globtype,
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cgbase,cpubase,
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symtype,
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nmem,ncgmem;
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type
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tcpuvecnode = class(tcgvecnode)
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procedure update_reference_reg_mul(maybe_const_reg: tregister; regsize: tdef; l: aint);override;
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end;
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implementation
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uses
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cutils,verbose,
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aasmdata,aasmcpu,
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cgutils,cgobj,
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symconst,symcpu;
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{*****************************************************************************
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TCPUVECNODE
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*****************************************************************************}
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procedure tcpuvecnode.update_reference_reg_mul(maybe_const_reg: tregister; regsize: tdef; l: aint);
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var
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hreg: tregister;
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op: TAsmOp;
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begin
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if (l in [2,4,8]) and ((location.reference.base<>NR_NO) or (location.reference.index<>NR_NO)) then
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begin
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case l of
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2 : op:=A_ADDX2;
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4 : op:=A_ADDX4;
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8 : op:=A_ADDX8;
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else
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Internalerror(2020042201);
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end;
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hreg:=cg.getaddressregister(current_asmdata.CurrAsmList);
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if location.reference.base<>NR_NO then
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begin
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(op,hreg,maybe_const_reg,location.reference.base));
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location.reference.base:=hreg;
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end
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else if location.reference.index<>NR_NO then
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begin
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(op,hreg,maybe_const_reg,location.reference.index));
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location.reference.index:=hreg;
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end
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else
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Internalerror(2020042214);
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{ update alignment }
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if (location.reference.alignment=0) then
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internalerror(2020042217);
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location.reference.alignment:=newalignment(location.reference.alignment,l);
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end
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else
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inherited update_reference_reg_mul(maybe_const_reg,regsize,l);
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end;
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begin
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cvecnode:=tcpuvecnode;
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end.
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