mirror of
https://gitlab.com/freepascal.org/fpc/source.git
synced 2025-04-05 15:47:54 +02:00
a7c0fa0def
+ Added postfix parsing in tattreader.GetToken
- Removed all postfixed versions of OpCodes from the instruction list
+ Added all missing OpCodes from Xtensa ISA
* Changed branch OpCode to A_B, similar to ARM
+ Added missing branch condition flags BCI and BSI
* Updated existing compiler code that referred to the old postfixed instructions
+ Added prefix and postfix handling in TxtensaInstrWriter.WriteInstruction
* Updated TCPUAddNode.second_addfloat to specify .S postfix
* Updated tcpuunaryminusnode.second_float to specify .S postfix
+ Implemented prefix and postfix identification in txtensaattreader.is_asmopcode
* Adapted branch condition extraction to respect postfixes
* Changed itcpugas to call findreg_by_name_table from raatt.pas (same as issue #0037121, difficult to test these changes without including a fix for the register name search problem)
git-svn-id: trunk@45672 -
193 lines
1.5 KiB
SQL
193 lines
1.5 KiB
SQL
(
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A_NONE,
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A_ABS,
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A_ADD,
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A_ADDI,
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A_ADDMI,
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A_ADDX2,
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A_ADDX4,
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A_ADDX8,
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A_ALL4,
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A_ALL8,
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A_AND,
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A_ANDB,
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A_ANDBC,
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A_ANY4,
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A_ANY8,
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A_B,
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A_BREAK,
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A_CALL0,
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A_CALL4,
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A_CALL8,
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A_CALL12,
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A_CALLX0,
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A_CALLX4,
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A_CALLX8,
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A_CALLX12,
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A_CEIL,
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A_CLAMPS,
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A_DHI,
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A_DHU,
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A_DHWB,
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A_DHWBI,
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A_DII,
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A_DIU,
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A_DIWB,
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A_DIWBI,
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A_DPFL,
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A_DPFR,
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A_DPFRO,
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A_DPW,
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A_DPWO,
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A_DSYNC,
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A_ENTRY,
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A_ESYNC,
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A_EXCW,
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A_EXTUI,
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A_EXTW,
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A_FLOAT,
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A_FLOOR,
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A_IDTLB,
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A_IHI,
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A_IHU,
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A_III,
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A_IITLB,
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A_IIU,
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A_ILL,
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A_IPF,
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A_IPFL,
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A_ISYNC,
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A_J,
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A_JX,
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A_L8UI,
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A_L16SI,
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A_L16UI,
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A_L32AI,
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A_L32E,
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A_L32I,
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A_L32R,
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A_LDCT,
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A_LDDEC,
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A_LDINC,
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A_LICT,
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A_LICW,
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A_LOOP,
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A_LOOPGTZ,
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A_LOOPNEZ,
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A_LSI,
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A_LSIU,
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A_LSX,
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A_LSXU,
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A_MADD,
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A_MAX,
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A_MAXU,
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A_MEMW,
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A_MIN,
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A_MINU,
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A_MOV,
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A_MOVEQZ,
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A_MOVF,
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A_MOVGEZ,
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A_MOVI,
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A_MOVLTZ,
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A_MOVNEZ,
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A_MOVSP,
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A_MOVT,
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A_MSUB,
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A_MUL,
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A_MUL16,
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A_MULA,
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A_MULL,
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A_MULS,
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A_MULSH,
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A_MULUH,
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A_NEG,
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A_NOP,
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A_NSA,
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A_NSAU,
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A_OEQ,
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A_OLE,
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A_OLT,
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A_OR,
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A_ORB,
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A_ORBC,
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A_PDTLB,
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A_PITLB,
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A_QUOS,
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A_QUOU,
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A_RDTLB0,
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A_RDTLB1,
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A_REMS,
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A_REMU,
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A_RET,
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A_RETW,
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A_RFDD,
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A_RFDE,
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A_RFE,
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A_RFI,
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A_RFME,
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A_RFR,
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A_RFUE,
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A_RFWO,
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A_RFWU,
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A_RITLB0,
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A_RITLB1,
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A_ROTW,
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A_ROUND,
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A_RSIL,
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A_RSR,
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A_RUR,
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A_S8I,
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A_S16I,
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A_S32C1I,
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A_S32E,
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A_S32I,
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A_S32RI,
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A_SDCT,
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A_SEXT,
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A_SICT,
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A_SICW,
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A_SIMCALL,
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A_SLL,
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A_SLLI,
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A_SRA,
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A_SRAI,
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A_SRC,
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A_SRL,
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A_SRLI,
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A_SSA8B,
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A_SSA8L,
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A_SSAI,
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A_SSI,
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A_SSIU,
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A_SSL,
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A_SSR,
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A_SSX,
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A_SSXU,
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A_SUB,
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A_SUBX2,
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A_SUBX4,
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A_SUBX8,
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A_SYSCALL,
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A_TRUNC,
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A_UEQ,
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A_UFLOAT,
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A_ULE,
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A_ULT,
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A_UMUL,
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A_UN,
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A_UTRUNC,
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A_WAITI,
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A_WDTLB,
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A_WER,
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A_WFR,
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A_WITLB,
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A_WSR,
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A_WUR,
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A_XOR,
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A_XORB,
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A_XSR
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);
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