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493 lines
17 KiB
ObjectPascal
493 lines
17 KiB
ObjectPascal
{
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Copyright (c) 1998-2002 by Jonas Maebe, member of the Free Pascal
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Development Team
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This unit implements the Z80 optimizer object
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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Unit aoptcpu;
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{$i fpcdefs.inc}
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{$ifdef EXTDEBUG}
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{$define DEBUG_AOPTCPU}
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{$endif EXTDEBUG}
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Interface
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uses cpubase, cgbase, aasmtai, aopt,AoptObj, aoptcpub;
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Type
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TCpuAsmOptimizer = class(TAsmOptimizer)
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{ outputs a debug message into the assembler file }
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procedure DebugMsg(const s: string; p: tai);
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{ checks whether loading a new value in reg1 overwrites the entirety of reg2 }
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function Reg1WriteOverwritesReg2Entirely(reg1, reg2: tregister): boolean;
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Function GetNextInstructionUsingReg(Current: tai; Var Next: tai;reg : TRegister): Boolean;
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function RegLoadedWithNewValue(reg : tregister; hp : tai) : boolean; override;
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function InstructionLoadsFromReg(const reg : TRegister; const hp : tai) : boolean; override;
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{ uses the same constructor as TAopObj }
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function PeepHoleOptPass1Cpu(var p: tai): boolean; override;
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procedure PeepHoleOptPass2;override;
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End;
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Implementation
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uses
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cutils,
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verbose,
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cpuinfo,
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aasmbase,aasmcpu,aasmdata,
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globals,globtype,
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cgutils;
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type
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TAsmOpSet = set of TAsmOp;
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function CanBeCond(p : tai) : boolean;
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begin
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result:=(p.typ=ait_instruction) and (taicpu(p).condition=C_None);
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end;
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function RefsEqual(const r1, r2: treference): boolean;
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begin
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refsequal :=
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(r1.offset = r2.offset) and
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(r1.base = r2.base) and
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(r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
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(r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
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(r1.relsymbol = r2.relsymbol);
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end;
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function MatchOperand(const oper1: TOper; const oper2: TOper): boolean; inline;
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begin
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result:=oper1.typ=oper2.typ;
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if result then
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case oper1.typ of
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top_const:
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Result:=oper1.val = oper2.val;
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top_reg:
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Result:=oper1.reg = oper2.reg;
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top_ref:
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Result:=RefsEqual(oper1.ref^, oper2.ref^);
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else Result:=false;
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end
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end;
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function MatchOperand(const oper: TOper; const reg: TRegister): boolean; inline;
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begin
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result := (oper.typ = top_reg) and (oper.reg = reg);
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end;
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function MatchInstruction(const instr: tai; const op: TAsmOp): boolean;
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begin
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result :=
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(instr.typ = ait_instruction) and
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(taicpu(instr).opcode = op);
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end;
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function MatchInstruction(const instr: tai; const ops: TAsmOpSet): boolean;
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begin
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result :=
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(instr.typ = ait_instruction) and
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(taicpu(instr).opcode in ops);
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end;
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function MatchInstruction(const instr: tai; const ops: TAsmOpSet;opcount : byte): boolean;
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begin
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result :=
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(instr.typ = ait_instruction) and
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(taicpu(instr).opcode in ops) and
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(taicpu(instr).ops=opcount);
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end;
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function MatchOpType(const instr : tai;ot0,ot1 : toptype) : Boolean;
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begin
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Result:=(taicpu(instr).ops=2) and
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(taicpu(instr).oper[0]^.typ=ot0) and
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(taicpu(instr).oper[1]^.typ=ot1);
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end;
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{$ifdef DEBUG_AOPTCPU}
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procedure TCpuAsmOptimizer.DebugMsg(const s: string;p : tai);
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begin
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asml.insertbefore(tai_comment.Create(strpnew(s)), p);
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end;
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{$else DEBUG_AOPTCPU}
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procedure TCpuAsmOptimizer.DebugMsg(const s: string;p : tai);inline;
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begin
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end;
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{$endif DEBUG_AOPTCPU}
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function TCpuAsmOptimizer.Reg1WriteOverwritesReg2Entirely(reg1, reg2: tregister): boolean;
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begin
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case reg1 of
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NR_F:
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result:=SuperRegistersEqual(reg2,NR_DEFAULTFLAGS);
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NR_AF:
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result:=(reg2=NR_A) or (reg2=NR_AF) or SuperRegistersEqual(reg2,NR_DEFAULTFLAGS);
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NR_BC:
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result:=(reg2=NR_B) or (reg2=NR_C) or (reg2=NR_BC);
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NR_DE:
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result:=(reg2=NR_D) or (reg2=NR_E) or (reg2=NR_DE);
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NR_HL:
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result:=(reg2=NR_H) or (reg2=NR_L) or (reg2=NR_HL);
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NR_F_:
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result:=SuperRegistersEqual(reg2,NR_F_);
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NR_AF_:
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result:=(reg2=NR_A_) or (reg2=NR_AF_) or SuperRegistersEqual(reg2,NR_F_);
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NR_BC_:
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result:=(reg2=NR_B_) or (reg2=NR_C_) or (reg2=NR_BC_);
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NR_DE_:
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result:=(reg2=NR_D_) or (reg2=NR_E_) or (reg2=NR_DE_);
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NR_HL_:
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result:=(reg2=NR_H_) or (reg2=NR_L_) or (reg2=NR_HL_);
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else
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result:=reg1=reg2;
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end;
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end;
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function TCpuAsmOptimizer.GetNextInstructionUsingReg(Current: tai;
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var Next: tai; reg: TRegister): Boolean;
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begin
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Next:=Current;
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repeat
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Result:=GetNextInstruction(Next,Next);
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until not(cs_opt_level3 in current_settings.optimizerswitches) or not(Result) or (Next.typ<>ait_instruction) or (RegInInstruction(reg,Next)) or
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(is_calljmp(taicpu(Next).opcode));
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end;
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function TCpuAsmOptimizer.RegLoadedWithNewValue(reg: tregister; hp: tai): boolean;
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var
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p: taicpu;
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begin
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if not assigned(hp) or
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(hp.typ <> ait_instruction) then
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begin
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Result := false;
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exit;
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end;
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p := taicpu(hp);
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if SuperRegistersEqual(reg,NR_DEFAULTFLAGS) and (reg<>NR_AF) then
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begin
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case p.opcode of
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A_PUSH,A_POP,A_EX,A_EXX,A_NOP,A_HALT,A_DI,A_EI,A_IM,A_SET,A_RES,A_JP,A_JR,A_JRJP,A_DJNZ,A_CALL,A_RET,A_RETI,A_RETN,A_RST,A_OUT:
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result:=false;
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A_LD:
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begin
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if p.ops<>2 then
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internalerror(2020051112);
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{ LD A,I or LD A,R ? }
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if (p.oper[0]^.typ=top_reg) and (p.oper[0]^.reg=NR_A) and
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(p.oper[1]^.typ=top_reg) and ((p.oper[1]^.reg=NR_I) or (p.oper[1]^.reg=NR_R)) then
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result:=(reg=NR_ADDSUBTRACTFLAG) or
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(reg=NR_PARITYOVERFLOWFLAG) or
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(reg=NR_HALFCARRYFLAG) or
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(reg=NR_ZEROFLAG) or
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(reg=NR_SIGNFLAG)
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else
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result:=false;
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end;
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A_LDI,A_LDIR,A_LDD,A_LDDR:
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result:=(reg=NR_ADDSUBTRACTFLAG) or
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(reg=NR_PARITYOVERFLOWFLAG) or
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(reg=NR_HALFCARRYFLAG);
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A_INC,A_DEC:
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begin
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if p.ops<>1 then
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internalerror(2020051602);
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if (p.oper[0]^.typ=top_reg) and ((p.oper[0]^.reg=NR_BC) or
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(p.oper[0]^.reg=NR_DE) or
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(p.oper[0]^.reg=NR_HL) or
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(p.oper[0]^.reg=NR_SP) or
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(p.oper[0]^.reg=NR_IX) or
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(p.oper[0]^.reg=NR_IY)) then
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result:=false
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else
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result:=(reg=NR_ADDSUBTRACTFLAG) or
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(reg=NR_PARITYOVERFLOWFLAG) or
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(reg=NR_HALFCARRYFLAG) or
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(reg=NR_ZEROFLAG) or
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(reg=NR_SIGNFLAG);
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end;
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A_CPI,A_CPIR,A_CPD,A_CPDR,A_RLD,A_RRD,A_BIT,A_INI,A_INIR,A_IND,A_INDR,A_OUTI,A_OTIR,A_OUTD,A_OTDR:
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result:=(reg=NR_ADDSUBTRACTFLAG) or
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(reg=NR_PARITYOVERFLOWFLAG) or
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(reg=NR_HALFCARRYFLAG) or
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(reg=NR_ZEROFLAG) or
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(reg=NR_SIGNFLAG);
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A_ADD:
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begin
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if p.ops<>2 then
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internalerror(2020051601);
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if (p.oper[0]^.typ=top_reg) and ((p.oper[0]^.reg=NR_HL) or (p.oper[0]^.reg=NR_IX) or (p.oper[0]^.reg=NR_IY)) then
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result:=(reg=NR_HALFCARRYFLAG) or
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(reg=NR_ADDSUBTRACTFLAG) or
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(reg=NR_CARRYFLAG)
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else
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result:=true;
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end;
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A_ADC,A_SUB,A_SBC,A_AND,A_OR,A_XOR,A_CP,A_NEG,A_RLC,A_RL,A_RRC,A_RR,A_SLA,A_SRA,A_SRL:
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result:=true;
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A_DAA:
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result:=(reg=NR_PARITYOVERFLOWFLAG) or
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(reg=NR_HALFCARRYFLAG) or
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(reg=NR_ZEROFLAG) or
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(reg=NR_SIGNFLAG) or
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(reg=NR_CARRYFLAG);
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A_CPL:
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result:=(reg=NR_HALFCARRYFLAG) or
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(reg=NR_ADDSUBTRACTFLAG);
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A_CCF,A_SCF,A_RLCA,A_RLA,A_RRCA,A_RRA:
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result:=(reg=NR_HALFCARRYFLAG) or
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(reg=NR_ADDSUBTRACTFLAG) or
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(reg=NR_CARRYFLAG);
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A_IN:
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begin
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if p.ops<>2 then
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internalerror(2020051612);
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if (p.oper[1]^.typ=top_ref) and ((p.oper[1]^.ref^.base=NR_C) or (p.oper[1]^.ref^.index=NR_C)) then
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result:=(reg=NR_ADDSUBTRACTFLAG) or
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(reg=NR_PARITYOVERFLOWFLAG) or
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(reg=NR_HALFCARRYFLAG) or
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(reg=NR_ZEROFLAG) or
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(reg=NR_SIGNFLAG)
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else
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result:=false;
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end;
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else
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internalerror(2020051111);
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end;
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end
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else
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case p.opcode of
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A_LD:
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begin
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if p.ops<>2 then
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internalerror(2020051114);
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result:=(p.oper[0]^.typ = top_reg) and
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(Reg1WriteOverwritesReg2Entirely(p.oper[0]^.reg,reg)) and
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((p.oper[1]^.typ = top_const) or
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((p.oper[1]^.typ = top_reg) and not(Reg1ReadDependsOnReg2(p.oper[1]^.reg,reg))) or
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((p.oper[1]^.typ = top_ref) and not RegInRef(reg,p.oper[1]^.ref^)));
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end;
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A_PUSH,A_EX,A_EXX,A_LDI,A_LDIR,A_LDD,A_LDDR,A_CPI,A_CPIR,A_CPD,A_CPDR,
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A_ADD,A_ADC,A_SBC,A_CP,A_INC,A_DEC,A_DAA,A_CPL,A_NEG,A_CCF,A_SCF,
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A_NOP,A_HALT,A_DI,A_EI,A_IM,A_RLCA,A_RLA,A_RRCA,A_RRA,A_RLC,A_RL,
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A_RRC,A_RR,A_SLA,A_SRA,A_SRL,A_RLD,A_RRD,A_BIT,A_SET,A_RES,A_JP,A_JR,A_JRJP,
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A_DJNZ,A_CALL,A_RET,A_RETI,A_RETN,A_RST,A_INI,A_INIR,A_IND,A_INDR,
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A_OUT,A_OUTI,A_OTIR,A_OUTD,A_OTDR:
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result:=false;
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A_POP:
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begin
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if p.ops<>1 then
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internalerror(2020051603);
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if p.oper[0]^.typ<>top_reg then
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internalerror(2020051604);
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result:=Reg1WriteOverwritesReg2Entirely(p.oper[0]^.reg,reg);
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end;
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A_SUB,A_XOR:
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begin
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if p.ops<>2 then
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internalerror(2020051605);
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result:=(p.oper[0]^.typ=top_reg) and (p.oper[0]^.reg=NR_A) and
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(p.oper[1]^.typ=top_reg) and (p.oper[1]^.reg=NR_A) and
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Reg1WriteOverwritesReg2Entirely(NR_A,reg);
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end;
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A_AND:
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begin
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if p.ops<>2 then
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internalerror(2020051606);
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result:=(p.oper[0]^.typ=top_reg) and (p.oper[0]^.reg=NR_A) and
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(p.oper[1]^.typ=top_const) and (p.oper[1]^.val=0) and
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Reg1WriteOverwritesReg2Entirely(NR_A,reg);
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end;
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A_OR:
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begin
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if p.ops<>2 then
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internalerror(2020051607);
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result:=(p.oper[0]^.typ=top_reg) and (p.oper[0]^.reg=NR_A) and
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(p.oper[1]^.typ=top_const) and (byte(p.oper[1]^.val)=255) and
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Reg1WriteOverwritesReg2Entirely(NR_A,reg);
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end;
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A_IN:
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begin
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if p.ops<>2 then
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internalerror(2020051608);
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if p.oper[0]^.typ<>top_reg then
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internalerror(2020051609);
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if p.oper[1]^.typ<>top_ref then
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internalerror(2020051610);
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result:=Reg1WriteOverwritesReg2Entirely(p.oper[0]^.reg,reg) and
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(((p.oper[1]^.ref^.base<>NR_C) and (p.oper[1]^.ref^.index<>NR_C)) or
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not(Reg1ReadDependsOnReg2(NR_BC,reg)));
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end;
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else
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internalerror(2020051108);
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end;
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end;
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function TCpuAsmOptimizer.InstructionLoadsFromReg(const reg: TRegister; const hp: tai): boolean;
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var
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p: taicpu;
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begin
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Result := false;
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if not (assigned(hp) and (hp.typ = ait_instruction)) then
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exit;
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p:=taicpu(hp);
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case p.opcode of
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A_LD,A_BIT,A_SET,A_RES:
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begin
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if p.ops<>2 then
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internalerror(2020051102);
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result:=((p.oper[0]^.typ=top_ref) and RegInRef(reg,p.oper[0]^.ref^)) or
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RegInOp(reg,p.oper[1]^);
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end;
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A_PUSH,A_INC,A_DEC,A_RLC,A_RRC,A_SLA,A_SRA,A_SRL:
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begin
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if p.ops<>1 then
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internalerror(2020051103);
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result:=RegInOp(reg,p.oper[0]^);
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end;
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A_POP:
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result:=(reg=NR_SP);
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A_EX,A_ADD,A_SUB,A_AND,A_OR,A_XOR,A_CP:
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begin
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if p.ops<>2 then
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internalerror(2020051104);
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result:=RegInOp(reg,p.oper[0]^) or
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RegInOp(reg,p.oper[1]^);
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end;
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A_EXX:
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result:=SuperRegistersEqual(reg,NR_BC) or SuperRegistersEqual(reg,NR_DE) or SuperRegistersEqual(reg,NR_HL) or
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SuperRegistersEqual(reg,NR_BC_) or SuperRegistersEqual(reg,NR_DE_) or SuperRegistersEqual(reg,NR_HL_);
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A_LDI,A_LDIR,A_LDD,A_LDDR:
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result:=SuperRegistersEqual(reg,NR_BC) or SuperRegistersEqual(reg,NR_DE) or SuperRegistersEqual(reg,NR_HL);
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A_CPI,A_CPIR,A_CPD,A_CPDR:
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result:=SuperRegistersEqual(reg,NR_BC) or SuperRegistersEqual(reg,NR_HL) or RegistersInterfere(reg,NR_A);
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A_ADC,A_SBC:
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begin
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if p.ops<>2 then
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internalerror(2020051105);
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result:=RegInOp(reg,p.oper[0]^) or
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RegInOp(reg,p.oper[1]^) or (reg=NR_CARRYFLAG) or (reg=NR_DEFAULTFLAGS);
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end;
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A_DAA:
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result:=RegistersInterfere(reg,NR_A) or (reg=NR_CARRYFLAG) or (reg=NR_HALFCARRYFLAG) or (reg=NR_ADDSUBTRACTFLAG) or (reg=NR_DEFAULTFLAGS);
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A_CPL,A_NEG,A_RLCA,A_RRCA:
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result:=RegistersInterfere(reg,NR_A);
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A_CCF:
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result:=(reg=NR_CARRYFLAG) or (reg=NR_DEFAULTFLAGS);
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A_SCF,A_NOP,A_HALT,A_DI,A_EI,A_IM:
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result:=false;
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A_RLA,A_RRA:
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result:=RegistersInterfere(reg,NR_A) or (reg=NR_CARRYFLAG) or (reg=NR_DEFAULTFLAGS);
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A_RL,A_RR:
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begin
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if p.ops<>1 then
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internalerror(2020051106);
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result:=RegInOp(reg,p.oper[0]^) or (reg=NR_CARRYFLAG) or (reg=NR_DEFAULTFLAGS);
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end;
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A_RLD,A_RRD:
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result:=RegistersInterfere(reg,NR_A) or RegistersInterfere(reg,NR_HL);
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A_JP,A_JR,A_JRJP:
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begin
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if p.ops<>1 then
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internalerror(2020051107);
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if RegInOp(reg,p.oper[0]^) then
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result:=true
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else
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case p.condition of
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C_None:
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result:=false;
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C_NZ,C_Z:
|
|
result:=(reg=NR_ZEROFLAG) or (reg=NR_DEFAULTFLAGS);
|
|
C_NC,C_C:
|
|
result:=(reg=NR_CARRYFLAG) or (reg=NR_DEFAULTFLAGS);
|
|
C_PO,C_PE:
|
|
result:=(reg=NR_PARITYOVERFLOWFLAG) or (reg=NR_DEFAULTFLAGS);
|
|
C_P,C_M:
|
|
result:=(reg=NR_SIGNFLAG) or (reg=NR_DEFAULTFLAGS);
|
|
end;
|
|
end;
|
|
A_DJNZ:
|
|
result:=RegistersInterfere(reg,NR_B);
|
|
A_CALL,A_RET,A_RETI,A_RETN,A_RST:
|
|
result:=true;
|
|
A_IN:
|
|
begin
|
|
if p.ops<>2 then
|
|
internalerror(2020051109);
|
|
result:=(p.oper[1]^.typ=top_ref) and (p.oper[1]^.ref^.base=NR_C) and RegistersInterfere(reg,NR_BC);
|
|
end;
|
|
A_OUT:
|
|
begin
|
|
if p.ops<>2 then
|
|
internalerror(2020051110);
|
|
result:=RegInOp(reg,p.oper[1]^) or (p.oper[0]^.typ=top_ref) and (p.oper[0]^.ref^.base=NR_C) and RegistersInterfere(reg,NR_BC);
|
|
end;
|
|
A_INI,A_INIR,A_IND,A_INDR,A_OUTI,A_OTIR,A_OUTD,A_OTDR:
|
|
result:=SuperRegistersEqual(reg,NR_BC) or SuperRegistersEqual(reg,NR_HL);
|
|
else
|
|
internalerror(2020051101);
|
|
end;
|
|
end;
|
|
|
|
function TCpuAsmOptimizer.PeepHoleOptPass1Cpu(var p: tai): boolean;
|
|
var
|
|
hp1,hp2,hp3,hp4,hp5: tai;
|
|
alloc, dealloc: tai_regalloc;
|
|
i: integer;
|
|
l: TAsmLabel;
|
|
//TmpUsedRegs : TAllUsedRegs;
|
|
begin
|
|
result := false;
|
|
//case p.typ of
|
|
// ait_instruction:
|
|
// begin
|
|
// end;
|
|
//end;
|
|
end;
|
|
|
|
|
|
procedure TCpuAsmOptimizer.PeepHoleOptPass2;
|
|
begin
|
|
end;
|
|
|
|
begin
|
|
casmoptimizer:=TCpuAsmOptimizer;
|
|
End.
|