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ae4c8359aa
Parse the ESR (ESR_ELx, Exception Syndrome Register (ELx)), return run error as in float_raise
101 lines
3.8 KiB
PHP
101 lines
3.8 KiB
PHP
{
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This file is part of the Free Pascal run time library.
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(c) 2008 by Jonas Maebe
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member of the Free Pascal development team.
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See the file COPYING.FPC, included in this distribution,
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for details about the copyright.
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Signalhandler for Darwin/arm
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY;without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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}
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procedure SignalToRunerror(Sig: cint; info : PSigInfo; SigContext:PSigContext); public name '_FPC_DEFAULTSIGHANDLER'; cdecl;
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var
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fpuexceptionflags: cardinal;
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res : word;
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begin
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res:=0;
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case sig of
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SIGFPE :
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begin
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Case Info^.si_code Of
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FPE_FLTDIV : Res:=208; { floating point divide by zero }
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FPE_INTDIV : Res:=200; { integer divide by zero }
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FPE_FLTOVF : Res:=205; { floating point overflow }
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FPE_FLTUND : Res:=206; { floating point underflow }
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FPE_FLTRES, { floating point inexact result }
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FPE_FLTINV : Res:=207; { invalid floating point operation }
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Else
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Res:=207; {coprocessor error}
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SigContext^.uc_mcontext^.__ns.__fpsr:=SigContext^.uc_mcontext^.__ns.__fpsr and not(fpu_exception_mask shr fpu_exception_mask_to_status_mask_shift);
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end;
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end;
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SIGBUS:
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res:=214;
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SIGILL:
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begin
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{ right now, macOS generates SIGILL signals for fpu exceptions on AArch64.
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Additionally, fpsr is 0 in the context when this happens. Fortunately,
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the esr is valid, so we can decode that one. }
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if (Info^.si_code=ILL_ILLTRP) and
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{ Trapped AArch64 floating point exception }
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((SigContext^.uc_mcontext^.__es.__esr and __ESR_EC_Mask)=__ESR_EC_TrappedAArch64_FloatingPoint) then
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begin
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{ the FPU status bits in the ESR are valid }
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if (SigContext^.uc_mcontext^.__es.__esr and __ESR_ISS_TFV)<>0 then
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begin
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fpuexceptionflags:=(SigContext^.uc_mcontext^.__es.__esr shl fpu_exception_mask_to_status_mask_shift) and fpu_exception_mask;
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if (fpuexceptionflags and fpu_dze)<>0 then
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res:=208
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else if (fpuexceptionflags and fpu_ofe)<>0 then
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res:=205
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else if (fpuexceptionflags and fpu_ufe)<>0 then
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res:=206
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else if (fpuexceptionflags and fpu_ioe)<>0 then
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res:=207
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else if (fpuexceptionflags and fpu_ixe)<>0 then
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res:=207
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else if (fpuexceptionflags and fpu_ide)<>0 then
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res:=216
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else
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{ unknown FPU exception }
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res:=207
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end
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else
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{ unknown FPU exception }
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res:=207;
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end
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else
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res:=216;
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{ for safety, always clear in case we had a SIGILL to prevent potential
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infinite trap loops, even if it can cause us to miss some FPU
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exceptions in case we process an actual illegal instruction }
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SigContext^.uc_mcontext^.__ns.__fpsr:=SigContext^.uc_mcontext^.__ns.__fpsr and not(fpu_exception_mask shr fpu_exception_mask_to_status_mask_shift);
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end;
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SIGSEGV :
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res:=216;
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SIGINT:
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res:=217;
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SIGQUIT:
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res:=233;
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end;
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{$ifdef FPC_USE_SIGPROCMASK}
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reenable_signal(sig);
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{$endif }
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{ return to trampoline }
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if res <> 0 then
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begin
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SigContext^.uc_mcontext^.__ss.__r[0] := res;
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SigContext^.uc_mcontext^.__ss.__r[1] := SigContext^.uc_mcontext^.__ss.__pc;
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SigContext^.uc_mcontext^.__ss.__r[2] := SigContext^.uc_mcontext^.__ss.__fp;
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pointer(SigContext^.uc_mcontext^.__ss.__pc) := @HandleErrorAddrFrame;
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end;
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end;
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