mirror of
https://gitlab.com/freepascal.org/fpc/source.git
synced 2025-04-08 16:08:09 +02:00
272 lines
7.0 KiB
ActionScript
272 lines
7.0 KiB
ActionScript
/*--------------------------------------------------------------------------------
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This Source Code Form is subject to the terms of the Mozilla Public License,
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v. 2.0. If a copy of the MPL was not distributed with this file, You can
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obtain one at https://mozilla.org/MPL/2.0/.
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--------------------------------------------------------------------------------*/
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@---------------------------------------------------------------------------------
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@ DS processor selection
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@---------------------------------------------------------------------------------
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.arch armv5te
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.cpu arm946e-s
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@---------------------------------------------------------------------------------
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.equ _libnds_argv,0x02FFFE70
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@---------------------------------------------------------------------------------
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.section ".crt0","ax"
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.global _start
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@---------------------------------------------------------------------------------
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.align 4
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.arm
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@---------------------------------------------------------------------------------
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_start:
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@---------------------------------------------------------------------------------
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mov r0, #0x04000000 @ IME = 0;
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str r0, [r0, #0x208]
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@ set sensible stacks to allow bios call
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mov r0, #0x13 @ Switch to SVC Mode
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msr cpsr, r0
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mov r1,#0x03000000
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sub r1,r1,#0x1000
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mov sp,r1
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mov r0, #0x1F @ Switch to System Mode
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msr cpsr, r0
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sub r1,r1,#0x100
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mov sp,r1
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ldr r3, =__libnds_mpu_setup
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blx r3
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mov r0, #0x12 @ Switch to IRQ Mode
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msr cpsr, r0
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ldr sp, =__sp_irq @ Set IRQ stack
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mov r0, #0x13 @ Switch to SVC Mode
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msr cpsr, r0
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ldr sp, =__sp_svc @ Set SVC stack
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mov r0, #0x1F @ Switch to System Mode
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msr cpsr, r0
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ldr sp, =__sp_usr @ Set user stack
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mov r12, #0x4000000 @ Read system ROM status (NTR/TWL)
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ldrb r11, [r12,r12,lsr #12]
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and r11, r11, #0x3
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mov r9, #(0x0<<8) @ Synchronize with ARM7
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str r9, [r12, #0x180]
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mov r9, #0x9
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bl IPCSync
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mov r9, #(0xA<<8)
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str r9, [r12, #0x180]
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mov r9, #0xB
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bl IPCSync
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mov r9, #(0xC<<8)
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str r9, [r12, #0x180]
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mov r9, #0xD
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bl IPCSync
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mov r9, r11, lsl #8
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str r9, [r12, #0x180]
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mov r9, #0
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bl IPCSync
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str r9, [r12, #0x180]
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ldr r1, =__itcm_lma @ Copy instruction tightly coupled memory (itcm section) from LMA to VMA
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ldr r2, =__itcm_start
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ldr r4, =__itcm_end
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bl CopyMemCheck
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ldr r1, =__vectors_lma @ Copy reserved vectors area (itcm section) from LMA to VMA
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ldr r2, =__vectors_start
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ldr r4, =__vectors_end
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bl CopyMemCheck
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ldr r1, =__dtcm_lma @ Copy data tightly coupled memory (dtcm section) from LMA to VMA
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ldr r2, =__dtcm_start
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ldr r4, =__dtcm_end
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bl CopyMemCheck
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cmp r11, #1
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ldrne r10, =__end__ @ (DS mode) heap start
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ldreq r10, =__twl_end__ @ (DSi mode) heap start
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bl checkARGV @ check and process argv trickery
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ldr r0, =__bss_start__ @ Clear BSS section
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ldr r1, =__bss_end__
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sub r1, r1, r0
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bl ClearMem
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ldr r0, =__sbss_start @ Clear SBSS section
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ldr r1, =__sbss_end
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sub r1, r1, r0
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bl ClearMem
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cmp r11, #1
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bne NotTWL
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ldr r9, =__dsimode @ set DSi mode flag
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strb r11, [r9]
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@ Copy TWL area (arm9i section) from LMA to VMA
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ldr r1, =0x02ffe1c8 @ Get ARM9i LMA from header
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ldr r1, [r1]
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ldr r2, =__arm9i_start__
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cmp r1, r2 @ skip copy if LMA=VMA
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ldrne r4, =__arm9i_end__
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blne CopyMemCheck
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ldr r0, =__twl_bss_start__ @ Clear TWL BSS section
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ldr r1, =__twl_bss_end__
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sub r1, r1, r0
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bl ClearMem
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NotTWL:
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ldr r0, =_libnds_argv
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@ reset heap base
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ldr r2, [r0,#20] @ newheap base
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cmp r2, #0
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moveq r2, r10
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ldr r1, =fake_heap_start @ set heap start
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str r2, [r1]
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ldr r1, =fake_heap_end @ set heap end
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sub r8, r8,#0xc000
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str r8, [r1]
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push {r0}
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ldr r0, =__secure_area__
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ldr r3, =initSystem
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blx r3 @ system initialisation
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ldr r3, =__libc_init_array @ global constructors
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blx r3
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pop {r0}
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ldr r1, [r0,#16] @ argv
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ldr r0, [r0,#12] @ argc
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ldr r3, =main
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ldr lr, =__libnds_exit
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bx r3 @ jump to user code
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@---------------------------------------------------------------------------------
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@ check for a commandline
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@---------------------------------------------------------------------------------
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checkARGV:
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@---------------------------------------------------------------------------------
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ldr r0, =_libnds_argv @ argv structure
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mov r1, #0
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str r1, [r0,#12] @ clear argc
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str r1, [r0,#16] @ clear argv
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ldr r3, [r0] @ argv magic number
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ldr r2, =0x5f617267 @ '_arg'
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cmp r3, r2
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strne r1, [r0,#20]
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bxne lr @ bail out if no magic
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ldr r1, [r0, #4] @ command line address
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ldr r2, [r0, #8] @ length of command line
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@ copy to heap
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mov r3, r10 @ initial heap base
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str r3, [r0, #4] @ set command line address
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cmp r2, #0
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subnes r4, r3, r1 @ dst-src
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bxeq lr @ dst == src || len==0 : nothing to do.
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cmphi r2, r4 @ len > (dst-src)
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bhi .copybackward
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.copyforward:
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ldrb r4, [r1], #1
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strb r4, [r3], #1
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subs r2, r2, #1
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bne .copyforward
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b .copydone
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.copybackward:
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subs r2, r2, #1
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ldrb r4, [r1, r2]
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strb r4, [r3, r2]
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bne .copybackward
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.copydone:
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push {lr}
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ldr r3, =build_argv
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blx r3
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pop {lr}
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bx lr
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@---------------------------------------------------------------------------------
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@ Clear memory to 0x00 if length != 0
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@ r0 = Start Address
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@ r1 = Length
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@---------------------------------------------------------------------------------
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ClearMem:
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@---------------------------------------------------------------------------------
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mov r2, #3 @ Round down to nearest word boundary
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add r1, r1, r2 @ Shouldn't be needed
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bics r1, r1, r2 @ Clear 2 LSB (and set Z)
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bxeq lr @ Quit if copy size is 0
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mov r2, #0
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ClrLoop:
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stmia r0!, {r2}
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subs r1, r1, #4
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bne ClrLoop
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bx lr
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@---------------------------------------------------------------------------------
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@ Copy memory if length != 0
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@ r1 = Source Address
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@ r2 = Dest Address
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@ r4 = Dest Address + Length
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@---------------------------------------------------------------------------------
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CopyMemCheck:
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@---------------------------------------------------------------------------------
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sub r3, r4, r2 @ Is there any data to copy?
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@---------------------------------------------------------------------------------
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@ Copy memory
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@ r1 = Source Address
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@ r2 = Dest Address
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@ r3 = Length
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@---------------------------------------------------------------------------------
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CopyMem:
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@---------------------------------------------------------------------------------
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mov r0, #3 @ These commands are used in cases where
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add r3, r3, r0 @ the length is not a multiple of 4,
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bics r3, r3, r0 @ even though it should be.
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bxeq lr @ Length is zero, so exit
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CIDLoop:
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ldmia r1!, {r0}
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stmia r2!, {r0}
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subs r3, r3, #4
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bne CIDLoop
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bx lr
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@---------------------------------------------------------------------------------
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@ Synchronize with ARM7
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@---------------------------------------------------------------------------------
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IPCSync:
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@---------------------------------------------------------------------------------
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ldr r10, [r12, #0x180]
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and r10, r10, #0xF
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cmp r10, r9
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bne IPCSync
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bx lr
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@---------------------------------------------------------------------------------
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.align
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.pool
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.end
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@--------------------------------------------------------------------------------- |