fpc/compiler/arm/rarmsup.inc
Jeppe Johansen 387824c1ee Added some APSR register bitmask definitions.
Fixed a bunch of instruction encodings by comparing bulks of handwritten tests to binutils assembled versions.
Fixed emission of regsets of S and D registers above 15.
Fixed assembler reader for RRX shiftmode.
There can be a size postfix after a condition code in UAL assembler syntax. This has been added to the assembler reader.

git-svn-id: branches/laksen/armiw@29277 -
2014-12-12 22:23:44 +00:00

133 lines
1.9 KiB
PHP

{ don't edit, this file is generated from armreg.dat }
RS_NO = $00;
RS_R0 = $00;
RS_R1 = $01;
RS_R2 = $02;
RS_R3 = $03;
RS_R4 = $04;
RS_R5 = $05;
RS_R6 = $06;
RS_R7 = $07;
RS_R8 = $08;
RS_R9 = $09;
RS_R10 = $0a;
RS_R11 = $0b;
RS_R12 = $0c;
RS_R13 = $0d;
RS_R14 = $0e;
RS_R15 = $0f;
RS_F0 = $00;
RS_F1 = $01;
RS_F2 = $02;
RS_F3 = $03;
RS_F4 = $04;
RS_F5 = $05;
RS_F6 = $06;
RS_F7 = $07;
RS_S0 = $00;
RS_S1 = $20;
RS_D0 = $00;
RS_S2 = $01;
RS_S3 = $21;
RS_D1 = $01;
RS_S4 = $02;
RS_S5 = $22;
RS_D2 = $02;
RS_S6 = $03;
RS_S7 = $23;
RS_D3 = $03;
RS_S8 = $04;
RS_S9 = $24;
RS_D4 = $04;
RS_S10 = $05;
RS_S11 = $25;
RS_D5 = $05;
RS_S12 = $06;
RS_S13 = $26;
RS_D6 = $06;
RS_S14 = $07;
RS_S15 = $27;
RS_D7 = $07;
RS_S16 = $08;
RS_S17 = $28;
RS_D8 = $08;
RS_S18 = $09;
RS_S19 = $29;
RS_D9 = $09;
RS_S20 = $0A;
RS_S21 = $2A;
RS_D10 = $0A;
RS_S22 = $0B;
RS_S23 = $2B;
RS_D11 = $0B;
RS_S24 = $0C;
RS_S25 = $2C;
RS_D12 = $0C;
RS_S26 = $0D;
RS_S27 = $2D;
RS_D13 = $0D;
RS_S28 = $0E;
RS_S29 = $2E;
RS_D14 = $0E;
RS_S30 = $0F;
RS_S31 = $2F;
RS_D15 = $0F;
RS_D16 = $10;
RS_D17 = $11;
RS_D18 = $12;
RS_D19 = $13;
RS_D20 = $14;
RS_D21 = $15;
RS_D22 = $16;
RS_D23 = $17;
RS_D24 = $18;
RS_D25 = $19;
RS_D26 = $1A;
RS_D27 = $1B;
RS_D28 = $1C;
RS_D29 = $1D;
RS_D30 = $1E;
RS_D31 = $1F;
RS_CPSR = $00;
RS_FPSCR = $01;
RS_SPSR = $02;
RS_APSR_nzcv = $03;
RS_CR0 = $04;
RS_CR1 = $05;
RS_CR2 = $06;
RS_CR3 = $07;
RS_CR4 = $08;
RS_CR5 = $09;
RS_CR6 = $0A;
RS_CR7 = $0B;
RS_CR8 = $0C;
RS_CR9 = $0D;
RS_CR10 = $0E;
RS_CR11 = $0F;
RS_CR12 = $10;
RS_CR13 = $11;
RS_CR14 = $12;
RS_CR15 = $13;
RS_p15 = $14;
RS_APSR = $15;
RS_IPSR = $16;
RS_EPSR = $17;
RS_IEPSR = $18;
RS_IAPSR = $19;
RS_EAPSR = $1A;
RS_PSR = $1B;
RS_MSP = $1C;
RS_PSP = $1D;
RS_PRIMASK = $1E;
RS_BASEPRI = $1F;
RS_BASEPRI_MAX = $20;
RS_FAULTMASK = $21;
RS_CONTROL = $22;
RS_FPSID = $23;
RS_MVFR1 = $24;
RS_MVFR0 = $25;
RS_FPEXC = $26;
RS_APSR_nzcvq = $27;
RS_APSR_g = $28;
RS_APSR_nzcvqg = $29;