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https://gitlab.com/freepascal.org/fpc/source.git
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5d628b29bb
differentiate between 64 bit and 128 bit (R_SUBMMWHOLE) SSE vector regs,
and support spilling/assembling for R_SUBQ SSE registers (8 bytes)
(mantis #23962)
We currently never use the full 128 bit of an SSE register, and
spilling for those hasn't been implemented yet either (R_SUBMMWHOLE
SSE regs are spilled into a 4-byte temp currently -> can overwrite data)
git-svn-id: trunk@23700 -
47 lines
746 B
ObjectPascal
47 lines
746 B
ObjectPascal
{$MODE ObjFpc}
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uses classes;
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type
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TVector3 = packed record
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X, Y, Z: Single;
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end;
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TClassA = class
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protected
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fVector: TVector3;
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public
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procedure SetVector(AVector: TVector3); virtual; abstract;
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end;
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{ TClassB }
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TClassB = class(TClassA)
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public
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procedure SetVector(AVector: TVector3); override;
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end;
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{ TClassB }
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procedure TClassB.SetVector(AVector: TVector3);
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begin
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writeln('TClassB: ',AVector.X,',',AVector.Y,',',AVector.Z);
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fVector:=AVector;
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end;
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var
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MyVector: TVector3;
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MyClassB: TClassB;
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begin
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MyVector.X:=0;
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MyVector.Y:=0;
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MyVector.Z:=3;
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MyClassB:=TClassB.Create;
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MyClassB.SetVector(MyVector);
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if (MyClassB.fvector.x<>0) or
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(MyClassB.fvector.y<>0) or
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(MyClassB.fvector.z<>3) then
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halt(1);
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end.
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