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06b9789928
CPU target for inline assembler blocks. In addition to the different CPUs (as listed under 'Supported CPU instruction sets:' in the output of 'fpc -i'), it also supports the special values 'ANY' and 'CURRENT'. 'ANY' means no restrictions (i.e. all instructions are available). 'CURRENT' means the current CPU target (as specified with the '-Cp' command line option). For backward compatibility, the default value is 'ANY' for all CPU targets, except i8086, where it defaults to 'CURRENT'. This directive requires support for the new asd_cpu directive in the assembler writer. This is currently implemented only for NASM, but will be supported in some of the other assembler writers as well (incl. the x86 internal assembler writer). git-svn-id: trunk@33138 -
668 lines
26 KiB
ObjectPascal
668 lines
26 KiB
ObjectPascal
{
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Copyright (c) 2000-2002 by Florian Klaempfl
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This unit implements some basic nodes
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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unit ncgbas;
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{$i fpcdefs.inc}
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interface
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uses
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cpubase,cgutils,
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node,nbas;
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type
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tcgnothingnode = class(tnothingnode)
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procedure pass_generate_code;override;
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end;
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tcgasmnode = class(tasmnode)
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procedure pass_generate_code;override;
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end;
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tcgstatementnode = class(tstatementnode)
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procedure pass_generate_code;override;
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end;
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tcgblocknode = class(tblocknode)
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procedure pass_generate_code;override;
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end;
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tcgtempcreatenode = class(ttempcreatenode)
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procedure pass_generate_code;override;
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end;
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tcgtemprefnode = class(ttemprefnode)
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procedure pass_generate_code;override;
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{ Changes the location of this temp to ref. Useful when assigning }
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{ another temp to this one. The current location will be freed. }
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{ Can only be called in pass 2 (since earlier, the temp location }
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{ isn't known yet) }
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procedure changelocation(const ref: treference);
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end;
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tcgtempdeletenode = class(ttempdeletenode)
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procedure pass_generate_code;override;
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end;
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implementation
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uses
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globtype,globals,systems,
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cutils,verbose,
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aasmbase,aasmtai,aasmdata,aasmcpu,
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symsym,symconst,symdef,defutil,
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nflw,pass_2,ncgutil,
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cgbase,cgobj,hlcgobj,
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procinfo,
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cpuinfo,
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tgobj
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;
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{*****************************************************************************
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TNOTHING
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*****************************************************************************}
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procedure tcgnothingnode.pass_generate_code;
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begin
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location_reset(location,LOC_VOID,OS_NO);
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{ avoid an abstract rte }
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end;
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{*****************************************************************************
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TSTATEMENTNODE
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*****************************************************************************}
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procedure tcgstatementnode.pass_generate_code;
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var
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hp : tstatementnode;
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begin
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location_reset(location,LOC_VOID,OS_NO);
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hp:=self;
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while assigned(hp) do
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begin
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if assigned(hp.left) then
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begin
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secondpass(hp.left);
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{ Compiler inserted blocks can return values }
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location_copy(hp.location,hp.left.location);
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end;
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hp:=tstatementnode(hp.right);
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end;
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end;
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{*****************************************************************************
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TASMNODE
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*****************************************************************************}
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procedure tcgasmnode.pass_generate_code;
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procedure ReLabel(var p:tasmsymbol);
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begin
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{ Only relabel local tasmlabels }
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if (p.bind = AB_LOCAL) and
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(p is tasmlabel) then
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begin
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if not assigned(p.altsymbol) then
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current_asmdata.GenerateAltSymbol(p);
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p:=p.altsymbol;
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p.increfs;
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end;
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end;
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procedure ResolveRef(const filepos: tfileposinfo; var op:toper);
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var
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sym : tabstractnormalvarsym;
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{$ifdef x86}
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scale : byte;
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{$endif x86}
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forceref,
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getoffset : boolean;
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indexreg : tregister;
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sofs : longint;
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begin
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if (op.typ=top_local) then
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begin
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sofs:=op.localoper^.localsymofs;
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indexreg:=op.localoper^.localindexreg;
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{$ifdef x86}
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scale:=op.localoper^.localscale;
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{$endif x86}
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getoffset:=op.localoper^.localgetoffset;
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forceref:=op.localoper^.localforceref;
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sym:=tabstractnormalvarsym(pointer(op.localoper^.localsym));
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dispose(op.localoper);
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case sym.localloc.loc of
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LOC_REFERENCE :
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begin
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if getoffset then
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begin
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if indexreg=NR_NO then
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begin
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op.typ:=top_const;
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op.val:=sym.localloc.reference.offset+sofs;
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end
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else
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begin
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op.typ:=top_ref;
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new(op.ref);
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reference_reset_base(op.ref^,indexreg,sym.localloc.reference.offset+sofs,
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newalignment(sym.localloc.reference.alignment,sofs));
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end;
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end
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else
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begin
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op.typ:=top_ref;
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new(op.ref);
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reference_reset_base(op.ref^,sym.localloc.reference.base,sym.localloc.reference.offset+sofs,
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newalignment(sym.localloc.reference.alignment,sofs));
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op.ref^.index:=indexreg;
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{$ifdef x86}
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op.ref^.scalefactor:=scale;
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{$endif x86}
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end;
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end;
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LOC_REGISTER :
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begin
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if getoffset then
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MessagePos(filepos,asmr_e_invalid_reference_syntax);
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{ Subscribed access }
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if forceref or
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(sofs<>0) then
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begin
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op.typ:=top_ref;
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new(op.ref);
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{ no idea about the actual alignment }
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reference_reset_base(op.ref^,sym.localloc.register,sofs,1);
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op.ref^.index:=indexreg;
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{$ifdef x86}
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op.ref^.scalefactor:=scale;
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{$endif x86}
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end
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else
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begin
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op.typ:=top_reg;
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op.reg:=sym.localloc.register;
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end;
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end;
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LOC_FPUREGISTER,
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LOC_MMXREGISTER,
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LOC_MMREGISTER :
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begin
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op.typ:=top_reg;
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op.reg:=NR_NO;
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if getoffset then
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MessagePos(filepos,asmr_e_invalid_reference_syntax);
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{ Using an MM/FPU register in a reference is not possible }
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if forceref or (sofs<>0) then
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MessagePos1(filepos,asmr_e_invalid_ref_register,std_regname(sym.localloc.register))
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else
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op.reg:=sym.localloc.register;
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end;
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LOC_INVALID :
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begin
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{ in "assembler; nostackframe;" routines, the
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funcret loc is set to LOC_INVALID in case the
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result is returned via a complex location
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(more than one register, ...) }
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if (vo_is_funcret in tabstractvarsym(sym).varoptions) then
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MessagePos(filepos,asmr_e_complex_function_result_location)
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else
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internalerror(2012082101);
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{ recover }
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op.typ:=top_reg;
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op.reg:=NR_FUNCTION_RETURN_REG;
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end;
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else
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internalerror(201001031);
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end;
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end;
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end;
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var
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hp,hp2 : tai;
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i : longint;
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begin
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location_reset(location,LOC_VOID,OS_NO);
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if (nf_get_asm_position in flags) then
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begin
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{ Add a marker, to be sure the list is not empty }
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current_asmdata.CurrAsmList.concat(tai_marker.create(mark_Position));
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currenttai:=tai(current_asmdata.CurrAsmList.last);
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exit;
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end;
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{ Switch to the CPU instruction set, specified by the $ASMCPU directive }
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current_asmdata.CurrAsmList.Concat(tai_directive.create(asd_cpu,cputypestr[current_settings.asmcputype]));
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{ Allocate registers used in the assembler block }
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{ has_registerlist=true means that registers are specified and already allocated }
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if (not has_registerlist) then
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cg.allocallcpuregisters(current_asmdata.CurrAsmList);
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if (po_inline in current_procinfo.procdef.procoptions) then
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begin
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hp:=tai(p_asm.first);
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while assigned(hp) do
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begin
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hp2:=tai(hp.getcopy);
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case hp2.typ of
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ait_label :
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ReLabel(tasmsymbol(tai_label(hp2).labsym));
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ait_const :
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begin
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if assigned(tai_const(hp2).sym) then
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ReLabel(tai_const(hp2).sym);
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if assigned(tai_const(hp2).endsym) then
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ReLabel(tai_const(hp2).endsym);
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end;
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ait_instruction :
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begin
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{ remove cached insentry, because the new code can
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require another less optimized instruction }
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{$ifdef i386}
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{$ifndef NOAG386BIN}
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taicpu(hp2).ResetPass1;
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{$endif}
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{$endif}
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{ fixup the references }
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for i:=1 to taicpu(hp2).ops do
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begin
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ResolveRef(taicpu(hp2).fileinfo,taicpu(hp2).oper[i-1]^);
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with taicpu(hp2).oper[i-1]^ do
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begin
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case typ of
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top_ref :
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begin
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if assigned(ref^.symbol) then
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ReLabel(ref^.symbol);
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if assigned(ref^.relsymbol) then
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ReLabel(ref^.relsymbol);
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end;
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end;
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end;
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end;
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{$ifdef x86}
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{ can only be checked now that all local operands }
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{ have been resolved }
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taicpu(hp2).CheckIfValid;
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{$endif x86}
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end;
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end;
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current_asmdata.CurrAsmList.concat(hp2);
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hp:=tai(hp.next);
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end;
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{ restore used symbols }
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current_asmdata.ResetAltSymbols;
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end
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else
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begin
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hp:=tai(p_asm.first);
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while assigned(hp) do
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begin
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case hp.typ of
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ait_instruction :
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begin
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{ remove cached insentry, because the new code can
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require another less optimized instruction }
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{$ifdef i386}
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{$ifndef NOAG386BIN}
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taicpu(hp).ResetPass1;
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{$endif}
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{$endif}
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{ fixup the references }
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for i:=1 to taicpu(hp).ops do
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ResolveRef(taicpu(hp).fileinfo,taicpu(hp).oper[i-1]^);
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{$ifdef x86}
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{ can only be checked now that all local operands }
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{ have been resolved }
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taicpu(hp).CheckIfValid;
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{$endif x86}
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end;
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end;
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hp:=tai(hp.next);
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end;
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{ insert the list }
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current_asmdata.CurrAsmList.concatlist(p_asm);
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end;
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{ Release register used in the assembler block }
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if (not has_registerlist) then
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cg.deallocallcpuregisters(current_asmdata.CurrAsmList);
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{ Switch back to the CPU instruction set of the target CPU }
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current_asmdata.CurrAsmList.Concat(tai_directive.create(asd_cpu,cputypestr[current_settings.cputype]));
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end;
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{*****************************************************************************
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TBLOCKNODE
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*****************************************************************************}
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procedure tcgblocknode.pass_generate_code;
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var
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hp : tstatementnode;
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oldexitlabel : tasmlabel;
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oldflowcontrol : tflowcontrol;
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begin
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location_reset(location,LOC_VOID,OS_NO);
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oldflowcontrol:=[];
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oldexitlabel:=nil;
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{ replace exitlabel? }
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if nf_block_with_exit in flags then
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begin
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oldexitlabel:=current_procinfo.CurrExitLabel;
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current_asmdata.getjumplabel(current_procinfo.CurrExitLabel);
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oldflowcontrol:=flowcontrol;
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{ the nested block will not span an exit statement of the parent }
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exclude(flowcontrol,fc_exit);
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end;
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{ do second pass on left node }
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if assigned(left) then
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begin
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hp:=tstatementnode(left);
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while assigned(hp) do
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begin
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if assigned(hp.left) then
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begin
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secondpass(hp.left);
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location_copy(hp.location,hp.left.location);
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end;
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location_copy(location,hp.location);
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hp:=tstatementnode(hp.right);
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end;
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end;
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{ write exitlabel }
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if nf_block_with_exit in flags then
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begin
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cg.a_label(current_asmdata.CurrAsmList,current_procinfo.CurrExitLabel);
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current_procinfo.CurrExitLabel:=oldexitlabel;
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{ the exit statements inside this block are not exit statements }
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{ out of the parent }
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flowcontrol:=oldflowcontrol+(flowcontrol - [fc_exit]);
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end;
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end;
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{*****************************************************************************
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TTEMPCREATENODE
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*****************************************************************************}
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procedure tcgtempcreatenode.pass_generate_code;
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begin
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location_reset(location,LOC_VOID,OS_NO);
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{ if we're secondpassing the same tcgtempcreatenode twice, we have a bug }
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if (ti_valid in tempinfo^.flags) then
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internalerror(200108222);
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{ in case of ti_reference, the location will be initialised using the
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location of the tempinitnode once the first temprefnode is processed }
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if not(ti_reference in tempinfo^.flags) then
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begin
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{ get a (persistent) temp }
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if is_managed_type(tempinfo^.typedef) and
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not(ti_const in tempinfo^.flags) then
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begin
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location_reset_ref(tempinfo^.location,LOC_REFERENCE,def_cgsize(tempinfo^.typedef),0);
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tg.gethltempmanaged(current_asmdata.CurrAsmList,tempinfo^.typedef,tempinfo^.temptype,tempinfo^.location.reference);
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if not(ti_nofini in tempinfo^.flags) then
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hlcg.g_finalize(current_asmdata.CurrAsmList,tempinfo^.typedef,tempinfo^.location.reference);
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end
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else if (ti_may_be_in_reg in tempinfo^.flags) then
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begin
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location_allocate_register(current_asmdata.CurrAsmList,tempinfo^.location,tempinfo^.typedef,tempinfo^.temptype = tt_persistent);
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end
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else
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begin
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location_reset_ref(tempinfo^.location,LOC_REFERENCE,def_cgsize(tempinfo^.typedef),0);
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tg.gethltemp(current_asmdata.CurrAsmList,tempinfo^.typedef,size,tempinfo^.temptype,tempinfo^.location.reference);
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end;
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end;
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include(tempinfo^.flags,ti_valid);
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if assigned(tempinfo^.tempinitcode) then
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include(tempinfo^.flags,ti_executeinitialisation);
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end;
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{*****************************************************************************
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TTEMPREFNODE
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*****************************************************************************}
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procedure tcgtemprefnode.pass_generate_code;
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begin
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if ti_executeinitialisation in tempinfo^.flags then
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begin
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{ avoid recursion }
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exclude(tempinfo^.flags, ti_executeinitialisation);
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secondpass(tempinfo^.tempinitcode);
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if (ti_reference in tempinfo^.flags) then
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begin
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case tempinfo^.tempinitcode.location.loc of
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LOC_CREGISTER,
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LOC_CFPUREGISTER,
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LOC_CMMREGISTER,
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LOC_CSUBSETREG:
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begin
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{ although it's ok if we need this value multiple times
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for reading, it's not in case of writing (because the
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register could change due to SSA -> storing to the saved
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register afterwards would be wrong). }
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if not(ti_readonly in tempinfo^.flags) then
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internalerror(2011031407);
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end;
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{ in case reference contains CREGISTERS, that doesn't matter:
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we want to write to the location indicated by the current
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value of those registers, and we can save those values }
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end;
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hlcg.g_reference_loc(current_asmdata.CurrAsmList,tempinfo^.typedef,tempinfo^.tempinitcode.location,tempinfo^.location);
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end;
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end;
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{ check if the temp is valid }
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if not(ti_valid in tempinfo^.flags) then
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internalerror(200108231);
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location:=tempinfo^.location;
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case tempinfo^.location.loc of
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LOC_REFERENCE:
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begin
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inc(location.reference.offset,offset);
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location.reference.alignment:=newalignment(location.reference.alignment,offset);
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{ ti_valid should be excluded if it's a normal temp }
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end;
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LOC_REGISTER,
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LOC_FPUREGISTER,
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LOC_MMREGISTER :
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exclude(tempinfo^.flags,ti_valid);
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end;
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end;
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procedure tcgtemprefnode.changelocation(const ref: treference);
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begin
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{ check if the temp is valid }
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if not(ti_valid in tempinfo^.flags) then
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internalerror(200306081);
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if (tempinfo^.location.loc<>LOC_REFERENCE) then
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internalerror(2004020203);
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if (tempinfo^.temptype = tt_persistent) then
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tg.ChangeTempType(current_asmdata.CurrAsmList,tempinfo^.location.reference,tt_normal);
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tg.ungettemp(current_asmdata.CurrAsmList,tempinfo^.location.reference);
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tempinfo^.location.reference := ref;
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tg.ChangeTempType(current_asmdata.CurrAsmList,tempinfo^.location.reference,tempinfo^.temptype);
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{ adapt location }
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location.reference := ref;
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inc(location.reference.offset,offset);
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location.reference.alignment:=newalignment(location.reference.alignment,offset);
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end;
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{*****************************************************************************
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TTEMPDELETENODE
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*****************************************************************************}
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procedure tcgtempdeletenode.pass_generate_code;
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begin
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if ti_reference in tempinfo^.flags then
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begin
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{ release_to_normal means that the temp will be freed the next
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time it's used. However, reference temps reference some other
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location that is not managed by this temp and hence cannot be
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freed }
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if release_to_normal then
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internalerror(2011052205);
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{ so we only mark this temp location as "no longer valid" when
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it's deleted (ttempdeletenodes are also used during getcopy, so
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we really do need one) }
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exclude(tempinfo^.flags,ti_valid);
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exit;
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end;
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location_reset(location,LOC_VOID,OS_NO);
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case tempinfo^.location.loc of
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LOC_REFERENCE:
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begin
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if release_to_normal then
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tg.ChangeTempType(current_asmdata.CurrAsmList,tempinfo^.location.reference,tt_normal)
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else
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begin
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tg.UnGetTemp(current_asmdata.CurrAsmList,tempinfo^.location.reference);
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exclude(tempinfo^.flags,ti_valid);
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end;
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end;
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LOC_CREGISTER,
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LOC_REGISTER:
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begin
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if not(cs_opt_regvar in current_settings.optimizerswitches) or
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(pi_has_label in current_procinfo.flags) then
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begin
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{ make sure the register allocator doesn't reuse the }
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{ register e.g. in the middle of a loop }
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{$if defined(cpu32bitalu)}
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if tempinfo^.location.size in [OS_64,OS_S64] then
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begin
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cg.a_reg_sync(current_asmdata.CurrAsmList,tempinfo^.location.register64.reghi);
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cg.a_reg_sync(current_asmdata.CurrAsmList,tempinfo^.location.register64.reglo);
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end
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else
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{$elseif defined(cpu16bitalu)}
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if tempinfo^.location.size in [OS_64,OS_S64] then
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begin
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cg.a_reg_sync(current_asmdata.CurrAsmList,tempinfo^.location.register64.reghi);
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cg.a_reg_sync(current_asmdata.CurrAsmList,GetNextReg(tempinfo^.location.register64.reghi));
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cg.a_reg_sync(current_asmdata.CurrAsmList,tempinfo^.location.register64.reglo);
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cg.a_reg_sync(current_asmdata.CurrAsmList,GetNextReg(tempinfo^.location.register64.reglo));
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end
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else
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if tempinfo^.location.size in [OS_32,OS_S32] then
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begin
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cg.a_reg_sync(current_asmdata.CurrAsmList,tempinfo^.location.register);
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cg.a_reg_sync(current_asmdata.CurrAsmList,GetNextReg(tempinfo^.location.register));
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end
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else
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{$elseif defined(cpu8bitalu)}
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if tempinfo^.location.size in [OS_64,OS_S64] then
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begin
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cg.a_reg_sync(current_asmdata.CurrAsmList,tempinfo^.location.register64.reghi);
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cg.a_reg_sync(current_asmdata.CurrAsmList,GetNextReg(tempinfo^.location.register64.reghi));
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cg.a_reg_sync(current_asmdata.CurrAsmList,GetNextReg(GetNextReg(tempinfo^.location.register64.reghi)));
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cg.a_reg_sync(current_asmdata.CurrAsmList,GetNextReg(GetNextReg(GetNextReg(tempinfo^.location.register64.reghi))));
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cg.a_reg_sync(current_asmdata.CurrAsmList,tempinfo^.location.register64.reglo);
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cg.a_reg_sync(current_asmdata.CurrAsmList,GetNextReg(tempinfo^.location.register64.reglo));
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cg.a_reg_sync(current_asmdata.CurrAsmList,GetNextReg(GetNextReg(tempinfo^.location.register64.reglo)));
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cg.a_reg_sync(current_asmdata.CurrAsmList,GetNextReg(GetNextReg(GetNextReg(tempinfo^.location.register64.reglo))));
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end
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else
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if tempinfo^.location.size in [OS_32,OS_S32] then
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begin
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cg.a_reg_sync(current_asmdata.CurrAsmList,tempinfo^.location.register);
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cg.a_reg_sync(current_asmdata.CurrAsmList,GetNextReg(tempinfo^.location.register));
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cg.a_reg_sync(current_asmdata.CurrAsmList,GetNextReg(GetNextReg(tempinfo^.location.register)));
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cg.a_reg_sync(current_asmdata.CurrAsmList,GetNextReg(GetNextReg(GetNextReg(tempinfo^.location.register))));
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end
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else
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if tempinfo^.location.size in [OS_16,OS_S16] then
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begin
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cg.a_reg_sync(current_asmdata.CurrAsmList,tempinfo^.location.register);
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cg.a_reg_sync(current_asmdata.CurrAsmList,GetNextReg(tempinfo^.location.register));
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end
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else
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{$endif}
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cg.a_reg_sync(current_asmdata.CurrAsmList,tempinfo^.location.register);
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end;
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if release_to_normal then
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tempinfo^.location.loc := LOC_REGISTER
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else
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exclude(tempinfo^.flags,ti_valid);
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end;
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LOC_CFPUREGISTER,
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LOC_FPUREGISTER:
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begin
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if not(cs_opt_regvar in current_settings.optimizerswitches) or
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(pi_has_label in current_procinfo.flags) then
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begin
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{ make sure the register allocator doesn't reuse the }
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{ register e.g. in the middle of a loop }
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cg.a_reg_sync(current_asmdata.CurrAsmList,tempinfo^.location.register);
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end;
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if release_to_normal then
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tempinfo^.location.loc := LOC_FPUREGISTER
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else
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exclude(tempinfo^.flags,ti_valid);
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end;
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LOC_CMMREGISTER,
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LOC_MMREGISTER:
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begin
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if not(cs_opt_regvar in current_settings.optimizerswitches) or
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(pi_has_label in current_procinfo.flags) then
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begin
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{ make sure the register allocator doesn't reuse the }
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{ register e.g. in the middle of a loop }
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cg.a_reg_sync(current_asmdata.CurrAsmList,tempinfo^.location.register);
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end;
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if release_to_normal then
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tempinfo^.location.loc := LOC_MMREGISTER
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else
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exclude(tempinfo^.flags,ti_valid);
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end;
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else
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internalerror(200507161);
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end;
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end;
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begin
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cnothingnode:=tcgnothingnode;
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casmnode:=tcgasmnode;
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cstatementnode:=tcgstatementnode;
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cblocknode:=tcgblocknode;
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ctempcreatenode:=tcgtempcreatenode;
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ctemprefnode:=tcgtemprefnode;
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ctempdeletenode:=tcgtempdeletenode;
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end.
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