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126 lines
3.9 KiB
ObjectPascal
126 lines
3.9 KiB
ObjectPascal
{
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Copyright (c) 2010-2013 by Jonas Maebe
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This unit implements the code generator for LLVM
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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unit cgllvm;
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{$i fpcdefs.inc}
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interface
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uses
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globtype,parabase,
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cgbase,cgutils,cgobj,cghlcpu,
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llvmbase,llvminfo,aasmbase,aasmtai,aasmdata,aasmllvm;
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type
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tcgllvm=class(thlbasecgcpu)
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public
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procedure a_label(list : TAsmList;l : tasmlabel);override;
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procedure a_jmp_always(list: TAsmList; l: tasmlabel); override;
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procedure init_register_allocators;override;
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procedure done_register_allocators;override;
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function getintregister(list:TAsmList;size:Tcgsize):Tregister;override;
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function getfpuregister(list:TAsmList;size:Tcgsize):Tregister;override;
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end;
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procedure create_codegen;
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implementation
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uses
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globals,verbose,systems,cutils,
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paramgr,fmodule,
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tgobj,rgllvm,cpubase,
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procinfo,cpupi;
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{****************************************************************************
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Assembler code
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****************************************************************************}
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procedure tcgllvm.a_label(list: TAsmList; l: tasmlabel);
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begin
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{ in llvm, every block must end with a terminator instruction, such as
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a branch -> if the previous instruction is not a terminator instruction,
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add an unconditional branch to the next block (= the one starting with
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this label) }
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if not assigned(list.last) or
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(tai(list.Last).typ<>ait_llvmins) or
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not(taillvm(list.Last).llvmopcode in llvmterminatoropcodes) then
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a_jmp_always(list,l);
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inherited;
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end;
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procedure tcgllvm.a_jmp_always(list: TAsmList; l: tasmlabel);
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begin
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list.concat(taillvm.op_lab(la_br,l));
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end;
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procedure tcgllvm.init_register_allocators;
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begin
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inherited init_register_allocators;
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rg[R_INTREGISTER]:=Trgllvm.create(R_INTREGISTER,R_SUBWHOLE,
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[0],first_int_imreg,[]);
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rg[R_FPUREGISTER]:=Trgllvm.create(R_FPUREGISTER,R_SUBWHOLE,
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[0],first_fpu_imreg,[]);
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rg[R_MMREGISTER]:=Trgllvm.create(R_MMREGISTER,R_SUBWHOLE,
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[0],first_mm_imreg,[]);
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{ every temp gets its own "base register" to uniquely identify it }
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rg[R_TEMPREGISTER]:=trgllvm.Create(R_TEMPREGISTER,R_SUBWHOLE,
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[0],1,[]);
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end;
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procedure tcgllvm.done_register_allocators;
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begin
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rg[R_INTREGISTER].free;
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rg[R_FPUREGISTER].free;
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rg[R_MMREGISTER].free;
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rg[R_TEMPREGISTER].free;
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inherited done_register_allocators;
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end;
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function tcgllvm.getintregister(list:TAsmList;size:Tcgsize):Tregister;
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begin
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{ all size determinations are based on tdef, subregisters are
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irrelevant }
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result:=rg[R_INTREGISTER].getregister(list,R_SUBWHOLE)
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end;
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function tcgllvm.getfpuregister(list:TAsmList;size:Tcgsize):Tregister;
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begin
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{ all size determinations are based on tdef, subregisters are
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irrelevant }
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result:=rg[R_FPUREGISTER].getregister(list,R_SUBWHOLE);
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end;
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procedure create_codegen;
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begin
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cg:=tcgllvm.Create;
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end;
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end.
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