mirror of
https://gitlab.com/freepascal.org/fpc/source.git
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65c3ba277c
ungetcpuregister * renamed (get|unget)explicitregister(s) to ..cpuregister * removed location-release/reference_release
725 lines
26 KiB
ObjectPascal
725 lines
26 KiB
ObjectPascal
{
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$Id$
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Copyright (c) 1998-2002 by Florian Klaempfl and Carl Eric Codere
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Generate generic inline nodes
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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unit ncginl;
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{$i fpcdefs.inc}
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interface
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uses
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node,ninl;
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type
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tcginlinenode = class(tinlinenode)
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procedure pass_2;override;
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procedure second_assert;virtual;
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procedure second_sizeoftypeof;virtual;
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procedure second_length;virtual;
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procedure second_predsucc;virtual;
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procedure second_incdec;virtual;
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procedure second_typeinfo;virtual;
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procedure second_includeexclude;virtual;
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procedure second_pi; virtual;
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procedure second_arctan_real; virtual;
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procedure second_abs_real; virtual;
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procedure second_sqr_real; virtual;
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procedure second_sqrt_real; virtual;
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procedure second_ln_real; virtual;
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procedure second_cos_real; virtual;
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procedure second_sin_real; virtual;
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procedure second_assigned; virtual;
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procedure second_prefetch; virtual;
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end;
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implementation
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uses
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globtype,systems,
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cutils,verbose,globals,fmodule,
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symconst,symdef,defutil,symsym,
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aasmbase,aasmtai,aasmcpu,parabase,
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cgbase,pass_1,pass_2,
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cpuinfo,cpubase,paramgr,procinfo,
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nbas,ncon,ncal,ncnv,nld,
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tgobj,ncgutil,
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cgutils,cgobj,
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rgobj
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{$ifndef cpu64bit}
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,cg64f32
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{$endif cpu64bit}
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;
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{*****************************************************************************
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TCGINLINENODE
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*****************************************************************************}
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procedure tcginlinenode.pass_2;
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begin
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location_reset(location,LOC_VOID,OS_NO);
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case inlinenumber of
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in_assert_x_y:
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begin
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second_Assert;
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end;
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in_sizeof_x,
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in_typeof_x :
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begin
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second_SizeofTypeOf;
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end;
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in_length_x :
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begin
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second_Length;
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end;
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in_pred_x,
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in_succ_x:
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begin
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second_PredSucc;
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end;
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in_dec_x,
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in_inc_x :
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begin
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second_IncDec;
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end;
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in_typeinfo_x:
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begin
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second_TypeInfo;
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end;
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in_include_x_y,
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in_exclude_x_y:
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begin
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second_IncludeExclude;
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end;
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in_pi:
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begin
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second_pi;
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end;
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in_sin_extended:
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begin
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second_sin_real;
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end;
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in_arctan_extended:
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begin
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second_arctan_real;
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end;
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in_abs_extended:
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begin
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second_abs_real;
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end;
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in_sqr_extended:
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begin
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second_sqr_real;
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end;
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in_sqrt_extended:
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begin
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second_sqrt_real;
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end;
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in_ln_extended:
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begin
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second_ln_real;
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end;
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in_cos_extended:
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begin
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second_cos_real;
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end;
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in_prefetch_var:
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begin
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second_prefetch;
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end;
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in_assigned_x:
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begin
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second_assigned;
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end;
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{$ifdef SUPPORT_MMX}
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in_mmx_pcmpeqb..in_mmx_pcmpgtw:
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begin
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location_reset(location,LOC_MMXREGISTER,OS_NO);
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if left.location.loc=LOC_REGISTER then
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begin
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{!!!!!!!}
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end
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else if tcallparanode(left).left.location.loc=LOC_REGISTER then
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begin
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{!!!!!!!}
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end
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else
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begin
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{!!!!!!!}
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end;
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end;
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{$endif SUPPORT_MMX}
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else internalerror(9);
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end;
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end;
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{*****************************************************************************
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ASSERT GENERIC HANDLING
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*****************************************************************************}
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procedure tcginlinenode.second_Assert;
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var
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hp2 : tstringconstnode;
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otlabel,oflabel : tasmlabel;
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paraloc1,paraloc2,
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paraloc3,paraloc4 : tcgpara;
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begin
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{ the node should be removed in the firstpass }
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if not (cs_do_assertion in aktlocalswitches) then
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internalerror(7123458);
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paraloc1.init;
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paraloc2.init;
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paraloc3.init;
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paraloc4.init;
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paramanager.getintparaloc(pocall_default,1,paraloc1);
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paramanager.getintparaloc(pocall_default,2,paraloc2);
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paramanager.getintparaloc(pocall_default,3,paraloc3);
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paramanager.getintparaloc(pocall_default,4,paraloc4);
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otlabel:=truelabel;
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oflabel:=falselabel;
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objectlibrary.getlabel(truelabel);
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objectlibrary.getlabel(falselabel);
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secondpass(tcallparanode(left).left);
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maketojumpbool(exprasmlist,tcallparanode(left).left,lr_load_regvars);
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cg.a_label(exprasmlist,falselabel);
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{ erroraddr }
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paramanager.allocparaloc(exprasmlist,paraloc4);
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cg.a_param_reg(exprasmlist,OS_ADDR,NR_FRAME_POINTER_REG,paraloc4);
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{ lineno }
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paramanager.allocparaloc(exprasmlist,paraloc3);
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cg.a_param_const(exprasmlist,OS_INT,aktfilepos.line,paraloc3);
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{ filename string }
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hp2:=cstringconstnode.createstr(current_module.sourcefiles.get_file_name(aktfilepos.fileindex),st_shortstring);
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firstpass(tnode(hp2));
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secondpass(tnode(hp2));
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if codegenerror then
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exit;
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paramanager.allocparaloc(exprasmlist,paraloc2);
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cg.a_paramaddr_ref(exprasmlist,hp2.location.reference,paraloc2);
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hp2.free;
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{ push msg }
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secondpass(tcallparanode(tcallparanode(left).right).left);
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paramanager.allocparaloc(exprasmlist,paraloc1);
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cg.a_paramaddr_ref(exprasmlist,tcallparanode(tcallparanode(left).right).left.location.reference,paraloc1);
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{ call }
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paramanager.freeparaloc(exprasmlist,paraloc1);
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paramanager.freeparaloc(exprasmlist,paraloc2);
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paramanager.freeparaloc(exprasmlist,paraloc3);
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paramanager.freeparaloc(exprasmlist,paraloc4);
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cg.alloccpuregisters(exprasmlist,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
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cg.a_call_name(exprasmlist,'FPC_ASSERT');
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cg.dealloccpuregisters(exprasmlist,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
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cg.a_label(exprasmlist,truelabel);
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truelabel:=otlabel;
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falselabel:=oflabel;
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paraloc1.done;
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paraloc2.done;
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paraloc3.done;
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paraloc4.done;
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end;
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{*****************************************************************************
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SIZEOF / TYPEOF GENERIC HANDLING
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*****************************************************************************}
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{ second_handle_ the sizeof and typeof routines }
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procedure tcginlinenode.second_SizeOfTypeOf;
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var
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href,
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hrefvmt : treference;
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hregister : tregister;
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begin
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if inlinenumber=in_sizeof_x then
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location_reset(location,LOC_REGISTER,OS_INT)
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else
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location_reset(location,LOC_REGISTER,OS_ADDR);
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{ for both cases load vmt }
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if left.nodetype=typen then
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begin
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hregister:=cg.getaddressregister(exprasmlist);
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reference_reset_symbol(href,objectlibrary.newasmsymbol(tobjectdef(left.resulttype.def).vmt_mangledname,AB_EXTERNAL,AT_DATA),0);
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cg.a_loadaddr_ref_reg(exprasmlist,href,hregister);
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end
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else
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begin
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secondpass(left);
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hregister:=cg.getaddressregister(exprasmlist);
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{ handle self inside a method of a class }
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case left.location.loc of
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LOC_CREGISTER,
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LOC_REGISTER :
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begin
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if (left.resulttype.def.deftype=classrefdef) or
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(po_staticmethod in current_procinfo.procdef.procoptions) then
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cg.a_load_reg_reg(exprasmlist,OS_ADDR,OS_ADDR,left.location.register,hregister)
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else
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begin
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{ load VMT pointer }
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reference_reset_base(hrefvmt,left.location.register,tobjectdef(left.resulttype.def).vmt_offset);
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cg.a_load_ref_reg(exprasmlist,OS_ADDR,OS_ADDR,hrefvmt,hregister);
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end
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end;
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LOC_REFERENCE,
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LOC_CREFERENCE :
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begin
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if is_class(left.resulttype.def) then
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begin
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{ deref class }
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cg.a_load_ref_reg(exprasmlist,OS_ADDR,OS_ADDR,left.location.reference,hregister);
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cg.g_maybe_testself(exprasmlist,hregister);
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{ load VMT pointer }
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reference_reset_base(hrefvmt,hregister,tobjectdef(left.resulttype.def).vmt_offset);
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cg.a_load_ref_reg(exprasmlist,OS_ADDR,OS_ADDR,hrefvmt,hregister);
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end
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else
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begin
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{ load VMT pointer, but not for classrefdefs }
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if (left.resulttype.def.deftype=objectdef) then
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inc(left.location.reference.offset,tobjectdef(left.resulttype.def).vmt_offset);
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cg.a_load_ref_reg(exprasmlist,OS_ADDR,OS_ADDR,left.location.reference,hregister);
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end;
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end;
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else
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internalerror(200301301);
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end;
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end;
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{ in sizeof load size }
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if inlinenumber=in_sizeof_x then
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begin
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reference_reset_base(href,hregister,0);
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hregister:=cg.getintregister(exprasmlist,OS_INT);
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cg.a_load_ref_reg(exprasmlist,OS_INT,OS_INT,href,hregister);
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end;
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location.register:=hregister;
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end;
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{*****************************************************************************
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LENGTH GENERIC HANDLING
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*****************************************************************************}
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procedure tcginlinenode.second_Length;
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var
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lengthlab : tasmlabel;
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hregister : tregister;
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href : treference;
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begin
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secondpass(left);
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if is_shortstring(left.resulttype.def) then
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begin
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location_copy(location,left.location);
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location.size:=OS_8;
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end
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else
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begin
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{ length in ansi/wide strings is at offset -sizeof(aint) }
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location_force_reg(exprasmlist,left.location,OS_ADDR,false);
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objectlibrary.getlabel(lengthlab);
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cg.a_cmp_const_reg_label(exprasmlist,OS_ADDR,OC_EQ,0,left.location.register,lengthlab);
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reference_reset_base(href,left.location.register,-sizeof(aint));
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hregister:=cg.makeregsize(exprasmlist,left.location.register,OS_INT);
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cg.a_load_ref_reg(exprasmlist,OS_INT,OS_INT,href,hregister);
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cg.a_label(exprasmlist,lengthlab);
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location_reset(location,LOC_REGISTER,OS_INT);
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location.register:=hregister;
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end;
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end;
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{*****************************************************************************
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PRED/SUCC GENERIC HANDLING
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*****************************************************************************}
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procedure tcginlinenode.second_PredSucc;
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var
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cgsize : TCGSize;
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cgop : topcg;
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begin
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secondpass(left);
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if inlinenumber=in_pred_x then
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cgop:=OP_SUB
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else
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cgop:=OP_ADD;
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cgsize:=def_cgsize(resulttype.def);
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{ we need a value in a register }
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location_copy(location,left.location);
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location_force_reg(exprasmlist,location,cgsize,false);
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{$ifndef cpu64bit}
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if cgsize in [OS_64,OS_S64] then
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cg64.a_op64_const_reg(exprasmlist,cgop,1,location.register64)
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else
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{$endif cpu64bit}
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cg.a_op_const_reg(exprasmlist,cgop,location.size,1,location.register);
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cg.g_rangecheck(exprasmlist,location,resulttype.def,resulttype.def);
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end;
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{*****************************************************************************
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INC/DEC GENERIC HANDLING
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*****************************************************************************}
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procedure tcginlinenode.second_IncDec;
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const
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addsubop:array[in_inc_x..in_dec_x] of TOpCG=(OP_ADD,OP_SUB);
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var
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addvalue : TConstExprInt;
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addconstant : boolean;
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{$ifndef cpu64bit}
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hregisterhi,
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{$endif cpu64bit}
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hregister : tregister;
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cgsize : tcgsize;
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begin
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{ set defaults }
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addconstant:=true;
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{ load first parameter, must be a reference }
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secondpass(tcallparanode(left).left);
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cgsize:=def_cgsize(tcallparanode(left).left.resulttype.def);
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{ get addvalue }
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case tcallparanode(left).left.resulttype.def.deftype of
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orddef,
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enumdef :
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addvalue:=1;
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pointerdef :
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begin
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if is_void(tpointerdef(tcallparanode(left).left.resulttype.def).pointertype.def) then
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addvalue:=1
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else
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addvalue:=tpointerdef(tcallparanode(left).left.resulttype.def).pointertype.def.size;
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end;
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else
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internalerror(10081);
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end;
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{ second_ argument specified?, must be a s32bit in register }
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if assigned(tcallparanode(left).right) then
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begin
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secondpass(tcallparanode(tcallparanode(left).right).left);
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{ when constant, just multiply the addvalue }
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if is_constintnode(tcallparanode(tcallparanode(left).right).left) then
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addvalue:=addvalue*get_ordinal_value(tcallparanode(tcallparanode(left).right).left)
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else
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begin
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location_force_reg(exprasmlist,tcallparanode(tcallparanode(left).right).left.location,cgsize,addvalue<=1);
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hregister:=tcallparanode(tcallparanode(left).right).left.location.register;
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{$ifndef cpu64bit}
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hregisterhi:=tcallparanode(tcallparanode(left).right).left.location.registerhigh;
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{$endif cpu64bit}
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{ insert multiply with addvalue if its >1 }
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if addvalue>1 then
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cg.a_op_const_reg(exprasmlist,OP_IMUL,cgsize,addvalue,hregister);
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addconstant:=false;
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end;
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end;
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{ write the add instruction }
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if addconstant then
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begin
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{$ifndef cpu64bit}
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if cgsize in [OS_64,OS_S64] then
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cg64.a_op64_const_loc(exprasmlist,addsubop[inlinenumber],addvalue,tcallparanode(left).left.location)
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else
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{$endif cpu64bit}
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cg.a_op_const_loc(exprasmlist,addsubop[inlinenumber],
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aint(addvalue),tcallparanode(left).left.location);
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end
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else
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begin
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{$ifndef cpu64bit}
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if cgsize in [OS_64,OS_S64] then
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cg64.a_op64_reg_loc(exprasmlist,addsubop[inlinenumber],
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joinreg64(hregister,hregisterhi),tcallparanode(left).left.location)
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else
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{$endif cpu64bit}
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cg.a_op_reg_loc(exprasmlist,addsubop[inlinenumber],
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hregister,tcallparanode(left).left.location);
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end;
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cg.g_overflowcheck(exprasmlist,tcallparanode(left).left.location,tcallparanode(left).resulttype.def);
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cg.g_rangecheck(exprasmlist,tcallparanode(left).left.location,tcallparanode(left).left.resulttype.def,
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tcallparanode(left).left.resulttype.def);
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end;
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{*****************************************************************************
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TYPEINFO GENERIC HANDLING
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*****************************************************************************}
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procedure tcginlinenode.second_typeinfo;
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var
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href : treference;
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begin
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location_reset(location,LOC_REGISTER,OS_ADDR);
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location.register:=cg.getaddressregister(exprasmlist);
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reference_reset_symbol(href,tstoreddef(left.resulttype.def).get_rtti_label(fullrtti),0);
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cg.a_loadaddr_ref_reg(exprasmlist,href,location.register);
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end;
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{*****************************************************************************
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INCLUDE/EXCLUDE GENERIC HANDLING
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*****************************************************************************}
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procedure tcginlinenode.second_IncludeExclude;
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var
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bitsperop,l : longint;
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opsize : tcgsize;
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cgop : topcg;
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addrreg2,addrreg,
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hregister,hregister2: tregister;
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use_small : boolean;
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href : treference;
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begin
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opsize:=OS_32;
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bitsperop:=(8*tcgsize2size[opsize]);
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secondpass(tcallparanode(left).left);
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if tcallparanode(tcallparanode(left).right).left.nodetype=ordconstn then
|
|
begin
|
|
{ calculate bit position }
|
|
l:=1 shl (tordconstnode(tcallparanode(tcallparanode(left).right).left).value mod bitsperop);
|
|
|
|
{ determine operator }
|
|
if inlinenumber=in_include_x_y then
|
|
cgop:=OP_OR
|
|
else
|
|
begin
|
|
cgop:=OP_AND;
|
|
l:=not(l);
|
|
end;
|
|
case tcallparanode(left).left.location.loc of
|
|
LOC_REFERENCE :
|
|
begin
|
|
inc(tcallparanode(left).left.location.reference.offset,
|
|
(tordconstnode(tcallparanode(tcallparanode(left).right).left).value div bitsperop)*tcgsize2size[opsize]);
|
|
cg.a_op_const_ref(exprasmlist,cgop,opsize,l,tcallparanode(left).left.location.reference);
|
|
end;
|
|
LOC_CREGISTER :
|
|
cg.a_op_const_reg(exprasmlist,cgop,tcallparanode(left).left.location.size,l,tcallparanode(left).left.location.register);
|
|
else
|
|
internalerror(200405021);
|
|
end;
|
|
end
|
|
else
|
|
begin
|
|
use_small:=
|
|
{ set type }
|
|
(tsetdef(tcallparanode(left).left.resulttype.def).settype=smallset)
|
|
and
|
|
{ elemenut number between 1 and 32 }
|
|
((tcallparanode(tcallparanode(left).right).left.resulttype.def.deftype=orddef) and
|
|
(torddef(tcallparanode(tcallparanode(left).right).left.resulttype.def).high<=32) or
|
|
(tcallparanode(tcallparanode(left).right).left.resulttype.def.deftype=enumdef) and
|
|
(tenumdef(tcallparanode(tcallparanode(left).right).left.resulttype.def).max<=32));
|
|
|
|
{ generate code for the element to set }
|
|
secondpass(tcallparanode(tcallparanode(left).right).left);
|
|
|
|
{ bitnumber - which must be loaded into register }
|
|
hregister:=cg.getintregister(exprasmlist,opsize);
|
|
hregister2:=cg.getintregister(exprasmlist,opsize);
|
|
|
|
cg.a_load_loc_reg(exprasmlist,opsize,
|
|
tcallparanode(tcallparanode(left).right).left.location,hregister);
|
|
|
|
if use_small then
|
|
begin
|
|
{ hregister contains the bitnumber to add }
|
|
cg.a_load_const_reg(exprasmlist, opsize, 1, hregister2);
|
|
cg.a_op_reg_reg(exprasmlist, OP_SHL, opsize, hregister, hregister2);
|
|
|
|
{ possiblities :
|
|
bitnumber : LOC_REFERENCE, LOC_REGISTER, LOC_CREGISTER
|
|
set value : LOC_REFERENCE, LOC_REGISTER
|
|
}
|
|
{ location of set }
|
|
if (tcallparanode(left).left.location.loc=LOC_REFERENCE) then
|
|
begin
|
|
if inlinenumber=in_include_x_y then
|
|
begin
|
|
cg.a_op_reg_ref(exprasmlist, OP_OR, opsize, hregister2,
|
|
tcallparanode(left).left.location.reference);
|
|
end
|
|
else
|
|
begin
|
|
cg.a_op_reg_reg(exprasmlist, OP_NOT, opsize, hregister2,hregister2);
|
|
cg.a_op_reg_ref(exprasmlist, OP_AND, opsize, hregister2,
|
|
tcallparanode(left).left.location.reference);
|
|
end;
|
|
end
|
|
else
|
|
internalerror(20020728);
|
|
end
|
|
else
|
|
begin
|
|
{ possiblities :
|
|
bitnumber : LOC_REFERENCE, LOC_REGISTER, LOC_CREGISTER
|
|
set value : LOC_REFERENCE
|
|
}
|
|
{ hregister contains the bitnumber (div 32 to get the correct offset) }
|
|
{ hregister contains the bitnumber to add }
|
|
|
|
cg.a_op_const_reg_reg(exprasmlist, OP_SHR, opsize, 5, hregister,hregister2);
|
|
cg.a_op_const_reg(exprasmlist, OP_SHL, opsize, 2, hregister2);
|
|
addrreg:=cg.getaddressregister(exprasmlist);
|
|
{ we need an extra address register to be able to do an ADD operation }
|
|
addrreg2:=cg.getaddressregister(exprasmlist);
|
|
cg.a_load_reg_reg(exprasmlist,opsize,OS_ADDR,hregister2,addrreg2);
|
|
{ calculate the correct address of the operand }
|
|
cg.a_loadaddr_ref_reg(exprasmlist, tcallparanode(left).left.location.reference,addrreg);
|
|
cg.a_op_reg_reg(exprasmlist, OP_ADD, OS_ADDR, addrreg2, addrreg);
|
|
|
|
{ hregister contains the bitnumber to add }
|
|
cg.a_load_const_reg(exprasmlist, opsize, 1, hregister2);
|
|
cg.a_op_const_reg(exprasmlist, OP_AND, opsize, 31, hregister);
|
|
cg.a_op_reg_reg(exprasmlist, OP_SHL, opsize, hregister, hregister2);
|
|
|
|
reference_reset_base(href,addrreg,0);
|
|
|
|
if inlinenumber=in_include_x_y then
|
|
cg.a_op_reg_ref(exprasmlist, OP_OR, opsize, hregister2, href)
|
|
else
|
|
begin
|
|
cg.a_op_reg_reg(exprasmlist, OP_NOT, opsize, hregister2, hregister2);
|
|
cg.a_op_reg_ref(exprasmlist, OP_AND, opsize, hregister2, href);
|
|
end;
|
|
end;
|
|
end;
|
|
end;
|
|
|
|
|
|
{*****************************************************************************
|
|
FLOAT GENERIC HANDLING
|
|
*****************************************************************************}
|
|
|
|
{
|
|
These routines all call internal RTL routines, so if they are
|
|
called here, they give an internal error
|
|
}
|
|
procedure tcginlinenode.second_pi;
|
|
begin
|
|
internalerror(20020718);
|
|
end;
|
|
|
|
procedure tcginlinenode.second_arctan_real;
|
|
begin
|
|
internalerror(20020718);
|
|
end;
|
|
|
|
procedure tcginlinenode.second_abs_real;
|
|
begin
|
|
internalerror(20020718);
|
|
end;
|
|
|
|
|
|
procedure tcginlinenode.second_sqr_real;
|
|
begin
|
|
internalerror(20020718);
|
|
end;
|
|
|
|
procedure tcginlinenode.second_sqrt_real;
|
|
begin
|
|
internalerror(20020718);
|
|
end;
|
|
|
|
procedure tcginlinenode.second_ln_real;
|
|
begin
|
|
internalerror(20020718);
|
|
end;
|
|
|
|
procedure tcginlinenode.second_cos_real;
|
|
begin
|
|
internalerror(20020718);
|
|
end;
|
|
|
|
procedure tcginlinenode.second_sin_real;
|
|
begin
|
|
internalerror(20020718);
|
|
end;
|
|
|
|
|
|
procedure tcginlinenode.second_prefetch;
|
|
begin
|
|
end;
|
|
|
|
|
|
{*****************************************************************************
|
|
ASSIGNED GENERIC HANDLING
|
|
*****************************************************************************}
|
|
|
|
procedure tcginlinenode.second_assigned;
|
|
begin
|
|
secondpass(tcallparanode(left).left);
|
|
{ force left to be an OS_ADDR, since in case of method procvars }
|
|
{ the size is 2*OS_ADDR (JM) }
|
|
cg.a_cmp_const_loc_label(exprasmlist,OS_ADDR,OC_NE,0,tcallparanode(left).left.location,truelabel);
|
|
cg.a_jmp_always(exprasmlist,falselabel);
|
|
location_reset(location,LOC_JUMP,OS_NO);
|
|
end;
|
|
|
|
|
|
begin
|
|
cinlinenode:=tcginlinenode;
|
|
end.
|
|
|
|
{
|
|
$Log$
|
|
Revision 1.64 2004-09-25 14:23:54 peter
|
|
* ungetregister is now only used for cpuregisters, renamed to
|
|
ungetcpuregister
|
|
* renamed (get|unget)explicitregister(s) to ..cpuregister
|
|
* removed location-release/reference_release
|
|
|
|
Revision 1.63 2004/09/21 17:25:12 peter
|
|
* paraloc branch merged
|
|
|
|
Revision 1.62.4.1 2004/08/31 20:43:06 peter
|
|
* paraloc patch
|
|
|
|
Revision 1.62 2004/08/16 21:00:15 peter
|
|
* range checks fixed
|
|
|
|
Revision 1.61 2004/07/12 17:58:19 peter
|
|
* remove maxlen field from ansistring/widestrings
|
|
|
|
Revision 1.60 2004/06/20 08:55:29 florian
|
|
* logs truncated
|
|
|
|
Revision 1.59 2004/06/16 20:07:08 florian
|
|
* dwarf branch merged
|
|
|
|
Revision 1.58 2004/05/30 21:18:22 jonas
|
|
* some optimizations and associated fixes for better regvar code
|
|
|
|
Revision 1.57 2004/05/22 23:34:28 peter
|
|
tai_regalloc.allocation changed to ratype to notify rgobj of register size changes
|
|
|
|
Revision 1.56.2.4 2004/05/02 16:49:12 peter
|
|
* 64 bit fixes
|
|
|
|
Revision 1.56.2.3 2004/05/01 16:35:51 florian
|
|
* fixed length(<ansi/widestring>) for 64 Bit CPUs
|
|
|
|
}
|