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423 lines
15 KiB
PHP
423 lines
15 KiB
PHP
{
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Copyright (C) 2013 by Max Nazhalov
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This file, in conjunction with FLT_CORE.INC, implements 2-way conversion
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among the binary floating-point value and its ASCII representation.
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This library is free software; you can redistribute it and/or modify it
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under the terms of the GNU Library General Public License as published by
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the Free Software Foundation; either version 2 of the License, or (at your
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option) any later version with the following modification:
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As a special exception, the copyright holders of this library give you
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permission to link this library with independent modules to produce an
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executable, regardless of the license terms of these independent modules,
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and to copy and distribute the resulting executable under terms of your
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choice, provided that you also meet, for each linked independent module,
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the terms and conditions of the license of that module. An independent
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module is a module which is not derived from or based on this library.
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If you modify this library, you may extend this exception to your version
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of the library, but you are not obligated to do so. If you do not wish to
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do so, delete this exception statement from your version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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See the GNU Library General Public License for more details.
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You should have received a copy of the GNU Library General Public License
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along with this library; if not, write to the Free Software Foundation,
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Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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****************************************************************************
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}
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{
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Algorithm for converting floating-point values to decimal representation
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implemented here has the formal name "Grisu" (basically, "Grisu1").
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It was developed by Florian Loitsch and was presented on the PLDI forum
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in the mid-2010. Detailed algorithm description and rationale can be found
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in his article, referenced below. [1]
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This implementation is purely based on [1], extrapolating the original
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algorithm on to floating point types other than the "double": namely
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"single", "extended" and "float128".
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For self-sufficiency, inverse conversion is also implemented.
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It uses strightforward approach, with the help of high-precision integer
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routines and tables used by Grisu. The main goal was to confirm the "internal
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identity", i.e. conversion path " float -> ASCII -> float " should recover
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the original floating-point representation so long as there are enough
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significant digits provided.
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Generally, the algorithm used has two major drawbacks:
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1. Although "Grisu1" is seems precise in the sense of internal identity, as
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defined above, it is often produces suboptimal output, i.e., in
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exponential representation, output could end up with "...00001",
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"...99998" et al., despite of the fact that in those cases rounding-off
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the last 1 (or, less often, 2) digits would not break internal identity.
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Refer to [1] for further explanations.
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2. Although "Grisu1" is REALLY fast on, e.g. i386, there can be significant
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performance impact on platforms which have long floating point, but
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rather "short" integer ALU (e.g., i8086 with i8087). Despite of the fact
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that an attempt was made to use only "uint32" when converting the
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"single" back and forth, all other floating-point types unavoidably
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require and heavily use "uint64" arithmetics.
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---
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Implementation was intentionally split into 3 include files to simplify
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maintenance and to avoid complex multiple self-includings.
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This file is the root one. It, depending on the selected mode, defines
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proper conditionals, and then includes FLT_CORE.INC, which implements actual
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conversions. Basically, there are 2 possible compilation modes:
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1. If condition "fpc_softfpu_implementation" is defined before including
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this file, it is assumed to be a part of SoftFPU. In this case, file
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FLT_CORE.INC is included once per every supported floating point type.
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Naming conflicts resolved with macros.
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Supported types are selected with the following pre-defined conditionals:
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SOFTFLOAT_ASCII_FLOAT32
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SOFTFLOAT_ASCII_FLOAT64
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SOFTFLOAT_ASCII_FLOATX80
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SOFTFLOAT_ASCII_FLOAT128
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This mode is basically intended to allow testing and debugging various
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conversion scenarios without having appropriate floating point hardware,
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using only sandbox provided by the SoftFPU. An implementation example of
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this mode is shown in the accompanying file SFPU_FORMAT.PP.
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2. If condition "fpc_softfpu_implementation" is not defined, it is assumed
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to be a part of the system unit, or something else. In this case, file
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FLT_CORE.INC is included only once, and the actual floating point type
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must be defined as "ValReal" before including this file. Also, kind of
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the "ValReal" must be further specified with the following defines (in
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order of priority):
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SUPPORT_FLOAT128
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SUPPORT_EXTENDED
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SUPPORT_DOUBLE
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SUPPORT_SINGLE
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Overall behavior and definitions mimic the REAL2STR.INC file from the
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FPC source tree.
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BEWARE: there are two minor differences between the code generated for mode 1
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and mode 2, which can potentially lead to different results:
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<i> floating-point value packing and unpacking routines are implemented
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differently among these modes (see FLT_PACK.INC).
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<ii> also one internal subroutine involved into conversion to ASCII, namely
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"k_comp", has separate implementations for mode 1 and mode 2.
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Certainly, they should behave the same, and they have never been caught yet
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during testing, but who knows..
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---
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References:
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[1] Florian Loitsch. Printing Floating-Point Numbers Quickly and Accurately
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with Integers. PLDI'10, June 5-10, 2010, Toronto, Ontario, Canada.
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http://florian.loitsch.com/publications/dtoa-pldi2010.pdf?attredirects=0
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[2] IEEE 754-2008, Standard for Floating-Point Arithmetic. IEEE, New York,
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Aug. 29 2008.
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****************************************************************************
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}
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{$push}
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{$Q-,R-,B-}
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{$ifdef DEBUG}
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{$define grisu1_debug}
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{$C+}
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{$else}
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{$undef grisu1_debug}
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{$endif}
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(*-------------------------------------------------------
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| Compatibility settings
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*-------------------------------------------------------*)
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// FPC defaults to "real indefinite" QNaN value, which is negative.
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// Undefine to respect the sign provided during ASCII->float conversion.
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{$define GRISU1_A2F_QNAN_REAL_INDEFINITE}
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// Controls printing of NaN-sign.
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// Undefine to print NaN sign during float->ASCII conversion.
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{$define GRISU1_F2A_NAN_SIGNLESS} // IEEE does not interpret the sign of a NaN, so leave it defined.
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// Controls rounding of generated digits when formatting with narrowed
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// width (either fixed or exponential notation).
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// Traditionally, FPC and BP7/Delphi use "roundTiesToAway" mode.
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// Undefine to use "roundTiesToEven" approach.
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{$define GRISU1_F2A_HALF_ROUNDUP}
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// This one is a hack against Grusu sub-optimality.
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// It may be used only strictly together with GRISU1_F2A_HALF_ROUNDUP.
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// It does not violate most general rules due to the fact that it is
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// applicable only when formatting with narrowed width, where the fine
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// view is more desirable, and the precision is already lost, so it can
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// be used in general-purpose applications.
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// Refer to its implementation.
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{$define GRISU1_F2A_AGRESSIVE_ROUNDUP} // Defining this fixes several tests.
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// Controls rounding of over-required digits during ASCII->float.
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// Undefine to use "roundTiesToEven" approach. [Should have no much sense, though]
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{$undef GRISU1_A2F_HALF_ROUNDUP}
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// Controls which result is returned in case of error during ASCII->float.
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// FPC initializes result to "0.0".
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// Undefine to return (s)NAN.
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{$define GRISU1_A2F_ERROR_RET0} // Leave it defined, otherwise several irrelevant tests will break.
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// Undefine to enable SNaN support.
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// Note: IEEE [754-2008, page 31] requires (1) to recognize "SNaN" during
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// ASCII->float, and (2) to generate the "invalid FP operation" exception
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// either when SNaN is printed as "NaN", or "SNaN" is evaluated to QNaN,
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// so it would be preferable to undefine these settings,
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// but the FPC RTL is not ready for this right now..
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{$define GRISU1_F2A_NO_SNAN}
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{$define GRISU1_A2F_NO_SNAN}
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// Controls how many digits is printed for "single".
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// IEEE claims 9 digits is always enough, and it is confirmed by
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// comprehensive testing.
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// Define to print 10 digits.
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// Note: there is no much sense to print 10 digits, except that it fixes
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// the test "./tests/test/units/sysutils/tfloattostr.pp".
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// Alternate way would be to print 9 digits, and change the test to
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// compare against "6e-9" instead of "6e-10".
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{$define GRISU1_F2A_SINGLE_10DIGITS}
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(*-------------------------------------------------------
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| These conditional defines are heavily used internally,
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| so make sure they are not defined around
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*-------------------------------------------------------*)
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{$ifdef VALREAL_32}
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{$fatal VALREAL_32 should not be defined here!}
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{$endif}
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{$ifdef VALREAL_64}
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{$fatal VALREAL_64 should not be defined here!}
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{$endif}
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{$ifdef VALREAL_80}
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{$fatal VALREAL_80 should not be defined here!}
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{$endif}
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{$ifdef VALREAL_128}
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{$fatal VALREAL_128 should not be defined here!}
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{$endif}
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{$ifdef VALREAL_PACK}
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{$fatal VALREAL_PACK should not be defined here!}
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{$endif}
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(*-------------------------------------------------------
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| Floating point types formatting profile
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*-------------------------------------------------------*)
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type
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TReal_Type = (
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RT_S32REAL, // single
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RT_S64REAL, // double
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RT_S80REAL, // extended [80-bit]
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RT_SC80REAL, // extended ["C-extended"; functionally the same as RT_S80REAL, but may be different in alignment and padding]
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RT_C64BIT, // comp [legacy; just an int64 passed via float]
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RT_CURRENCY, // currency [seems never passed to str_real since it has its own dedicated converters after r5866]
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RT_S128REAL // float128
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);
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// JVM target: explicitly define this record type to avoid "ie2011032601"
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TFloatFormatProfile = record
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nDig_mantissa, nDig_exp10: integer;
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end;
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const
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float_format: array [ TReal_Type ] of TFloatFormatProfile = (
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{
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Number of mantissa digits is dictated by [2] "IEEE 754-2008", page 32.
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N = 1 + ceiling( p * log10(2) ), where p is the number of significant
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bits, i.e. 24/53/64/113 accordingly (including the implicit one if any)
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}
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// RT_S32REAL
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( nDig_mantissa: {$ifdef GRISU1_F2A_SINGLE_10DIGITS} 10 {$else} 9 {$endif};
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nDig_exp10: 2;
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),
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// RT_S64REAL
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( nDig_mantissa: 17;
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nDig_exp10: 3;
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),
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// RT_S80REAL
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( nDig_mantissa: 21;
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nDig_exp10: 4;
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),
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// RT_SC80REAL
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( nDig_mantissa: 21;
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nDig_exp10: 4;
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),
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// RT_C64BIT
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( nDig_mantissa: 19; // int64 has 19 digits
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nDig_exp10: 4; // Delphi prints exponent with 4 digits
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),
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// RT_CURRENCY [seems not used after r5866]
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( nDig_mantissa: 19;
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nDig_exp10: 2;
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),
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// RT_S128REAL
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( nDig_mantissa: 36;
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nDig_exp10: 4;
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)
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);
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C_STR_INF : string[3] = 'Inf';
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C_STR_QNAN : string[3] = 'Nan';
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{$if not ( defined(GRISU1_F2A_NO_SNAN) and defined(GRISU1_A2F_NO_SNAN) )}
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C_STR_SNAN : string[4] = 'SNan';
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{$endif GRISU1_*_NO_SNAN}
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{$ifdef fpc_softfpu_implementation}
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(****************************************************************************
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*
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* SoftPFU unit: Multiple instances for all supported floating point types
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*
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****************************************************************************)
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{$inline on}
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{$macro on}
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{$define grisu1_inline}
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{$define ValSInt:=integer}
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{$ifdef SOFTFLOAT_ASCII_FLOAT32}
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{$define VALREAL_32}
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{$undef VALREAL_64}
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{$undef VALREAL_80}
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{$undef VALREAL_128}
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// Name remapping
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{$define val_real:=ascii_to_float32}
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{$define ValReal:=float32rec}
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{$define TDIY_FP:=TDIY_FP32}
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{$define TDIY_FP_Power_of_10:=TDIY_FP32_Power_of_10}
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// Implementation
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{$info === float32<->ASCII ===}
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{$i flt_core.inc}
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{$endif SOFTFLOAT_ASCII_FLOAT32}
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{$ifdef SOFTFLOAT_ASCII_FLOAT64}
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{$undef VALREAL_32}
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{$define VALREAL_64}
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{$undef VALREAL_80}
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{$undef VALREAL_128}
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// Name remapping
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{$define val_real:=ascii_to_float64}
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{$define ValReal:=float64}
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{$define TDIY_FP:=TDIY_FP64}
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{$define TDIY_FP_Power_of_10:=TDIY_FP64_Power_of_10}
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// Implementation
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{$info === float64<->ASCII ===}
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{$i flt_core.inc}
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{$endif SOFTFLOAT_ASCII_FLOAT64}
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{$ifdef SOFTFLOAT_ASCII_FLOATX80}
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{$undef VALREAL_32}
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{$undef VALREAL_64}
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{$define VALREAL_80}
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{$undef VALREAL_128}
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// Name remapping
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{$define val_real:=ascii_to_floatx80}
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{$define ValReal:=floatx80}
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{$define TDIY_FP:=TDIY_FP96}
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{$define TDIY_FP_Power_of_10:=TDIY_FP96_Power_of_10}
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// Implementation
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{$info === floatx80<->ASCII ===}
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{$i flt_core.inc}
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{$endif SOFTFLOAT_ASCII_FLOATX80}
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{$ifdef SOFTFLOAT_ASCII_FLOAT128}
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{$undef VALREAL_32}
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{$undef VALREAL_64}
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{$undef VALREAL_80}
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{$define VALREAL_128}
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// Name remapping
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{$define val_real:=ascii_to_float128}
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{$define ValReal:=float128}
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{$define TDIY_FP:=TDIY_FP128}
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{$define TDIY_FP_Power_of_10:=TDIY_FP128_Power_of_10}
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// Implementation
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{$info === float128<->ASCII ===}
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{$i flt_core.inc}
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{$endif SOFTFLOAT_ASCII_FLOAT128}
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// Clean-up
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{$undef VALREAL_32}
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{$undef VALREAL_64}
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{$undef VALREAL_80}
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{$undef VALREAL_128}
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{$undef VALREAL_PACK}
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{$undef val_real}
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{$undef ValReal}
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{$undef ValSInt}
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{$undef TDIY_FP}
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{$undef TDIY_FP_Power_of_10}
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{$undef grisu1_inline}
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{$info ========================}
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{$else not fpc_softfpu_implementation}
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(****************************************************************************
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*
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* System unit: only one native floating point type
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*
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****************************************************************************)
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{$ifdef SYSTEMINLINE}
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{$define grisu1_inline}
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{$else}
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{$undef grisu1_inline}
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{$endif}
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{$if defined(SUPPORT_FLOAT128)}
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{$undef VALREAL_32}
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{$undef VALREAL_64}
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{$undef VALREAL_80}
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{$define VALREAL_128}
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{$elseif defined(SUPPORT_EXTENDED)}
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{$undef VALREAL_32}
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{$undef VALREAL_64}
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{$define VALREAL_80}
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{$undef VALREAL_128}
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{$elseif defined(SUPPORT_DOUBLE)}
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{$undef VALREAL_32}
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{$define VALREAL_64}
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{$undef VALREAL_80}
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{$undef VALREAL_128}
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{$elseif defined(SUPPORT_SINGLE)}
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{$define VALREAL_32}
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{$undef VALREAL_64}
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{$undef VALREAL_80}
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{$undef VALREAL_128}
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{$else}
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{$error Unrecognized ValReal type}
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{$endif SUPPORT_*}
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// Implementation
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{$i flt_core.inc}
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// Clean-up
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{ undef VALREAL_32}
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{ undef VALREAL_64}
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{ undef VALREAL_80}
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{ undef VALREAL_128}
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{$undef VALREAL_PACK}
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{$undef grisu1_inline}
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{$endif fpc_softfpu_implementation}
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{$pop}
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