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352 lines
13 KiB
ObjectPascal
352 lines
13 KiB
ObjectPascal
{ $Id$
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Copyright (c) 1998-2002 by Florian Klaempfl
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Generate SPARC assembler for type converting nodes
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************}
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unit ncpucnv;
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{$i fpcdefs.inc}
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interface
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uses
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node,ncnv,ncgcnv,defcmp;
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type
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tsparctypeconvnode = class(TCgTypeConvNode)
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protected
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{ procedure second_int_to_int;override; }
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{ procedure second_string_to_string;override; }
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{ procedure second_cstring_to_pchar;override; }
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{ procedure second_string_to_chararray;override; }
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{ procedure second_array_to_pointer;override; }
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function first_int_to_real: tnode; override;
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{ procedure second_pointer_to_array;override; }
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{ procedure second_chararray_to_string;override; }
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{ procedure second_char_to_string;override; }
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procedure second_int_to_real;override;
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procedure second_real_to_real;override;
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{ procedure second_cord_to_pointer;override; }
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{ procedure second_proc_to_procvar;override; }
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{ procedure second_bool_to_int;override; }
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procedure second_int_to_bool;override;
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{ procedure second_load_smallset;override; }
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{ procedure second_ansistring_to_pchar;override; }
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{ procedure second_pchar_to_string;override; }
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{ procedure second_class_to_intf;override; }
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{ procedure second_char_to_char;override; }
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end;
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implementation
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uses
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verbose,globals,systems,
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symconst,symdef,aasmbase,aasmtai,
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defutil,
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cgbase,cgutils,pass_1,pass_2,
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ncon,ncal,
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ncgutil,
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cpubase,aasmcpu,
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tgobj,cgobj;
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{*****************************************************************************
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FirstTypeConv
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*****************************************************************************}
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function tsparctypeconvnode.first_int_to_real: tnode;
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var
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fname: string[19];
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begin
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{ converting a 64bit integer to a float requires a helper }
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if is_64bitint(left.resulttype.def) or
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is_currency(left.resulttype.def) then
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begin
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{ hack to avoid double division by 10000, as it's
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already done by resulttypepass.resulttype_int_to_real }
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if is_currency(left.resulttype.def) then
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left.resulttype := s64inttype;
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if is_signed(left.resulttype.def) then
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fname := 'fpc_int64_to_double'
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else
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fname := 'fpc_qword_to_double';
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result := ccallnode.createintern(fname,ccallparanode.create(
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left,nil));
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left:=nil;
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firstpass(result);
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exit;
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end
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else
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{ other integers are supposed to be 32 bit }
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begin
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if is_signed(left.resulttype.def) then
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inserttypeconv(left,s32inttype)
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else
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inserttypeconv(left,u32inttype);
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firstpass(left);
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end;
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result := nil;
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if registersfpu<1 then
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registersfpu:=1;
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expectloc:=LOC_FPUREGISTER;
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end;
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{*****************************************************************************
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SecondTypeConv
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*****************************************************************************}
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procedure tsparctypeconvnode.second_int_to_real;
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procedure loadsigned;
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begin
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location_force_mem(exprasmlist,left.location);
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location.register:=cg.getfpuregister(exprasmlist,location.size);
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{ Load memory in fpu register }
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cg.a_loadfpu_ref_reg(exprasmlist,OS_F32,left.location.reference,location.register);
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tg.ungetiftemp(exprasmlist,left.location.reference);
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{ Convert value in fpu register from integer to float }
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case tfloatdef(resulttype.def).typ of
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s32real:
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exprasmlist.concat(taicpu.op_reg_reg(A_FiTOs,location.register,location.register));
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s64real:
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exprasmlist.concat(taicpu.op_reg_reg(A_FiTOd,location.register,location.register));
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s128real:
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exprasmlist.concat(taicpu.op_reg_reg(A_FiTOq,location.register,location.register));
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else
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internalerror(200408011);
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end;
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end;
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var
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href : treference;
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hregister : tregister;
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l1,l2 : tasmlabel;
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begin
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location_reset(location,LOC_FPUREGISTER,def_cgsize(resulttype.def));
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if is_signed(left.resulttype.def) then
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loadsigned
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else
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begin
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objectlibrary.getdatalabel(l1);
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objectlibrary.getlabel(l2);
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reference_reset_symbol(href,l1,0);
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hregister:=cg.getintregister(exprasmlist,OS_32);
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cg.a_load_loc_reg(exprasmlist,OS_32,left.location,hregister);
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loadsigned;
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exprasmList.concat(Taicpu.op_reg_reg(A_CMP,hregister,NR_G0));
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cg.a_jmp_flags(exprasmlist,F_GE,l2);
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case tfloatdef(resulttype.def).typ of
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{ converting dword to s64real first and cut off at the end avoids precision loss }
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s32real,
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s64real:
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begin
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hregister:=cg.getfpuregister(exprasmlist,OS_F64);
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consts.concat(tai_align.create(const_align(8)));
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consts.concat(Tai_label.Create(l1));
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{ I got this constant from a test program (FK) }
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consts.concat(Tai_const.Create_32bit($41f00000));
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consts.concat(Tai_const.Create_32bit(0));
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cg.a_loadfpu_ref_reg(exprasmlist,OS_F64,href,hregister);
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exprasmList.concat(taicpu.op_reg_reg_reg(A_FADDD,location.register,hregister,location.register));
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cg.a_label(exprasmlist,l2);
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{ cut off if we should convert to single }
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if tfloatdef(resulttype.def).typ=s32real then
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begin
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hregister:=location.register;
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location.register:=cg.getfpuregister(exprasmlist,location.size);
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exprasmlist.concat(taicpu.op_reg_reg(A_FDTOS,hregister,location.register));
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end;
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end;
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else
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internalerror(200410031);
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end;
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end;
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end;
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procedure tsparctypeconvnode.second_real_to_real;
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const
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conv_op : array[tfloattype,tfloattype] of tasmop = (
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{ from: s32 s64 s80 c64 cur f128 }
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{ s32 } ( A_FMOVS,A_FDTOS,A_NONE, A_NONE, A_NONE, A_NONE ),
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{ s64 } ( A_FSTOD,A_FMOVD,A_NONE, A_NONE, A_NONE, A_NONE ),
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{ s80 } ( A_NONE, A_NONE, A_NONE, A_NONE, A_NONE, A_NONE ),
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{ c64 } ( A_NONE, A_NONE, A_NONE, A_NONE, A_NONE, A_NONE ),
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{ cur } ( A_NONE, A_NONE, A_NONE, A_NONE, A_NONE, A_NONE ),
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{ f128 } ( A_NONE, A_NONE, A_NONE, A_NONE, A_NONE, A_NONE )
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);
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var
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op : tasmop;
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begin
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location_reset(location,LOC_FPUREGISTER,def_cgsize(resulttype.def));
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location_force_fpureg(exprasmlist,left.location,false);
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{ Convert value in fpu register from integer to float }
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op:=conv_op[tfloatdef(resulttype.def).typ,tfloatdef(left.resulttype.def).typ];
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if op=A_NONE then
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internalerror(200401121);
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location.register:=cg.getfpuregister(exprasmlist,location.size);
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exprasmlist.concat(taicpu.op_reg_reg(op,left.location.register,location.register));
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end;
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procedure tsparctypeconvnode.second_int_to_bool;
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var
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hreg1,hreg2 : tregister;
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resflags : tresflags;
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opsize : tcgsize;
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hlabel,oldtruelabel,oldfalselabel : tasmlabel;
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begin
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oldtruelabel:=truelabel;
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oldfalselabel:=falselabel;
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objectlibrary.getlabel(truelabel);
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objectlibrary.getlabel(falselabel);
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secondpass(left);
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if codegenerror then
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exit;
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{ byte(boolean) or word(wordbool) or longint(longbool) must }
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{ be accepted for var parameters }
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if (nf_explicit in flags)and
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(left.resulttype.def.size=resulttype.def.size)and
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(left.location.loc in [LOC_REFERENCE,LOC_CREFERENCE,LOC_CREGISTER]) then
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begin
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location_copy(location,left.location);
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truelabel:=oldtruelabel;
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falselabel:=oldfalselabel;
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exit;
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end;
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location_reset(location,LOC_REGISTER,def_cgsize(resulttype.def));
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opsize:=def_cgsize(left.resulttype.def);
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case left.location.loc of
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LOC_CREFERENCE,LOC_REFERENCE,LOC_REGISTER,LOC_CREGISTER:
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begin
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if left.location.loc in [LOC_CREFERENCE,LOC_REFERENCE] then
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begin
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hreg2:=cg.getintregister(exprasmlist,opsize);
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cg.a_load_ref_reg(exprasmlist,opsize,opsize,left.location.reference,hreg2);
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end
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else
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hreg2:=left.location.register;
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{$ifndef cpu64bit}
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if left.location.size in [OS_64,OS_S64] then
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begin
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hreg1:=cg.getintregister(exprasmlist,OS_32);
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cg.a_op_reg_reg_reg(exprasmlist,OP_OR,OS_32,hreg2,tregister(succ(longint(hreg2))),hreg1);
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hreg2:=hreg1;
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opsize:=OS_32;
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end;
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{$endif cpu64bit}
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exprasmlist.concat(taicpu.op_reg_reg_reg(A_SUBCC,NR_G0,hreg2,NR_G0));
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hreg1:=cg.getintregister(exprasmlist,opsize);
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exprasmlist.concat(taicpu.op_reg_const_reg(A_ADDX,NR_G0,0,hreg1));
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end;
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LOC_FLAGS :
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begin
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hreg1:=cg.GetIntRegister(exprasmlist,location.size);
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resflags:=left.location.resflags;
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cg.g_flags2reg(exprasmlist,location.size,resflags,hreg1);
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end;
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LOC_JUMP :
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begin
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hreg1:=cg.getintregister(exprasmlist,OS_INT);
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objectlibrary.getlabel(hlabel);
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cg.a_label(exprasmlist,truelabel);
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cg.a_load_const_reg(exprasmlist,OS_INT,1,hreg1);
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cg.a_jmp_always(exprasmlist,hlabel);
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cg.a_label(exprasmlist,falselabel);
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cg.a_load_const_reg(exprasmlist,OS_INT,0,hreg1);
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cg.a_label(exprasmlist,hlabel);
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end;
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else
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internalerror(10062);
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end;
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location.register:=hreg1;
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if location.size in [OS_64, OS_S64] then
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internalerror(200408241);
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truelabel:=oldtruelabel;
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falselabel:=oldfalselabel;
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end;
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begin
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ctypeconvnode:=tsparctypeconvnode;
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end.
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{
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$Log$
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Revision 1.34 2004-10-15 22:54:53 florian
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* fixed currency to float conversion
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Revision 1.33 2004/10/03 19:21:56 florian
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* fixed dword->single/double on sparc
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Revision 1.32 2004/09/25 14:23:55 peter
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* ungetregister is now only used for cpuregisters, renamed to
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ungetcpuregister
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* renamed (get|unget)explicitregister(s) to ..cpuregister
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* removed location-release/reference_release
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Revision 1.31 2004/08/25 20:40:04 florian
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* fixed absolute on sparc
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Revision 1.30 2004/08/24 21:02:33 florian
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* fixed longbool(<int64>) on sparc
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Revision 1.29 2004/08/23 20:45:52 florian
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* fixed boolean(<int>) on sparc
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Revision 1.28 2004/08/22 20:11:38 florian
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* morphos now takes any pointer var. as libbase
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* alignment for sparc fixed
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* int -> double conversion on sparc fixed
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Revision 1.27 2004/08/01 19:01:10 florian
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* float to float and int to float fixed
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Revision 1.26 2004/06/20 08:55:32 florian
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* logs truncated
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Revision 1.25 2004/06/16 20:07:10 florian
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* dwarf branch merged
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Revision 1.24.2.1 2004/05/31 16:39:42 peter
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* add ungetiftemp in a few locations
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Revision 1.24 2004/03/15 14:37:06 mazen
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+ support for LongBool(Int64) type cast
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Revision 1.23 2004/02/03 22:32:54 peter
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* renamed xNNbittype to xNNinttype
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* renamed registers32 to registersint
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* replace some s32bit,u32bit with torddef([su]inttype).def.typ
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Revision 1.22 2004/01/12 22:11:39 peter
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* use localalign info for alignment for locals and temps
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* sparc fpu flags branching added
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* moved powerpc copy_valye_openarray to generic
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}
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