mirror of
https://gitlab.com/freepascal.org/fpc/source.git
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d3a4866cf5
it easier for the register allocator/optimizer to reduce the
number of intermediate stores to the stack
git-svn-id: branches/jvmbackend@18341 -
290 lines
9.8 KiB
ObjectPascal
290 lines
9.8 KiB
ObjectPascal
{
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Copyright (c) 2000-2011 by Florian Klaempfl and Jonas Maebe
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Code generation for add nodes on the JVM
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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unit njvmadd;
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{$i fpcdefs.inc}
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interface
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uses
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cgbase,
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node,ncgadd,cpubase;
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type
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{ tjvmaddnode }
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tjvmaddnode = class(tcgaddnode)
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protected
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function pass_1: tnode;override;
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function cmpnode2signedtopcmp: TOpCmp;
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procedure second_generic_compare;
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procedure pass_left_right;override;
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procedure second_addfloat;override;
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procedure second_cmpfloat;override;
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procedure second_cmpboolean;override;
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procedure second_cmpsmallset;override;
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procedure second_cmp64bit;override;
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procedure second_cmpordinal;override;
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end;
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implementation
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uses
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systems,
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cutils,verbose,
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paramgr,procinfo,
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aasmtai,aasmdata,aasmcpu,defutil,
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hlcgobj,hlcgcpu,cgutils,
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cpupara,
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ncon,nset,nadd,
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cgobj;
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{*****************************************************************************
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tjvmaddnode
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*****************************************************************************}
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function tjvmaddnode.pass_1: tnode;
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begin
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result:=inherited pass_1;
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if expectloc=LOC_FLAGS then
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expectloc:=LOC_JUMP;
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end;
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function tjvmaddnode.cmpnode2signedtopcmp: TOpCmp;
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begin
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case nodetype of
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gtn: result:=OC_GT;
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gten: result:=OC_GTE;
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ltn: result:=OC_LT;
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lten: result:=OC_LTE;
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equaln: result:=OC_EQ;
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unequaln: result:=OC_NE;
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else
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internalerror(2011010412);
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end;
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end;
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procedure tjvmaddnode.second_generic_compare;
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var
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cmpop: TOpCmp;
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begin
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pass_left_right;
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{ swap the operands to make it easier for the optimizer to optimize
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the operand stack slot reloading in case both are in a register }
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if (left.location.loc in [LOC_REGISTER,LOC_CREGISTER]) and
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(right.location.loc in [LOC_REGISTER,LOC_CREGISTER]) then
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swapleftright;
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cmpop:=cmpnode2signedtopcmp;
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if (nf_swapped in flags) then
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cmpop:=swap_opcmp(cmpop);
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location_reset(location,LOC_JUMP,OS_NO);
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if left.location.loc in [LOC_REGISTER,LOC_CREGISTER] then
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hlcg.a_cmp_loc_reg_label(current_asmdata.CurrAsmList,left.resultdef,cmpop,right.location,left.location.register,current_procinfo.CurrTrueLabel)
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else case right.location.loc of
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LOC_REGISTER,LOC_CREGISTER:
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hlcg.a_cmp_reg_loc_label(current_asmdata.CurrAsmList,left.resultdef,cmpop,right.location.register,left.location,current_procinfo.CurrTrueLabel);
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LOC_REFERENCE,LOC_CREFERENCE:
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hlcg.a_cmp_ref_loc_label(current_asmdata.CurrAsmList,left.resultdef,cmpop,right.location.reference,left.location,current_procinfo.CurrTrueLabel);
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LOC_CONSTANT:
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hlcg.a_cmp_const_loc_label(current_asmdata.CurrAsmList,left.resultdef,cmpop,right.location.value,left.location,current_procinfo.CurrTrueLabel);
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else
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internalerror(2011010413);
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end;
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hlcg.a_jmp_always(current_asmdata.CurrAsmList,current_procinfo.CurrFalseLabel);
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end;
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procedure tjvmaddnode.pass_left_right;
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begin
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swapleftright;
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inherited pass_left_right;
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end;
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procedure tjvmaddnode.second_addfloat;
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var
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op : TAsmOp;
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commutative : boolean;
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begin
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pass_left_right;
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location_reset(location,LOC_FPUREGISTER,def_cgsize(resultdef));
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location.register:=hlcg.getfpuregister(current_asmdata.CurrAsmList,resultdef);
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commutative:=false;
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case nodetype of
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addn :
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begin
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if location.size=OS_F64 then
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op:=a_dadd
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else
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op:=a_fadd;
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commutative:=true;
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end;
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muln :
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begin
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if location.size=OS_F64 then
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op:=a_dmul
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else
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op:=a_fmul;
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commutative:=true;
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end;
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subn :
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begin
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if location.size=OS_F64 then
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op:=a_dsub
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else
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op:=a_fsub;
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end;
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slashn :
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begin
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if location.size=OS_F64 then
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op:=a_ddiv
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else
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op:=a_fdiv;
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end;
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else
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internalerror(2011010402);
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end;
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{ swap the operands to make it easier for the optimizer to optimize
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the operand stack slot reloading (non-commutative operations must
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always be in the correct order though) }
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if (commutative and
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(left.location.loc in [LOC_FPUREGISTER,LOC_CFPUREGISTER]) and
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(right.location.loc in [LOC_FPUREGISTER,LOC_CFPUREGISTER])) or
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(not commutative and
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(nf_swapped in flags)) then
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swapleftright;
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thlcgjvm(hlcg).a_load_loc_stack(current_asmdata.CurrAsmList,left.resultdef,left.location);
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thlcgjvm(hlcg).a_load_loc_stack(current_asmdata.CurrAsmList,right.resultdef,right.location);
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current_asmdata.CurrAsmList.concat(taicpu.op_none(op));
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thlcgjvm(hlcg).decstack(current_asmdata.CurrAsmList,1+ord(location.size=OS_F64));
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{ could be optimized in the future by keeping the results on the stack,
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if we add code to swap the operands when necessary (a_swap for
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singles, store/load/load for doubles since there is no swap for
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2-slot elements -- also adjust expectloc in that case! }
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thlcgjvm(hlcg).a_load_stack_reg(current_asmdata.CurrAsmList,resultdef,location.register);
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end;
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procedure tjvmaddnode.second_cmpfloat;
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var
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op : tasmop;
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cmpop: TOpCmp;
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begin
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pass_left_right;
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{ swap the operands to make it easier for the optimizer to optimize
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the operand stack slot reloading in case both are in a register }
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if (left.location.loc in [LOC_FPUREGISTER,LOC_CFPUREGISTER]) and
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(right.location.loc in [LOC_FPUREGISTER,LOC_CFPUREGISTER]) then
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swapleftright;
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cmpop:=cmpnode2signedtopcmp;
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if (nf_swapped in flags) then
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cmpop:=swap_opcmp(cmpop);
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location_reset(location,LOC_JUMP,OS_NO);
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thlcgjvm(hlcg).a_load_loc_stack(current_asmdata.CurrAsmList,left.resultdef,left.location);
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thlcgjvm(hlcg).a_load_loc_stack(current_asmdata.CurrAsmList,right.resultdef,right.location);
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{ compares two floating point values and puts 1/0/-1 on stack depending
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on whether value1 >/=/< value2 }
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if left.location.size=OS_F64 then
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{ make sure that comparisons with NaNs always return false for </> }
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if nodetype in [ltn,lten] then
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op:=a_dcmpg
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else
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op:=a_dcmpl
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else if nodetype in [ltn,lten] then
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op:=a_fcmpg
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else
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op:=a_fcmpl;
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current_asmdata.CurrAsmList.concat(taicpu.op_none(op));
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thlcgjvm(hlcg).decstack(current_asmdata.CurrAsmList,(1+ord(left.location.size=OS_F64))*2-1);
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current_asmdata.CurrAsmList.concat(taicpu.op_sym(opcmp2if[cmpop],current_procinfo.CurrTrueLabel));
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thlcgjvm(hlcg).decstack(current_asmdata.CurrAsmList,1);
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hlcg.a_jmp_always(current_asmdata.CurrAsmList,current_procinfo.CurrFalseLabel);
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end;
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procedure tjvmaddnode.second_cmpboolean;
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begin
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second_generic_compare;
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end;
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procedure tjvmaddnode.second_cmpsmallset;
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begin
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if (nodetype in [equaln,unequaln]) then
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begin
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second_generic_compare;
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exit;
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end;
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case nodetype of
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lten,gten:
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begin
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pass_left_right;
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If (not(nf_swapped in flags) and
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(nodetype=lten)) or
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((nf_swapped in flags) and
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(nodetype=gten)) then
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swapleftright;
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location_reset(location,LOC_JUMP,OS_NO);
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// now we have to check whether left >= right:
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// (right and not(left)=0)
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thlcgjvm(hlcg).a_load_loc_stack(current_asmdata.CurrAsmList,left.resultdef,left.location);
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thlcgjvm(hlcg).a_op_reg_stack(current_asmdata.CurrAsmList,OP_NOT,left.resultdef,NR_NO);
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thlcgjvm(hlcg).a_op_loc_stack(current_asmdata.CurrAsmList,OP_AND,right.resultdef,right.location);
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current_asmdata.CurrAsmList.concat(taicpu.op_sym(a_ifeq,current_procinfo.CurrTrueLabel));
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thlcgjvm(hlcg).decstack(current_asmdata.CurrAsmList,1);
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hlcg.a_jmp_always(current_asmdata.CurrAsmList,current_procinfo.CurrFalseLabel);
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end;
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else
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internalerror(2011010414);
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end;
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end;
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procedure tjvmaddnode.second_cmp64bit;
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begin
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second_generic_compare;
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end;
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procedure tjvmaddnode.second_cmpordinal;
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begin
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second_generic_compare;
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end;
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begin
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caddnode:=tjvmaddnode;
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end.
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