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319 lines
12 KiB
ObjectPascal
319 lines
12 KiB
ObjectPascal
{
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Copyright (c) 1998-2002 by Florian Klaempfl and David Zhang
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Generate MIPSEL assembler for type converting nodes
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************}
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unit ncpucnv;
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{$i fpcdefs.inc}
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interface
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uses
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node, ncnv, ncgcnv, defcmp;
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type
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tMIPSELtypeconvnode = class(TCgTypeConvNode)
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protected
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{ procedure second_int_to_int;override; }
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{ procedure second_string_to_string;override; }
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{ procedure second_cstring_to_pchar;override; }
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{ procedure second_string_to_chararray;override; }
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{ procedure second_array_to_pointer;override; }
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function first_int_to_real: tnode; override;
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{ procedure second_pointer_to_array;override; }
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{ procedure second_chararray_to_string;override; }
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{ procedure second_char_to_string;override; }
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procedure second_int_to_real; override;
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procedure second_real_to_real; override;
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{ procedure second_cord_to_pointer;override; }
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{ procedure second_proc_to_procvar;override; }
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{ procedure second_bool_to_int;override; }
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procedure second_int_to_bool; override;
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{ procedure second_load_smallset;override; }
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{ procedure second_ansistring_to_pchar;override; }
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{ procedure second_pchar_to_string;override; }
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{ procedure second_class_to_intf;override; }
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{ procedure second_char_to_char;override; }
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end;
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implementation
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uses
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verbose, globtype, globals, systems,
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symconst, symdef, aasmbase, aasmtai, aasmdata,
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defutil,
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cgbase, cgutils, pass_1, pass_2, procinfo,
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ncon, ncal,
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ncgutil,
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cpubase, aasmcpu,
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tgobj, cgobj,
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hlcgobj;
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{*****************************************************************************
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FirstTypeConv
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*****************************************************************************}
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function tmipseltypeconvnode.first_int_to_real: tnode;
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var
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fname: string[19];
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begin
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{ converting a 64bit integer to a float requires a helper }
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if is_64bitint(left.resultdef) or
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is_currency(left.resultdef) then
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begin
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result:=inherited first_int_to_real;
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exit;
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end
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else
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{ other integers are supposed to be 32 bit }
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begin
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if is_signed(left.resultdef) then
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inserttypeconv(left,s32inttype)
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else
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inserttypeconv(left,u32inttype);
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firstpass(left);
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end;
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result := nil;
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expectloc:=LOC_FPUREGISTER;
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end;
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{*****************************************************************************
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SecondTypeConv
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*****************************************************************************}
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procedure tMIPSELtypeconvnode.second_int_to_real;
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procedure loadsigned;
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begin
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hlcg.location_force_mem(current_asmdata.CurrAsmList, left.location, left.resultdef);
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location.Register := cg.getfpuregister(current_asmdata.CurrAsmList, location.size);
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{ Load memory in fpu register }
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cg.a_loadfpu_ref_reg(current_asmdata.CurrAsmList, OS_F32, OS_F32, left.location.reference, location.Register);
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tg.ungetiftemp(current_asmdata.CurrAsmList, left.location.reference);
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{ Convert value in fpu register from integer to float }
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case tfloatdef(resultdef).floattype of
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s32real:
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CVT_S_W, location.Register, location.Register));
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s64real:
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CVT_D_W, location.Register, location.Register));
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else
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internalerror(200408011);
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end;
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end;
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var
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href: treference;
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hregister: tregister;
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l1, l2: tasmlabel;
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ai : TaiCpu;
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begin
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location_reset(location, LOC_FPUREGISTER, def_cgsize(resultdef));
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if is_signed(left.resultdef) then
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loadsigned
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else
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begin
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current_asmdata.getdatalabel(l1);
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current_asmdata.getjumplabel(l2);
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reference_reset_symbol(href, l1, 0, sizeof(aint));
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hregister := cg.getintregister(current_asmdata.CurrAsmList, OS_32);
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hlcg.a_load_loc_reg(current_asmdata.CurrAsmList, left.resultdef, u32inttype, left.location, hregister);
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loadsigned;
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ai := Taicpu.op_reg_reg_sym(A_BC, hregister, NR_R0, l2);
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ai.setCondition(C_GE);
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current_asmdata.CurrAsmList.concat(ai);
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case tfloatdef(resultdef).floattype of
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{ converting dword to s64real first and cut off at the end avoids precision loss }
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s32real,
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s64real:
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begin
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hregister := cg.getfpuregister(current_asmdata.CurrAsmList, OS_F64);
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new_section(current_asmdata.asmlists[al_typedconsts],sec_rodata_norel,l1.name,const_align(8));
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current_asmdata.asmlists[al_typedconsts].concat(Tai_label.Create(l1));
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{ add double number 4294967296.0 = (1ull^32) = 0x41f00000,00000000 in little endian hex}
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current_asmdata.asmlists[al_typedconsts].concat(Tai_const.Create_32bit(0));
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current_asmdata.asmlists[al_typedconsts].concat(Tai_const.Create_32bit($41f00000));
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cg.a_loadfpu_ref_reg(current_asmdata.CurrAsmList, OS_F64, OS_F64, href, hregister);
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_ADD_D, location.Register, hregister, location.Register));
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cg.a_label(current_asmdata.CurrAsmList, l2);
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{ cut off if we should convert to single }
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if tfloatdef(resultdef).floattype = s32real then
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begin
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hregister := location.Register;
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location.Register := cg.getfpuregister(current_asmdata.CurrAsmList, location.size);
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CVT_S_D, location.Register, hregister));
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end;
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end;
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else
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internalerror(200410031);
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end;
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end;
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end;
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procedure tMIPSELtypeconvnode.second_real_to_real;
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const
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conv_op: array[tfloattype, tfloattype] of tasmop = (
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{ from: s32 s64 s80 sc80 c64 cur f128 }
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{ s32 } (A_MOV_S, A_CVT_S_D, A_NONE, A_NONE, A_NONE, A_NONE, A_NONE),
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{ s64 } (A_CVT_D_S, A_MOV_D, A_NONE, A_NONE, A_NONE, A_NONE, A_NONE),
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{ s80 } (A_NONE, A_NONE, A_NONE, A_NONE, A_NONE, A_NONE, A_NONE),
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{ sc80 } (A_NONE, A_NONE, A_NONE, A_NONE, A_NONE, A_NONE, A_NONE),
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{ c64 } (A_NONE, A_NONE, A_NONE, A_NONE, A_NONE, A_NONE, A_NONE),
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{ cur } (A_NONE, A_NONE, A_NONE, A_NONE, A_NONE, A_NONE, A_NONE),
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{ f128 } (A_NONE, A_NONE, A_NONE, A_NONE, A_NONE, A_NONE, A_NONE)
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);
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var
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op: tasmop;
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begin
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location_reset(location, LOC_FPUREGISTER, def_cgsize(resultdef));
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location_force_fpureg(current_asmdata.CurrAsmList, left.location, False);
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{ Convert value in fpu register from integer to float }
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op := conv_op[tfloatdef(resultdef).floattype, tfloatdef(left.resultdef).floattype];
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if op = A_NONE then
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internalerror(200401121);
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location.Register := cg.getfpuregister(current_asmdata.CurrAsmList, location.size);
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(op, location.Register, left.location.Register));
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end;
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procedure tMIPSELtypeconvnode.second_int_to_bool;
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var
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hreg1, hreg2: tregister;
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opsize: tcgsize;
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hlabel, oldtruelabel, oldfalselabel: tasmlabel;
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newsize : tcgsize;
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href: treference;
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begin
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oldtruelabel := current_procinfo.CurrTrueLabel;
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oldfalselabel := current_procinfo.CurrFalseLabel;
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current_asmdata.getjumplabel(current_procinfo.CurrTrueLabel);
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current_asmdata.getjumplabel(current_procinfo.CurrFalseLabel);
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secondpass(left);
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if codegenerror then
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exit;
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{ Explicit typecasts from any ordinal type to a boolean type }
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{ must not change the ordinal value }
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if (nf_explicit in flags) and
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not(left.location.loc in [LOC_FLAGS,LOC_JUMP]) then
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begin
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location_copy(location,left.location);
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newsize:=def_cgsize(resultdef);
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{ change of size? change sign only if location is LOC_(C)REGISTER? Then we have to sign/zero-extend }
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if (tcgsize2size[newsize]<>tcgsize2size[left.location.size]) or
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((newsize<>left.location.size) and (location.loc in [LOC_REGISTER,LOC_CREGISTER])) then
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hlcg.location_force_reg(current_asmdata.CurrAsmList,location,left.resultdef,resultdef,true)
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else
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location.size:=newsize;
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current_procinfo.CurrTrueLabel:=oldTrueLabel;
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current_procinfo.CurrFalseLabel:=oldFalseLabel;
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exit;
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end;
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location_reset(location, LOC_REGISTER, def_cgsize(resultdef));
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opsize := def_cgsize(left.resultdef);
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case left.location.loc of
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LOC_CREFERENCE, LOC_REFERENCE, LOC_REGISTER, LOC_CREGISTER:
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begin
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if left.location.loc in [LOC_CREFERENCE, LOC_REFERENCE] then
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begin
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hreg2 := cg.getintregister(current_asmdata.CurrAsmList, opsize);
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{$ifndef cpu64bitalu}
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if left.location.size in [OS_64,OS_S64] then
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begin
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cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,left.location.reference,hreg2);
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hreg1:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
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href:=left.location.reference;
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inc(href.offset,4);
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cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,href,hreg1);
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cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_32,hreg1,hreg2,hreg2);
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end
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else
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{$endif not cpu64bitalu}
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cg.a_load_ref_reg(current_asmdata.CurrAsmList, opsize, opsize, left.location.reference, hreg2);
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end
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else
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begin
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hreg2:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
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{$ifndef cpu64bitalu}
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if left.location.size in [OS_64,OS_S64] then
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begin
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hreg2:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
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cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_32,left.location.register64.reghi,left.location.register64.reglo,hreg2);
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end
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else
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{$endif not cpu64bitalu}
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cg.a_load_reg_reg(current_asmdata.CurrAsmList,opsize,opsize,left.location.register,hreg2);
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end;
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hreg1 := cg.getintregister(current_asmdata.CurrAsmList, opsize);
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_SNE, hreg1, hreg2, NR_R0));
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end;
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LOC_JUMP:
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begin
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hreg1 := cg.getintregister(current_asmdata.CurrAsmList, OS_INT);
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current_asmdata.getjumplabel(hlabel);
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cg.a_label(current_asmdata.CurrAsmList, current_procinfo.CurrTrueLabel);
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cg.a_load_const_reg(current_asmdata.CurrAsmList, OS_INT, 1, hreg1);
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cg.a_jmp_always(current_asmdata.CurrAsmList, hlabel);
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cg.a_label(current_asmdata.CurrAsmList, current_procinfo.CurrFalseLabel);
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cg.a_load_const_reg(current_asmdata.CurrAsmList, OS_INT, 0, hreg1);
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cg.a_label(current_asmdata.CurrAsmList, hlabel);
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end;
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else
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internalerror(10062);
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end;
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{$ifndef cpu64bitalu}
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if (location.size in [OS_64,OS_S64]) then
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begin
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location.register64.reglo:=hreg1;
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location.register64.reghi:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
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if (is_cbool(resultdef)) then
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{ reglo is either 0 or -1 -> reghi has to become the same }
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cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_32,OS_32,location.register64.reglo,location.register64.reghi)
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else
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{ unsigned }
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cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_32,0,location.register64.reghi);
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end
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else
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{$endif not cpu64bitalu}
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location.Register := hreg1;
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{zfx
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if location.size in [OS_64, OS_S64] then
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internalerror(200408241);
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}
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current_procinfo.CurrTrueLabel := oldtruelabel;
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current_procinfo.CurrFalseLabel := oldfalselabel;
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end;
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begin
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ctypeconvnode := tMIPSELtypeconvnode;
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end.
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