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![]() The code generator gets two new methods, a_mul_reg_reg_pair and g_div_const_reg_reg. The first one is basically 32x32 to 64 bits multiplication (or any other size, with result having twice the size of arguments), which must be implemented for every target. The second one actually does the job, its default implementation taken from powerpc64 and is sufficiently good for all three-address targets. + Enabled optimized division for MIPS target, target-specific changes are under 30 lines. git-svn-id: trunk@27904 - |
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.. | ||
aasmcpu.pas | ||
aoptcpu.pas | ||
aoptcpub.pas | ||
aoptcpud.pas | ||
cgcpu.pas | ||
cpubase.pas | ||
cpuelf.pas | ||
cpugas.pas | ||
cpuinfo.pas | ||
cpunode.pas | ||
cpupara.pas | ||
cpupi.pas | ||
cputarg.pas | ||
hlcgcpu.pas | ||
itcpugas.pas | ||
mipsreg.dat | ||
ncpuadd.pas | ||
ncpucall.pas | ||
ncpucnv.pas | ||
ncpuinln.pas | ||
ncpuld.pas | ||
ncpumat.pas | ||
ncpuset.pas | ||
opcode.inc | ||
racpugas.pas | ||
rgcpu.pas | ||
rmipscon.inc | ||
rmipsdwf.inc | ||
rmipsgas.inc | ||
rmipsgri.inc | ||
rmipsgss.inc | ||
rmipsnor.inc | ||
rmipsnum.inc | ||
rmipsrni.inc | ||
rmipssri.inc | ||
rmipssta.inc | ||
rmipsstd.inc | ||
rmipssup.inc | ||
strinst.inc | ||
symcpu.pas |