..
aasmcpu.pas
Merged revision(s) 32020, 32036, 32536 from trunk (i386 PIC):
2016-04-07 13:51:04 +00:00
agx86att.pas
* merged the fixes_3_0-relevant parts of r31808, r31830, r31879: add support
2015-10-01 20:40:08 +00:00
agx86int.pas
--- Merging r31191 into '.':
2015-12-16 15:28:03 +00:00
agx86nsm.pas
* fixed DFA warnings for i8086
2014-08-20 15:49:27 +00:00
cga.pas
+ support for FMA intrinsic: if there is no hardware support, the compiler throws an error.
2014-04-13 19:21:54 +00:00
cgx86.pas
--- Merging r29639 into '.':
2015-02-07 14:12:56 +00:00
cpubase.pas
--- Merging r32541 into '.':
2016-04-02 16:54:40 +00:00
hlcgx86.pas
itcpugas.pas
--- Merging r32541 into '.':
2016-04-02 16:54:40 +00:00
itx86int.pas
* merge i8086 branch by Nikolay Nikolov
2013-04-25 20:23:51 +00:00
ni86mem.pas
* isolated segment-related functionality of tabsolutevarsym into i386/i8086-
2014-03-30 15:42:53 +00:00
nx86add.pas
x86: fix a variable op not initialized warning. This hopefully fixes our x86 testsuite run.
2014-08-20 10:21:06 +00:00
nx86cal.pas
--- Merging r31191 into '.':
2015-12-16 15:28:03 +00:00
nx86cnv.pas
* x86: improve x87 qword to float conversion, using single-precision constants saves space and removes need in separate load on FPU stack. No precision loss occurs because 2**64 is representable exactly even in single precision.
2014-03-03 20:41:42 +00:00
nx86con.pas
nx86inl.pas
--- Merging r30038 into '.':
2015-12-14 12:36:29 +00:00
nx86mat.pas
* make integer division instruction (div/idiv) on x86 dependent on the
2015-01-04 13:08:57 +00:00
nx86mem.pas
* preserve the segment of the reference in tx86vecnode.update_reference_reg_mul
2014-04-05 14:46:35 +00:00
nx86set.pas
* Use GOT-relative constants for i386 PIC jump tables, they don't need runtime relocations. Now almost ABI-compliant on Linux/BSD (Darwin targets unchanged). Also clean up i8086-specific stuff: using tai_const.create_type_sym(aitconst_ptr,...) generates near pointers on i8086, which is the desired goal.
2014-03-03 21:06:49 +00:00
rax86.pas
- x86 assembler readers: cleaned out operand swapping code. Operands of TInstruction are kept in AT&T order, Intel reader attaches operands right-to-left. It was effectively the same way before the change (except Intel reader attaching operands left-to-right, followed by a single swap), operand order checks all over the place were just reducing readability.
2014-11-16 16:37:26 +00:00
rax86att.pas
- x86 assembler readers: cleaned out operand swapping code. Operands of TInstruction are kept in AT&T order, Intel reader attaches operands right-to-left. It was effectively the same way before the change (except Intel reader attaching operands left-to-right, followed by a single swap), operand order checks all over the place were just reducing readability.
2014-11-16 16:37:26 +00:00
rax86int.pas
--- Merging r31191 into '.':
2015-12-16 15:28:03 +00:00
rgx86.pas
* Put under {$ifndef x86_64} more cases of instructions that do not exist in 64-bit mode.
2014-06-11 12:51:38 +00:00
symi86.pas
* i8086 and i386-specific code from tabstractprocdef.is_pushleftright moved to
2014-04-12 15:34:08 +00:00
symx86.pas
* reimplemented r28329 in a different way, as suggested by Jonas
2014-08-07 19:36:52 +00:00
x86ins.dat
--- Merging r32541 into '.':
2016-04-02 16:54:40 +00:00
x86reg.dat
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
2013-10-03 08:08:04 +00:00
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