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https://gitlab.com/freepascal.org/fpc/source.git
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426 lines
14 KiB
ObjectPascal
426 lines
14 KiB
ObjectPascal
{
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$Id$
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Copyright (c) 1993-98 by Florian Klaempfl
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Type checking and register allocation for math nodes
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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unit tcmat;
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interface
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uses
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tree;
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procedure firstmoddiv(var p : ptree);
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procedure firstshlshr(var p : ptree);
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procedure firstumminus(var p : ptree);
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procedure firstnot(var p : ptree);
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implementation
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uses
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globtype,systems,tokens,
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cobjects,verbose,globals,
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symtable,aasm,types,
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hcodegen,htypechk,pass_1
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{$ifdef i386}
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{$ifdef ag386bin}
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,i386base
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{$else}
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,i386
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{$endif}
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{$endif}
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{$ifdef m68k}
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,m68k
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{$endif}
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;
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{*****************************************************************************
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FirstModDiv
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*****************************************************************************}
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procedure firstmoddiv(var p : ptree);
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var
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t : ptree;
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rv,lv : longint;
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begin
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firstpass(p^.left);
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firstpass(p^.right);
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if codegenerror then
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exit;
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{ check for division by zero }
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rv:=p^.right^.value;
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lv:=p^.left^.value;
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if is_constintnode(p^.right) and (rv=0) then
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begin
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Message(parser_e_division_by_zero);
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{ recover }
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rv:=1;
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end;
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if is_constintnode(p^.left) and is_constintnode(p^.right) then
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begin
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case p^.treetype of
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modn : t:=genordinalconstnode(lv mod rv,s32bitdef);
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divn : t:=genordinalconstnode(lv div rv,s32bitdef);
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end;
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disposetree(p);
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firstpass(t);
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p:=t;
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exit;
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end;
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if not(p^.right^.resulttype^.deftype=orddef) or
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not(porddef(p^.right^.resulttype)^.typ in [s32bit,u32bit]) then
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p^.right:=gentypeconvnode(p^.right,s32bitdef);
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if not(p^.left^.resulttype^.deftype=orddef) or
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not(porddef(p^.left^.resulttype)^.typ in [s32bit,u32bit]) then
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p^.left:=gentypeconvnode(p^.left,s32bitdef);
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firstpass(p^.left);
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firstpass(p^.right);
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{ the resulttype depends on the right side, because the left becomes }
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{ always 64 bit }
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p^.resulttype:=p^.right^.resulttype;
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if codegenerror then
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exit;
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left_right_max(p);
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if p^.left^.registers32<=p^.right^.registers32 then
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inc(p^.registers32);
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p^.location.loc:=LOC_REGISTER;
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end;
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{*****************************************************************************
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FirstShlShr
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*****************************************************************************}
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procedure firstshlshr(var p : ptree);
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var
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t : ptree;
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regs : longint;
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begin
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firstpass(p^.left);
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firstpass(p^.right);
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if codegenerror then
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exit;
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if is_constintnode(p^.left) and is_constintnode(p^.right) then
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begin
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case p^.treetype of
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shrn : t:=genordinalconstnode(p^.left^.value shr p^.right^.value,s32bitdef);
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shln : t:=genordinalconstnode(p^.left^.value shl p^.right^.value,s32bitdef);
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end;
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disposetree(p);
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firstpass(t);
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p:=t;
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exit;
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end;
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{ 64 bit ints have their own shift handling }
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if not(is_64bitint(p^.left^.resulttype)) then
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begin
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p^.left:=gentypeconvnode(p^.left,s32bitdef);
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firstpass(p^.left);
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regs:=1;
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p^.resulttype:=s32bitdef;
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end
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else
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begin
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p^.resulttype:=p^.left^.resulttype;
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regs:=2;
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end;
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p^.right:=gentypeconvnode(p^.right,s32bitdef);
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firstpass(p^.right);
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if codegenerror then
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exit;
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if (p^.right^.treetype<>ordconstn) then
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inc(regs);
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calcregisters(p,regs,0,0);
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p^.location.loc:=LOC_REGISTER;
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end;
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{*****************************************************************************
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FirstUmMinus
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*****************************************************************************}
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procedure firstumminus(var p : ptree);
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var
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t : ptree;
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minusdef : pprocdef;
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begin
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firstpass(p^.left);
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p^.registers32:=p^.left^.registers32;
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p^.registersfpu:=p^.left^.registersfpu;
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{$ifdef SUPPORT_MMX}
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p^.registersmmx:=p^.left^.registersmmx;
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{$endif SUPPORT_MMX}
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p^.resulttype:=p^.left^.resulttype;
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if codegenerror then
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exit;
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if is_constintnode(p^.left) then
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begin
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t:=genordinalconstnode(-p^.left^.value,s32bitdef);
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disposetree(p);
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firstpass(t);
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p:=t;
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exit;
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end;
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{ nasm can not cope with negativ reals !! }
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if is_constrealnode(p^.left)
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{$ifdef i386}
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and not(aktoutputformat in [as_i386_nasmcoff,as_i386_nasmelf,as_i386_nasmobj])
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{$endif i386}
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then
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begin
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t:=genrealconstnode(-p^.left^.value_real);
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disposetree(p);
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firstpass(t);
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p:=t;
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exit;
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end;
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if (p^.left^.resulttype^.deftype=floatdef) then
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begin
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if pfloatdef(p^.left^.resulttype)^.typ=f32bit then
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begin
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if (p^.left^.location.loc<>LOC_REGISTER) and
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(p^.registers32<1) then
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p^.registers32:=1;
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p^.location.loc:=LOC_REGISTER;
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end
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else
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p^.location.loc:=LOC_FPU;
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end
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{$ifdef SUPPORT_MMX}
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else if (cs_mmx in aktlocalswitches) and
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is_mmx_able_array(p^.left^.resulttype) then
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begin
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if (p^.left^.location.loc<>LOC_MMXREGISTER) and
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(p^.registersmmx<1) then
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p^.registersmmx:=1;
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{ if saturation is on, p^.left^.resulttype isn't
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"mmx able" (FK)
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if (cs_mmx_saturation in aktlocalswitches^) and
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(porddef(parraydef(p^.resulttype)^.definition)^.typ in
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[s32bit,u32bit]) then
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CGMessage(type_e_mismatch);
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}
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end
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{$endif SUPPORT_MMX}
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else if is_64bitint(p^.left^.resulttype) then
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begin
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firstpass(p^.left);
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p^.registersfpu:=p^.left^.registersfpu;
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{$ifdef SUPPORT_MMX}
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p^.registersmmx:=p^.left^.registersmmx;
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{$endif SUPPORT_MMX}
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p^.registers32:=p^.left^.registers32;
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if codegenerror then
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exit;
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if (p^.left^.location.loc<>LOC_REGISTER) and
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(p^.registers32<2) then
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p^.registers32:=2;
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p^.location.loc:=LOC_REGISTER;
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p^.resulttype:=p^.left^.resulttype;
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end
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else if (p^.left^.resulttype^.deftype=orddef) then
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begin
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p^.left:=gentypeconvnode(p^.left,s32bitdef);
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firstpass(p^.left);
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p^.registersfpu:=p^.left^.registersfpu;
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{$ifdef SUPPORT_MMX}
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p^.registersmmx:=p^.left^.registersmmx;
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{$endif SUPPORT_MMX}
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p^.registers32:=p^.left^.registers32;
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if codegenerror then
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exit;
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if (p^.left^.location.loc<>LOC_REGISTER) and
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(p^.registers32<1) then
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p^.registers32:=1;
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p^.location.loc:=LOC_REGISTER;
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p^.resulttype:=p^.left^.resulttype;
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end
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else
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begin
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if assigned(overloaded_operators[minus]) then
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minusdef:=overloaded_operators[minus]^.definition
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else
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minusdef:=nil;
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while assigned(minusdef) do
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begin
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if (minusdef^.para1^.data=p^.left^.resulttype) and
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(minusdef^.para1^.next=nil) then
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begin
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t:=gencallnode(overloaded_operators[minus],nil);
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t^.left:=gencallparanode(p^.left,nil);
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putnode(p);
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p:=t;
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firstpass(p);
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exit;
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end;
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minusdef:=minusdef^.nextoverloaded;
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end;
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CGMessage(type_e_mismatch);
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end;
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end;
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{*****************************************************************************
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FirstNot
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*****************************************************************************}
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procedure firstnot(var p : ptree);
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var
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t : ptree;
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begin
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firstpass(p^.left);
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if codegenerror then
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exit;
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if (p^.left^.treetype=ordconstn) then
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begin
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if is_boolean(p^.left^.resulttype) then
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t:=genordinalconstnode(byte(not(boolean(p^.left^.value))),p^.left^.resulttype)
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else
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t:=genordinalconstnode(not(p^.left^.value),p^.left^.resulttype);
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disposetree(p);
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firstpass(t);
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p:=t;
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exit;
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end;
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p^.resulttype:=p^.left^.resulttype;
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p^.location.loc:=p^.left^.location.loc;
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{$ifdef SUPPORT_MMX}
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p^.registersmmx:=p^.left^.registersmmx;
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{$endif SUPPORT_MMX}
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if is_boolean(p^.resulttype) then
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begin
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p^.registers32:=p^.left^.registers32;
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{$ifdef i386}
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if p^.left^.location.loc<>LOC_JUMP then
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p^.location.loc:=LOC_FLAGS;
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{$endif def i386}
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if (p^.location.loc in [LOC_REFERENCE,LOC_MEM,LOC_CREGISTER]) then
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begin
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p^.location.loc:=LOC_REGISTER;
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if (p^.registers32<1) then
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p^.registers32:=1;
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end;
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end
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else
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{$ifdef SUPPORT_MMX}
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if (cs_mmx in aktlocalswitches) and
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is_mmx_able_array(p^.left^.resulttype) then
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begin
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if (p^.left^.location.loc<>LOC_MMXREGISTER) and
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(p^.registersmmx<1) then
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p^.registersmmx:=1;
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end
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else
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{$endif SUPPORT_MMX}
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if is_64bitint(p^.left^.resulttype) then
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begin
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p^.registers32:=p^.left^.registers32;
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if (p^.location.loc in [LOC_REFERENCE,LOC_MEM,LOC_CREGISTER]) then
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begin
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p^.location.loc:=LOC_REGISTER;
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if (p^.registers32<2) then
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p^.registers32:=2;
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end;
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end
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else
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begin
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p^.left:=gentypeconvnode(p^.left,s32bitdef);
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firstpass(p^.left);
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if codegenerror then
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exit;
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p^.resulttype:=p^.left^.resulttype;
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p^.registers32:=p^.left^.registers32;
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{$ifdef SUPPORT_MMX}
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p^.registersmmx:=p^.left^.registersmmx;
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{$endif SUPPORT_MMX}
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if (p^.left^.location.loc<>LOC_REGISTER) and
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(p^.registers32<1) then
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p^.registers32:=1;
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p^.location.loc:=LOC_REGISTER;
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end;
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p^.registersfpu:=p^.left^.registersfpu;
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end;
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end.
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{
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$Log$
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Revision 1.12 1999-02-22 02:15:53 peter
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* updates for ag386bin
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Revision 1.11 1999/02/03 10:11:11 pierre
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* fix for bug0211 for i386
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Revision 1.10 1998/12/11 16:50:24 florian
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+ typed const int64 and qword
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+ unary minus-operator q1:=-q2;
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+ not-operator
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Revision 1.9 1998/12/11 16:10:12 florian
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+ shifting for 64 bit ints added
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* bug in getexplicitregister32 fixed: usableregs wasn't decremented !!
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Revision 1.8 1998/12/11 00:03:56 peter
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+ globtype,tokens,version unit splitted from globals
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Revision 1.7 1998/11/13 10:16:38 peter
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* fixed constant not(boolean)
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Revision 1.6 1998/11/05 14:26:01 peter
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* fixed shlshr which would push ecx when not needed
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Revision 1.5 1998/10/20 13:12:39 peter
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* fixed 'not not boolean', the location was not set to register
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Revision 1.4 1998/10/13 16:50:25 pierre
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* undid some changes of Peter that made the compiler wrong
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for m68k (I had to reinsert some ifdefs)
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* removed several memory leaks under m68k
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* removed the meory leaks for assembler readers
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* cross compiling shoud work again better
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( crosscompiling sysamiga works
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but as68k still complain about some code !)
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Revision 1.3 1998/10/13 13:10:33 peter
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* new style for m68k/i386 infos and enums
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Revision 1.2 1998/10/11 14:31:20 peter
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+ checks for division by zero
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Revision 1.1 1998/09/23 20:42:24 peter
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* splitted pass_1
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}
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