mirror of
https://gitlab.com/freepascal.org/fpc/source.git
synced 2025-07-18 20:35:59 +02:00
f36e5411af
a) cpu64bitaddr, which means that we are generating a compiler which
will generate code for targets with a 64 bit address space/abi
b) cpu64bitalu, which means that we are generating a compiler which
will generate code for a cpu with support for 64 bit integer
operations (possibly running in a 32 bit address space, depending
on the cpu64bitaddr define)
All cpus which had cpu64bit set now have both the above defines set,
and none of the 32 bit cpus have cpu64bitalu set (and none will
compile with it currently)
+ pint and puint types, similar to aint/aword (not pword because that
that conflicts with pword=^word)
* several changes from aint/aword to pint/pword
* some changes of tcgsize2size[OS_INT] to sizeof(pint)
git-svn-id: trunk@10320 -
856 lines
31 KiB
ObjectPascal
856 lines
31 KiB
ObjectPascal
{
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Copyright (c) 2000-2002 by the FPC development team
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Code generation for add nodes (generic version)
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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unit ncgadd;
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{$i fpcdefs.inc}
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interface
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uses
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node,nadd,cpubase;
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type
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tcgaddnode = class(taddnode)
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{ function pass_1: tnode; override;}
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procedure pass_generate_code;override;
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protected
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{ call secondpass for both left and right }
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procedure pass_left_right;
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{ set the register of the result location }
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procedure set_result_location_reg;
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{ load left and right nodes into registers }
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procedure force_reg_left_right(allow_swap,allow_constant:boolean);
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procedure second_opfloat;
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procedure second_opboolean;
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procedure second_opsmallset;
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procedure second_op64bit;
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procedure second_opordinal;
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procedure second_addstring;virtual;
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procedure second_addfloat;virtual;abstract;
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procedure second_addboolean;virtual;
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procedure second_addsmallset;virtual;
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{$ifdef x86}
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{$ifdef SUPPORT_MMX}
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procedure second_opmmxset;virtual;abstract;
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procedure second_opmmx;virtual;abstract;
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{$endif SUPPORT_MMX}
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{$endif x86}
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procedure second_opvector;virtual;abstract;
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procedure second_add64bit;virtual;
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procedure second_addordinal;virtual;
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procedure second_cmpfloat;virtual;abstract;
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procedure second_cmpboolean;virtual;
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procedure second_cmpsmallset;virtual;abstract;
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procedure second_cmp64bit;virtual;abstract;
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procedure second_cmpordinal;virtual;abstract;
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end;
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implementation
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uses
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globtype,systems,
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cutils,verbose,globals,
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symconst,symdef,paramgr,
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aasmbase,aasmtai,aasmdata,defutil,
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cgbase,procinfo,pass_2,tgobj,
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nutils,ncon,nset,ncgutil,cgobj,cgutils
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;
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{*****************************************************************************
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Helpers
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*****************************************************************************}
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procedure tcgaddnode.pass_left_right;
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var
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tmpreg : tregister;
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isjump,
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pushedfpu : boolean;
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otl,ofl : tasmlabel;
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begin
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{ calculate the operator which is more difficult }
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firstcomplex(self);
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{ in case of constant put it to the left }
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if (left.nodetype=ordconstn) then
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swapleftright;
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isjump:=(left.expectloc=LOC_JUMP);
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if isjump then
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begin
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otl:=current_procinfo.CurrTrueLabel;
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current_asmdata.getjumplabel(current_procinfo.CurrTrueLabel);
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ofl:=current_procinfo.CurrFalseLabel;
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current_asmdata.getjumplabel(current_procinfo.CurrFalseLabel);
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end;
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secondpass(left);
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if left.location.loc in [LOC_FLAGS,LOC_JUMP] then
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location_force_reg(current_asmdata.CurrAsmList,left.location,def_cgsize(resultdef),false);
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if isjump then
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begin
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current_procinfo.CurrTrueLabel:=otl;
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current_procinfo.CurrFalseLabel:=ofl;
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end;
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{ are too few registers free? }
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pushedfpu:=false;
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{$ifdef i386}
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if (left.location.loc=LOC_FPUREGISTER) and
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(node_resources_fpu(right)>=maxfpuregs) then
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begin
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location_force_mem(current_asmdata.CurrAsmList,left.location);
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pushedfpu:=true;
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end;
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{$endif i386}
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isjump:=(right.expectloc=LOC_JUMP);
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if isjump then
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begin
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otl:=current_procinfo.CurrTrueLabel;
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current_asmdata.getjumplabel(current_procinfo.CurrTrueLabel);
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ofl:=current_procinfo.CurrFalseLabel;
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current_asmdata.getjumplabel(current_procinfo.CurrFalseLabel);
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end;
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secondpass(right);
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if right.location.loc in [LOC_FLAGS,LOC_JUMP] then
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location_force_reg(current_asmdata.CurrAsmList,right.location,def_cgsize(resultdef),false);
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if isjump then
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begin
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current_procinfo.CurrTrueLabel:=otl;
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current_procinfo.CurrFalseLabel:=ofl;
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end;
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if pushedfpu then
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begin
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{$ifdef x86}
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if use_sse(left.resultdef) then
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begin
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tmpreg := cg.getmmregister(current_asmdata.CurrAsmList,left.location.size);
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cg.a_loadmm_loc_reg(current_asmdata.CurrAsmList,left.location.size,left.location,tmpreg,mms_movescalar);
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location_freetemp(current_asmdata.CurrAsmList,left.location);
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location_reset(left.location,LOC_MMREGISTER,left.location.size);
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left.location.register := tmpreg;
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end
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else
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{$endif x86}
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begin
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tmpreg := cg.getfpuregister(current_asmdata.CurrAsmList,left.location.size);
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cg.a_loadfpu_loc_reg(current_asmdata.CurrAsmList,left.location.size,left.location,tmpreg);
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location_freetemp(current_asmdata.CurrAsmList,left.location);
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location_reset(left.location,LOC_FPUREGISTER,left.location.size);
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left.location.register := tmpreg;
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{$ifdef x86}
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{ left operand is now on top of the stack, instead of the right one! }
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if (right.location.loc=LOC_FPUREGISTER) then
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toggleflag(nf_swapped);
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{$endif x86}
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end;
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end;
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end;
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procedure tcgaddnode.set_result_location_reg;
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begin
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location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
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{$ifdef x86}
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if left.location.loc=LOC_REGISTER then
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begin
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if TCGSize2Size[left.location.size]<>TCGSize2Size[location.size] then
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internalerror(200307041);
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{$ifndef cpu64bitalu}
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if location.size in [OS_64,OS_S64] then
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begin
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location.register64.reglo := left.location.register64.reglo;
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location.register64.reghi := left.location.register64.reghi;
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end
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else
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{$endif}
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location.register := left.location.register;
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end
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else
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if right.location.loc=LOC_REGISTER then
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begin
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if TCGSize2Size[right.location.size]<>TCGSize2Size[location.size] then
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internalerror(200307042);
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{$ifndef cpu64bitalu}
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if location.size in [OS_64,OS_S64] then
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begin
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location.register64.reglo := right.location.register64.reglo;
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location.register64.reghi := right.location.register64.reghi;
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end
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else
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{$endif}
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location.register := right.location.register;
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end
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else
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{$endif}
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begin
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{$ifndef cpu64bitalu}
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if location.size in [OS_64,OS_S64] then
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begin
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location.register64.reglo := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
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location.register64.reghi := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
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end
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else
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{$endif}
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location.register := cg.getintregister(current_asmdata.CurrAsmList,location.size);
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end;
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end;
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procedure tcgaddnode.force_reg_left_right(allow_swap,allow_constant:boolean);
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begin
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if (left.location.loc<>LOC_REGISTER) and
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not(
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allow_constant and
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(left.location.loc in [LOC_CONSTANT,LOC_CREGISTER])
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) then
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location_force_reg(current_asmdata.CurrAsmList,left.location,left.location.size,false);
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if (right.location.loc<>LOC_REGISTER) and
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not(
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allow_constant and
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(right.location.loc in [LOC_CONSTANT,LOC_CREGISTER]) and
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(left.location.loc<>LOC_CONSTANT)
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) then
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location_force_reg(current_asmdata.CurrAsmList,right.location,right.location.size,false);
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{ Left is always a register, right can be register or constant }
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if left.location.loc=LOC_CONSTANT then
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begin
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{ when it is not allowed to swap we have a constant on
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left, that will give problems }
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if not allow_swap then
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internalerror(200307043);
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swapleftright;
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end;
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end;
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{*****************************************************************************
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Smallsets
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*****************************************************************************}
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procedure tcgaddnode.second_opsmallset;
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begin
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{ when a setdef is passed, it has to be a smallset }
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if is_varset(left.resultdef) or
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is_varset(right.resultdef) then
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internalerror(200203302);
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if nodetype in [equaln,unequaln,gtn,gten,lten,ltn] then
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second_cmpsmallset
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else
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second_addsmallset;
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end;
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procedure tcgaddnode.second_addsmallset;
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var
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tmpreg : tregister;
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mask,
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setbase : aint;
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cgop : TOpCg;
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opdone : boolean;
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begin
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opdone := false;
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pass_left_right;
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force_reg_left_right(true,true);
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{ setelementn is a special case, it must be on right.
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We need an extra check if left is a register because the
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default case can skip the register loading when the
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setelementn is in a register (PFV) }
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if (nf_swapped in flags) and
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(left.nodetype=setelementn) then
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swapleftright;
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if (right.nodetype=setelementn) and
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(left.location.loc<>LOC_REGISTER) then
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location_force_reg(current_asmdata.CurrAsmList,left.location,left.location.size,false);
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set_result_location_reg;
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if (left.resultdef.typ=setdef) then
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setbase:=tsetdef(left.resultdef).setbase
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else
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setbase:=tsetdef(right.resultdef).setbase;
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case nodetype of
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addn :
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begin
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{ are we adding set elements ? }
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if right.nodetype=setelementn then
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begin
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{ no range support for smallsets! }
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if assigned(tsetelementnode(right).right) then
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internalerror(43244);
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if (right.location.loc = LOC_CONSTANT) then
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begin
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if (target_info.endian=endian_big) then
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mask:=aint((aword(1) shl (resultdef.size*8-1)) shr aword(right.location.value-setbase))
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else
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mask:=aint(1 shl (right.location.value-setbase));
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cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_OR,location.size,
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mask,left.location.register,location.register);
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end
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else
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begin
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if (target_info.endian=endian_big) then
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begin
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mask:=aint((aword(1) shl (resultdef.size*8-1)));
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cgop:=OP_SHR
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end
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else
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begin
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mask:=1;
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cgop:=OP_SHL
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end;
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tmpreg := cg.getintregister(current_asmdata.CurrAsmList,location.size);
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cg.a_load_const_reg(current_asmdata.CurrAsmList,location.size,mask,tmpreg);
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location_force_reg(current_asmdata.CurrAsmList,right.location,location.size,true);
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register_maybe_adjust_setbase(current_asmdata.CurrAsmList,right.location,setbase);
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cg.a_op_reg_reg(current_asmdata.CurrAsmList,cgop,location.size,
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right.location.register,tmpreg);
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if left.location.loc <> LOC_CONSTANT then
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cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,OP_OR,location.size,tmpreg,
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left.location.register,location.register)
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else
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cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_OR,location.size,
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left.location.value,tmpreg,location.register);
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end;
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opdone := true;
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end
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else
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cgop := OP_OR;
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end;
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symdifn :
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cgop:=OP_XOR;
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muln :
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cgop:=OP_AND;
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subn :
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begin
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cgop:=OP_AND;
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if (not(nf_swapped in flags)) then
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if (right.location.loc=LOC_CONSTANT) then
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right.location.value := not(right.location.value)
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else
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opdone := true
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else if (left.location.loc=LOC_CONSTANT) then
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left.location.value := not(left.location.value)
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else
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begin
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swapleftright;
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opdone := true;
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end;
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if opdone then
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begin
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if left.location.loc = LOC_CONSTANT then
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begin
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tmpreg := cg.getintregister(current_asmdata.CurrAsmList,location.size);
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cg.a_load_const_reg(current_asmdata.CurrAsmList,location.size,
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left.location.value,tmpreg);
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cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_NOT,location.size,right.location.register,right.location.register);
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cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_AND,location.size,right.location.register,tmpreg);
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cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_INT,location.size,tmpreg,location.register);
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end
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else
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begin
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cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_NOT,right.location.size,right.location.register,right.location.register);
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cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_AND,left.location.size,right.location.register,left.location.register);
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cg.a_load_reg_reg(current_asmdata.CurrAsmList,left.location.size,location.size,left.location.register,location.register);
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end;
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end;
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end;
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else
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internalerror(2002072701);
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end;
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if not opdone then
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begin
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// these are all commutative operations
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if (left.location.loc = LOC_CONSTANT) then
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swapleftright;
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if (right.location.loc = LOC_CONSTANT) then
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cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,cgop,location.size,
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right.location.value,left.location.register,
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location.register)
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else
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cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,cgop,location.size,
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right.location.register,left.location.register,
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location.register);
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end;
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end;
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{*****************************************************************************
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Boolean
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*****************************************************************************}
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procedure tcgaddnode.second_opboolean;
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begin
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if nodetype in [ltn,lten,gtn,gten,equaln,unequaln] then
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second_cmpboolean
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else
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second_addboolean;
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end;
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procedure tcgaddnode.second_addboolean;
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var
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cgop : TOpCg;
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otl,ofl : tasmlabel;
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oldflowcontrol : tflowcontrol;
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begin
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{ And,Or will only evaluate from left to right only the
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needed nodes unless full boolean evaluation is enabled }
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if (nodetype in [orn,andn]) and
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(not(cs_full_boolean_eval in current_settings.localswitches) or
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(nf_short_bool in flags)) then
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begin
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location_reset(location,LOC_JUMP,OS_NO);
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case nodetype of
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andn :
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begin
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otl:=current_procinfo.CurrTrueLabel;
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current_asmdata.getjumplabel(current_procinfo.CurrTrueLabel);
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secondpass(left);
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maketojumpbool(current_asmdata.CurrAsmList,left,lr_load_regvars);
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cg.a_label(current_asmdata.CurrAsmList,current_procinfo.CurrTrueLabel);
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current_procinfo.CurrTrueLabel:=otl;
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end;
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orn :
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begin
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ofl:=current_procinfo.CurrFalseLabel;
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current_asmdata.getjumplabel(current_procinfo.CurrFalseLabel);
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secondpass(left);
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maketojumpbool(current_asmdata.CurrAsmList,left,lr_load_regvars);
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cg.a_label(current_asmdata.CurrAsmList,current_procinfo.CurrFalseLabel);
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current_procinfo.CurrFalseLabel:=ofl;
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end;
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else
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internalerror(200307044);
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end;
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{ these jumps mean we're now in a flow control construct }
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oldflowcontrol:=flowcontrol;
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include(flowcontrol,fc_inflowcontrol);
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secondpass(right);
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maketojumpbool(current_asmdata.CurrAsmList,right,lr_load_regvars);
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flowcontrol:=oldflowcontrol+(flowcontrol-[fc_inflowcontrol]);
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end
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else
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begin
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pass_left_right;
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force_reg_left_right(false,true);
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set_result_location_reg;
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case nodetype of
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xorn :
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cgop:=OP_XOR;
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orn :
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cgop:=OP_OR;
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andn :
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cgop:=OP_AND;
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else
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internalerror(200203247);
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end;
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if right.location.loc <> LOC_CONSTANT then
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cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,cgop,location.size,
|
|
left.location.register,right.location.register,
|
|
location.register)
|
|
else
|
|
cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,cgop,location.size,
|
|
right.location.value,left.location.register,
|
|
location.register);
|
|
end;
|
|
end;
|
|
|
|
|
|
{*****************************************************************************
|
|
64-bit
|
|
*****************************************************************************}
|
|
|
|
procedure tcgaddnode.second_op64bit;
|
|
begin
|
|
if nodetype in [ltn,lten,gtn,gten,equaln,unequaln] then
|
|
second_cmp64bit
|
|
else
|
|
second_add64bit;
|
|
end;
|
|
|
|
|
|
procedure tcgaddnode.second_add64bit;
|
|
var
|
|
op : TOpCG;
|
|
checkoverflow : boolean;
|
|
ovloc : tlocation;
|
|
begin
|
|
ovloc.loc:=LOC_VOID;
|
|
|
|
pass_left_right;
|
|
force_reg_left_right(false,true);
|
|
set_result_location_reg;
|
|
|
|
{ assume no overflow checking is required }
|
|
checkoverflow := false;
|
|
case nodetype of
|
|
addn :
|
|
begin
|
|
op:=OP_ADD;
|
|
checkoverflow:=true;
|
|
end;
|
|
subn :
|
|
begin
|
|
op:=OP_SUB;
|
|
checkoverflow:=true;
|
|
end;
|
|
xorn:
|
|
op:=OP_XOR;
|
|
orn:
|
|
op:=OP_OR;
|
|
andn:
|
|
op:=OP_AND;
|
|
muln:
|
|
begin
|
|
{ should be handled in pass_1 (JM) }
|
|
internalerror(200109051);
|
|
end;
|
|
else
|
|
internalerror(2002072705);
|
|
end;
|
|
|
|
checkoverflow:=
|
|
checkoverflow and
|
|
(left.resultdef.typ<>pointerdef) and
|
|
(right.resultdef.typ<>pointerdef);
|
|
|
|
{$ifdef cpu64bitalu}
|
|
case nodetype of
|
|
xorn,orn,andn,addn:
|
|
begin
|
|
if (right.location.loc = LOC_CONSTANT) then
|
|
cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,op,location.size,right.location.value,
|
|
left.location.register,location.register)
|
|
else
|
|
cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,op,location.size,right.location.register,
|
|
left.location.register,location.register);
|
|
end;
|
|
subn:
|
|
begin
|
|
if (nf_swapped in flags) then
|
|
swapleftright;
|
|
|
|
if left.location.loc <> LOC_CONSTANT then
|
|
begin
|
|
if right.location.loc <> LOC_CONSTANT then
|
|
// reg64 - reg64
|
|
cg.a_op_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
|
|
right.location.register,left.location.register,location.register,
|
|
checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc)
|
|
else
|
|
// reg64 - const64
|
|
cg.a_op_const_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
|
|
right.location.value,left.location.register,location.register,
|
|
checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc);
|
|
end
|
|
else
|
|
begin
|
|
// const64 - reg64
|
|
location_force_reg(current_asmdata.CurrAsmList,left.location,left.location.size,true);
|
|
cg.a_op_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
|
|
right.location.register,left.location.register,location.register,
|
|
checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc);
|
|
end;
|
|
end;
|
|
else
|
|
internalerror(2002072803);
|
|
end;
|
|
{$else cpu64bitalu}
|
|
case nodetype of
|
|
xorn,orn,andn,addn:
|
|
begin
|
|
if (right.location.loc = LOC_CONSTANT) then
|
|
cg64.a_op64_const_reg_reg_checkoverflow(current_asmdata.CurrAsmList,op,location.size,right.location.value64,
|
|
left.location.register64,location.register64,
|
|
checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc)
|
|
else
|
|
cg64.a_op64_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,op,location.size,right.location.register64,
|
|
left.location.register64,location.register64,
|
|
checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc);
|
|
end;
|
|
subn:
|
|
begin
|
|
if (nf_swapped in flags) then
|
|
swapleftright;
|
|
|
|
if left.location.loc <> LOC_CONSTANT then
|
|
begin
|
|
if right.location.loc <> LOC_CONSTANT then
|
|
// reg64 - reg64
|
|
cg64.a_op64_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
|
|
right.location.register64,left.location.register64,
|
|
location.register64,
|
|
checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc)
|
|
else
|
|
// reg64 - const64
|
|
cg64.a_op64_const_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
|
|
right.location.value64,left.location.register64,
|
|
location.register64,
|
|
checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc)
|
|
end
|
|
else
|
|
begin
|
|
// const64 - reg64
|
|
location_force_reg(current_asmdata.CurrAsmList,left.location,left.location.size,true);
|
|
cg64.a_op64_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
|
|
right.location.register64,left.location.register64,
|
|
location.register64,
|
|
checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc);
|
|
end;
|
|
end;
|
|
else
|
|
internalerror(2002072803);
|
|
end;
|
|
{$endif cpu64bitalu}
|
|
|
|
{ emit overflow check if enabled }
|
|
if checkoverflow then
|
|
cg.g_overflowcheck_loc(current_asmdata.CurrAsmList,Location,resultdef,ovloc);
|
|
end;
|
|
|
|
|
|
{*****************************************************************************
|
|
Strings
|
|
*****************************************************************************}
|
|
|
|
procedure tcgaddnode.second_addstring;
|
|
begin
|
|
{ this should already be handled in pass1 }
|
|
internalerror(2002072402);
|
|
end;
|
|
|
|
|
|
{*****************************************************************************
|
|
Floats
|
|
*****************************************************************************}
|
|
|
|
procedure tcgaddnode.second_opfloat;
|
|
begin
|
|
if nodetype in [ltn,lten,gtn,gten,equaln,unequaln] then
|
|
second_cmpfloat
|
|
else
|
|
second_addfloat;
|
|
end;
|
|
|
|
|
|
{*****************************************************************************
|
|
Ordinals
|
|
*****************************************************************************}
|
|
|
|
procedure tcgaddnode.second_opordinal;
|
|
begin
|
|
if (nodetype in [ltn,lten,gtn,gten,equaln,unequaln]) then
|
|
second_cmpordinal
|
|
else
|
|
second_addordinal;
|
|
end;
|
|
|
|
|
|
procedure tcgaddnode.second_addordinal;
|
|
var
|
|
unsigned,
|
|
checkoverflow : boolean;
|
|
cgop : topcg;
|
|
tmpreg : tregister;
|
|
ovloc : tlocation;
|
|
begin
|
|
ovloc.loc:=LOC_VOID;
|
|
|
|
pass_left_right;
|
|
force_reg_left_right(false,true);
|
|
set_result_location_reg;
|
|
|
|
{ determine if the comparison will be unsigned }
|
|
unsigned:=not(is_signed(left.resultdef)) or
|
|
not(is_signed(right.resultdef));
|
|
|
|
{ assume no overflow checking is require }
|
|
checkoverflow := false;
|
|
|
|
case nodetype of
|
|
addn:
|
|
begin
|
|
cgop:=OP_ADD;
|
|
checkoverflow:=true;
|
|
end;
|
|
xorn :
|
|
begin
|
|
cgop:=OP_XOR;
|
|
end;
|
|
orn :
|
|
begin
|
|
cgop:=OP_OR;
|
|
end;
|
|
andn:
|
|
begin
|
|
cgop:=OP_AND;
|
|
end;
|
|
muln:
|
|
begin
|
|
checkoverflow:=true;
|
|
if unsigned then
|
|
cgop:=OP_MUL
|
|
else
|
|
cgop:=OP_IMUL;
|
|
end;
|
|
subn :
|
|
begin
|
|
checkoverflow:=true;
|
|
cgop:=OP_SUB;
|
|
end;
|
|
end;
|
|
|
|
checkoverflow:=
|
|
checkoverflow and
|
|
(left.resultdef.typ<>pointerdef) and
|
|
(right.resultdef.typ<>pointerdef);
|
|
|
|
if nodetype<>subn then
|
|
begin
|
|
if (right.location.loc<>LOC_CONSTANT) then
|
|
cg.a_op_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,cgop,location.size,
|
|
left.location.register,right.location.register,
|
|
location.register,checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc)
|
|
else
|
|
cg.a_op_const_reg_reg_checkoverflow(current_asmdata.CurrAsmList,cgop,location.size,
|
|
right.location.value,left.location.register,
|
|
location.register,checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc);
|
|
end
|
|
else { subtract is a special case since its not commutative }
|
|
begin
|
|
if (nf_swapped in flags) then
|
|
swapleftright;
|
|
if left.location.loc<>LOC_CONSTANT then
|
|
begin
|
|
if right.location.loc<>LOC_CONSTANT then
|
|
cg.a_op_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
|
|
right.location.register,left.location.register,
|
|
location.register,checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc)
|
|
else
|
|
cg.a_op_const_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
|
|
right.location.value,left.location.register,
|
|
location.register,checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc);
|
|
end
|
|
else
|
|
begin
|
|
tmpreg:=cg.getintregister(current_asmdata.CurrAsmList,location.size);
|
|
cg.a_load_const_reg(current_asmdata.CurrAsmList,location.size,
|
|
left.location.value,tmpreg);
|
|
cg.a_op_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
|
|
right.location.register,tmpreg,location.register,checkoverflow and (cs_check_overflow in current_settings.localswitches),ovloc);
|
|
end;
|
|
end;
|
|
|
|
{ emit overflow check if required }
|
|
if checkoverflow then
|
|
cg.g_overflowcheck_loc(current_asmdata.CurrAsmList,Location,resultdef,ovloc);
|
|
end;
|
|
|
|
|
|
procedure tcgaddnode.second_cmpboolean;
|
|
begin
|
|
second_cmpordinal;
|
|
end;
|
|
|
|
|
|
{*****************************************************************************
|
|
pass_generate_code;
|
|
*****************************************************************************}
|
|
|
|
procedure tcgaddnode.pass_generate_code;
|
|
begin
|
|
case left.resultdef.typ of
|
|
orddef :
|
|
begin
|
|
{ handling boolean expressions }
|
|
if is_boolean(left.resultdef) and
|
|
is_boolean(right.resultdef) then
|
|
second_opboolean
|
|
{ 64bit operations }
|
|
else if is_64bit(left.resultdef) then
|
|
second_op64bit
|
|
else
|
|
second_opordinal;
|
|
end;
|
|
stringdef :
|
|
begin
|
|
second_addstring;
|
|
end;
|
|
setdef :
|
|
begin
|
|
{Normalsets are already handled in pass1 if mmx
|
|
should not be used.}
|
|
if is_varset(tsetdef(left.resultdef)) then
|
|
begin
|
|
{$ifdef SUPPORT_MMX}
|
|
{$ifdef i386}
|
|
if cs_mmx in current_settings.localswitches then
|
|
second_opmmxset
|
|
else
|
|
{$endif}
|
|
{$endif SUPPORT_MMX}
|
|
internalerror(200109041);
|
|
end
|
|
else
|
|
second_opsmallset;
|
|
end;
|
|
arraydef :
|
|
begin
|
|
{ support dynarr=nil }
|
|
if is_dynamic_array(left.resultdef) then
|
|
second_opordinal
|
|
else
|
|
if (cs_support_vectors in current_settings.globalswitches) and
|
|
is_vector(left.resultdef) then
|
|
second_opvector
|
|
{$ifdef SUPPORT_MMX}
|
|
else
|
|
if is_mmx_able_array(left.resultdef) then
|
|
second_opmmx
|
|
{$endif SUPPORT_MMX}
|
|
else
|
|
internalerror(200306016);
|
|
end;
|
|
floatdef :
|
|
second_opfloat;
|
|
else
|
|
second_opordinal;
|
|
end;
|
|
end;
|
|
|
|
begin
|
|
caddnode:=tcgaddnode;
|
|
end.
|