fpc/compiler/x86_64
2020-10-13 19:59:01 +00:00
..
aoptcpu.pas * load 0.0 by (V)XORPS/D instead of (V)PXOR in mm registers 2020-10-10 13:23:35 +00:00
aoptcpub.pas
aoptcpud.pas
cgcpu.pas
cpubase.inc
cpuelf.pas * patch by Marģers to unify internal error numbers, resolves #37888 2020-10-13 19:59:01 +00:00
cpuinfo.pas + make use of avx-512 instructions vcvtuis2s* if possible 2020-10-10 21:08:13 +00:00
cpunode.pas
cpupara.pas * mm registers 16-31 are also volatile during a call 2020-10-10 21:08:12 +00:00
cpupi.pas
cputarg.pas
hlcgcpu.pas * patch by Marģers to unify internal error numbers, resolves #37888 2020-10-13 19:59:01 +00:00
nx64add.pas
nx64cal.pas
nx64cnv.pas + make use of avx-512 instructions vcvtuis2s* if possible 2020-10-10 21:08:13 +00:00
nx64flw.pas * fix #35841 also for break and continue 2020-10-09 20:55:38 +00:00
nx64inl.pas
nx64mat.pas
nx64set.pas
r8664ari.inc
r8664att.inc
r8664con.inc
r8664dwrf.inc
r8664int.inc
r8664iri.inc
r8664nasm.inc
r8664nor.inc
r8664num.inc
r8664ot.inc
r8664rni.inc
r8664sri.inc
r8664stab.inc
r8664std.inc
rax64att.pas
rax64int.pas * patch by Marģers to unify internal error numbers, resolves #37888 2020-10-13 19:59:01 +00:00
rgcpu.pas
symcpu.pas
tripletcpu.pas
win64unw.pas * patch by Marģers to unify internal error numbers, resolves #37888 2020-10-13 19:59:01 +00:00
x8664ats.inc + support all XSAVE instructions, resolves #37864 2020-10-03 14:51:31 +00:00
x8664att.inc + support all XSAVE instructions, resolves #37864 2020-10-03 14:51:31 +00:00
x8664int.inc + support all XSAVE instructions, resolves #37864 2020-10-03 14:51:31 +00:00
x8664nop.inc + support all XSAVE instructions, resolves #37864 2020-10-03 14:51:31 +00:00
x8664op.inc + support all XSAVE instructions, resolves #37864 2020-10-03 14:51:31 +00:00
x8664pro.inc * proper change information for avx-512 vcvt* instructions 2020-10-10 21:08:15 +00:00
x8664tab.inc + support all XSAVE instructions, resolves #37864 2020-10-03 14:51:31 +00:00