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4cd6f59bc3
hlcgllvm in the uses clause of every unit that calls create_hlcodegen
o prevents dependency cycles that can cause llvm codegen units to init
before the cpu variants, which is bad since the llvm versions have to
override the cpu variants in their init code (+ added checks in the
init code that they are in fact initialised later)
git-svn-id: branches/debug_eh@40410 -
132 lines
5.3 KiB
ObjectPascal
132 lines
5.3 KiB
ObjectPascal
{
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Copyright (c) 1998-2010 by Florian Klaempfl and Jonas Maebe
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Member of the Free Pascal development team
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This unit contains high-level code generator support for ppc64
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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unit hlcgcpu;
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{$i fpcdefs.inc}
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interface
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uses
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globtype,
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aasmdata,
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symtype,
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cgbase,cgutils,hlcgobj,hlcgppc;
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type
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thlcgcpu = class(thlcgppcgen)
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procedure a_load_subsetreg_reg(list : TAsmList; subsetsize, tosize: tdef; const sreg: tsubsetregister; destreg: tregister); override;
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procedure a_load_const_subsetreg(list: TAsmlist; tosubsetsize: tdef; a: tcgint; const sreg: tsubsetregister); override;
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protected
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procedure a_load_regconst_subsetreg_intern(list : TAsmList; fromsize, subsetsize: tdef; fromreg: tregister; const sreg: tsubsetregister; slopt: tsubsetloadopt); override;
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end;
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implementation
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uses
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cpubase,aasmcpu,
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defutil,
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{$ifdef extdebug}
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aasmtai,cutils,cgppc,
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{$endif}
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cgobj,cgcpu;
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{ thlcgcpu }
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procedure thlcgcpu.a_load_subsetreg_reg(list: TAsmList; subsetsize, tosize: tdef; const sreg: tsubsetregister; destreg: tregister);
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var
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subsetcgsize: tcgsize;
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begin
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subsetcgsize:=def_cgsize(subsetsize);
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{$ifdef extdebug}
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list.concat(tai_comment.create(strpnew('a_load_subsetreg_reg subsetregsize = ' + cgsize2string(sreg.subsetregsize) + ' subsetsize = ' + cgsize2string(subsetcgsize) + ' startbit = ' + ToStr(sreg.startbit) + ' tosize = ' + cgsize2string(def_cgsize(tosize)))));
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{$endif}
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{ do the extraction if required and then extend the sign correctly. (The latter is actually required only for signed subsets
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and if that subset is not >= the tosize). }
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if (sreg.startbit<>0) or
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(sreg.bitlen<>tcgsize2size[subsetcgsize]*8) then
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begin
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list.concat(taicpu.op_reg_reg_const_const(A_RLDICL,destreg,sreg.subsetreg,(64-sreg.startbit) and 63,64-sreg.bitlen));
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if subsetcgsize in [OS_S8..OS_S128] then
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if (sreg.bitlen mod 8)=0 then
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begin
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cg.a_load_reg_reg(list, tcgsize2unsigned[subsetcgsize],subsetcgsize,destreg,destreg);
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cg.a_load_reg_reg(list,subsetcgsize,def_cgsize(tosize),destreg,destreg);
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end
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else
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begin
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cg.a_op_const_reg(list,OP_SHL,OS_INT,64-sreg.bitlen,destreg);
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cg.a_op_const_reg(list,OP_SAR,OS_INT,64-sreg.bitlen,destreg);
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end;
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end
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else
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begin
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cg.a_load_reg_reg(list,tcgsize2unsigned[sreg.subsetregsize],subsetcgsize,sreg.subsetreg,destreg);
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cg.a_load_reg_reg(list,subsetcgsize,def_cgsize(tosize),destreg,destreg);
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end;
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end;
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procedure thlcgcpu.a_load_const_subsetreg(list: TAsmlist; tosubsetsize: tdef; a: tcgint; const sreg: tsubsetregister);
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var
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tmpreg : TRegister;
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begin
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{$ifdef extdebug}
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list.concat(tai_comment.create(strpnew('a_load_const_subsetreg subsetregsize = ' + cgsize2string(sreg.subsetregsize) + ' subsetsize = ' + cgsize2string(def_cgsize(tosubsetsize)) + ' startbit = ' + ToStr(sreg.startbit) + ' a = ' + ToStr(a))));
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{$endif}
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{ loading the constant into the lowest bits of a temp register and then inserting is
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better than loading some usually large constants and do some masking and shifting on ppc64 }
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tmpreg:=getintregister(list,tosubsetsize);
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a_load_const_reg(list,tosubsetsize,a,tmpreg);
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a_load_reg_subsetreg(list,tosubsetsize,tosubsetsize,tmpreg,sreg);
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end;
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procedure thlcgcpu.a_load_regconst_subsetreg_intern(list: TAsmList; fromsize, subsetsize: tdef; fromreg: tregister; const sreg: tsubsetregister; slopt: tsubsetloadopt);
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begin
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{$ifdef extdebug}
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list.concat(tai_comment.create(strpnew('a_load_reg_subsetreg fromsize = ' + cgsize2string(def_cgsize(fromsize)) + ' subsetregsize = ' + cgsize2string(sreg.subsetregsize) + ' subsetsize = ' + cgsize2string(def_cgsize(subsetsize)) + ' startbit = ' + ToStr(sreg.startbit))));
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{$endif}
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if slopt in [SL_SETZERO,SL_SETMAX] then
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inherited a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,sreg,slopt)
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else if sreg.bitlen<>sizeof(aint)*8 then
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{ simply use the INSRDI instruction }
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list.concat(taicpu.op_reg_reg_const_const(A_INSRDI,sreg.subsetreg,fromreg,sreg.bitlen,(64-(sreg.startbit+sreg.bitlen)) and 63))
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else
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a_load_reg_reg(list,fromsize,subsetsize,fromreg,sreg.subsetreg);
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end;
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procedure create_hlcodegen_cpu;
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begin
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hlcg:=thlcgcpu.create;
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create_codegen;
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end;
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begin
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chlcgobj:=thlcgcpu;
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create_hlcodegen:=@create_hlcodegen_cpu;
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end.
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