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https://gitlab.com/freepascal.org/fpc/source.git
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1057 lines
44 KiB
ObjectPascal
1057 lines
44 KiB
ObjectPascal
{
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$Id$
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Copyright (c) 1998-2000 by Florian Klaempfl
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Generate i386 assembler for math nodes
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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unit cg386mat;
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interface
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uses
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tree;
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procedure secondmoddiv(var p : ptree);
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procedure secondshlshr(var p : ptree);
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procedure secondunaryminus(var p : ptree);
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procedure secondnot(var p : ptree);
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implementation
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uses
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globtype,systems,
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cobjects,verbose,globals,
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symconst,symtable,aasm,types,
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hcodegen,temp_gen,pass_2,
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cpubase,cpuasm,
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{$ifdef dummy}
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end { this overcomes the annoying highlighting problem in my TP IDE,
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the IDE assumes i386asm start a asm block (FK) }
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{$endif}
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cgai386,tgeni386;
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{*****************************************************************************
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SecondModDiv
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*****************************************************************************}
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procedure secondmoddiv(var p : ptree);
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var
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hreg1 : tregister;
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{$ifdef newOptimizations}
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hreg2 : tregister;
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{$endif}
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shrdiv, andmod, pushed,popeax,popedx : boolean;
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power : longint;
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hl : pasmlabel;
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hloc : tlocation;
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pushedreg : tpushed;
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typename,opname : string[6];
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begin
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shrdiv := false;
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andmod := false;
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secondpass(p^.left);
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pushed:=maybe_push(p^.right^.registers32,p^.left,is_64bitint(p^.left^.resulttype));
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secondpass(p^.right);
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if pushed then
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restore(p^.left,is_64bitint(p^.left^.resulttype));
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set_location(p^.location,p^.left^.location);
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if is_64bitint(p^.resulttype) then
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begin
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{ save p^.lcoation, because we change it now }
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set_location(hloc,p^.location);
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release_qword_loc(p^.location);
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release_qword_loc(p^.right^.location);
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p^.location.registerlow:=getexplicitregister32(R_EAX);
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p^.location.registerhigh:=getexplicitregister32(R_EDX);
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pushusedregisters(pushedreg,$ff
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and not($80 shr byte(p^.location.registerlow))
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and not($80 shr byte(p^.location.registerhigh)));
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{ the left operand is in hloc, because the
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location of left is p^.location but p^.location
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is already destroyed
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}
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emit_pushq_loc(hloc);
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clear_location(hloc);
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emit_pushq_loc(p^.right^.location);
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if porddef(p^.resulttype)^.typ=u64bit then
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typename:='QWORD'
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else
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typename:='INT64';
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if p^.treetype=divn then
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opname:='DIV_'
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else
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opname:='MOD_';
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emitcall('FPC_'+opname+typename);
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emit_reg_reg(A_MOV,S_L,R_EAX,p^.location.registerlow);
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emit_reg_reg(A_MOV,S_L,R_EDX,p^.location.registerhigh);
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popusedregisters(pushedreg);
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p^.location.loc:=LOC_REGISTER;
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end
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else
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begin
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{ put numerator in register }
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if p^.left^.location.loc<>LOC_REGISTER then
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begin
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if p^.left^.location.loc=LOC_CREGISTER then
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begin
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hreg1:=getregister32;
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emit_reg_reg(A_MOV,S_L,p^.left^.location.register,hreg1);
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end
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else
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begin
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del_reference(p^.left^.location.reference);
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hreg1:=getregister32;
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emit_ref_reg(A_MOV,S_L,newreference(p^.left^.location.reference),
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hreg1);
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end;
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clear_location(p^.left^.location);
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p^.left^.location.loc:=LOC_REGISTER;
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p^.left^.location.register:=hreg1;
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end
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else hreg1:=p^.left^.location.register;
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if (p^.treetype=divn) and (p^.right^.treetype=ordconstn) and
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ispowerof2(p^.right^.value,power) then
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Begin
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shrdiv := true;
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{for signed numbers, the numerator must be adjusted before the
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shift instruction, but not wih unsigned numbers! Otherwise,
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"Cardinal($ffffffff) div 16" overflows! (JM)}
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If is_signed(p^.left^.resulttype) Then
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Begin
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{$ifdef newOptimizations}
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If (aktOptProcessor <> class386) and
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not(CS_LittleSize in aktglobalswitches) then
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{ use a sequence without jumps, saw this in
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comp.compilers (JM) }
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begin
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{ no jumps, but more operations }
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if (hreg1 = R_EAX) and
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(R_EDX in unused) then
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begin
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hreg2 := getexplicitregister32(R_EDX);
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emit_none(A_CDQ,S_NO);
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end
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else
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begin
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{$ifndef noAllocEdi}
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getexplicitregister32(R_EDI);
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{$endif noAllocEdi}
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hreg2 := R_EDI;
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emit_reg_reg(A_MOV,S_L,hreg1,R_EDI);
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{ if the left value is signed, R_EDI := $ffffffff,
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otherwise 0 }
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emit_const_reg(A_SAR,S_L,31,R_EDI);
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{ if signed, R_EDI := right value-1, otherwise 0 }
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end;
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emit_const_reg(A_AND,S_L,p^.right^.value-1,hreg2);
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{ add to the left value }
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emit_reg_reg(A_ADD,S_L,hreg2,hreg1);
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{ release EDX if we used it }
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{$ifndef noAllocEdi}
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{ also releas EDI }
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ungetregister32(hreg2);
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{$else noAllocEdi}
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if (hreg2 = R_EDX) then
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ungetregister32(hreg2);
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{$endif noAllocEdi}
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{ do the shift }
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emit_const_reg(A_SAR,S_L,power,hreg1);
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end
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else
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{$endif newOptimizations}
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begin
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{ a jump, but less operations }
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emit_reg_reg(A_TEST,S_L,hreg1,hreg1);
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getlabel(hl);
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emitjmp(C_NS,hl);
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if power=1 then
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emit_reg(A_INC,S_L,hreg1)
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else
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emit_const_reg(A_ADD,S_L,p^.right^.value-1,hreg1);
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emitlab(hl);
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emit_const_reg(A_SAR,S_L,power,hreg1);
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end
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End
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Else
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emit_const_reg(A_SHR,S_L,power,hreg1);
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End
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else
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if (p^.treetype=modn) and (p^.right^.treetype=ordconstn) and
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ispowerof2(p^.right^.value,power) and Not(is_signed(p^.left^.resulttype)) Then
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{is there a similar trick for MOD'ing signed numbers? (JM)}
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Begin
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emit_const_reg(A_AND,S_L,p^.right^.value-1,hreg1);
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andmod := true;
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End
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else
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begin
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{ bring denominator to EDI }
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{ EDI is always free, it's }
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{ only used for temporary }
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{ purposes }
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{$ifndef noAllocEdi}
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getexplicitregister32(R_EDI);
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{$endif noAllocEdi}
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if (p^.right^.location.loc<>LOC_REGISTER) and
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(p^.right^.location.loc<>LOC_CREGISTER) then
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begin
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del_reference(p^.right^.location.reference);
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p^.left^.location.loc:=LOC_REGISTER;
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emit_ref_reg(A_MOV,S_L,newreference(p^.right^.location.reference),R_EDI);
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end
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else
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begin
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emit_reg_reg(A_MOV,S_L,p^.right^.location.register,R_EDI);
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ungetregister32(p^.right^.location.register);
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end;
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popedx:=false;
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popeax:=false;
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if hreg1=R_EDX then
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begin
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if not(R_EAX in unused) then
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begin
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emit_reg(A_PUSH,S_L,R_EAX);
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popeax:=true;
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end;
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emit_reg_reg(A_MOV,S_L,R_EDX,R_EAX);
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end
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else
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begin
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if not(R_EDX in unused) then
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begin
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emit_reg(A_PUSH,S_L,R_EDX);
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popedx:=true;
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end;
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if hreg1<>R_EAX then
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begin
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if not(R_EAX in unused) then
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begin
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emit_reg(A_PUSH,S_L,R_EAX);
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popeax:=true;
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end;
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emit_reg_reg(A_MOV,S_L,hreg1,R_EAX);
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end;
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end;
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{ sign extension depends on the left type }
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if porddef(p^.left^.resulttype)^.typ=u32bit then
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emit_reg_reg(A_XOR,S_L,R_EDX,R_EDX)
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else
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emit_none(A_CDQ,S_NO);
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{ division depends on the right type }
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if porddef(p^.right^.resulttype)^.typ=u32bit then
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emit_reg(A_DIV,S_L,R_EDI)
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else
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emit_reg(A_IDIV,S_L,R_EDI);
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{$ifndef noAllocEdi}
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ungetregister32(R_EDI);
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{$endif noAllocEdi}
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if p^.treetype=divn then
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begin
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{ if result register is busy then copy }
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if popeax then
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begin
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if hreg1=R_EAX then
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internalerror(112);
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emit_reg_reg(A_MOV,S_L,R_EAX,hreg1)
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end
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else
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if hreg1<>R_EAX then
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Begin
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ungetregister32(hreg1);
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hreg1 := getexplicitregister32(R_EAX);
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{ I don't think it's possible that now hreg1 <> R_EAX
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since popeax is false, but for all certainty I do
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support that situation (JM)}
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if hreg1 <> R_EAX then
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emit_reg_reg(A_MOV,S_L,R_EAX,hreg1);
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end;
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end
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else
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{if we did the mod by an "and", the result is in hreg1 and
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EDX certainly hasn't been pushed (JM)}
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if not(andmod) Then
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if popedx then
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{the mod was done by an (i)div (so the result is now in
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edx), but edx was occupied prior to the division, so
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move the result into a safe place (JM)}
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emit_reg_reg(A_MOV,S_L,R_EDX,hreg1)
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else
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Begin
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{Get rid of the unnecessary hreg1 if possible (same as with
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EAX in divn) (JM)}
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ungetregister32(hreg1);
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hreg1 := getexplicitregister32(R_EDX);
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if hreg1 <> R_EDX then
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emit_reg_reg(A_MOV,S_L,R_EDX,hreg1);;
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End;
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if popeax then
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emit_reg(A_POP,S_L,R_EAX);
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if popedx then
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emit_reg(A_POP,S_L,R_EDX);
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end;
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If not(andmod or shrdiv) then
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{andmod and shrdiv only use hreg1 (which is already in usedinproc,
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since it was acquired with getregister), the others also use both
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EAX and EDX (JM)}
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Begin
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usedinproc:=usedinproc or ($80 shr byte(R_EAX));
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usedinproc:=usedinproc or ($80 shr byte(R_EDX));
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End;
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clear_location(p^.location);
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p^.location.loc:=LOC_REGISTER;
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p^.location.register:=hreg1;
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end;
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end;
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{*****************************************************************************
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SecondShlShr
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*****************************************************************************}
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procedure secondshlshr(var p : ptree);
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var
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hregister1,hregister2,hregister3,
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hregisterhigh,hregisterlow : tregister;
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pushed,popecx : boolean;
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op : tasmop;
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l1,l2,l3 : pasmlabel;
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begin
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popecx:=false;
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secondpass(p^.left);
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pushed:=maybe_push(p^.right^.registers32,p^.left,is_64bitint(p^.left^.resulttype));
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secondpass(p^.right);
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if pushed then
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restore(p^.left,is_64bitint(p^.left^.resulttype));
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if is_64bitint(p^.left^.resulttype) then
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begin
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{ load left operator in a register }
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if p^.left^.location.loc<>LOC_REGISTER then
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begin
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if p^.left^.location.loc=LOC_CREGISTER then
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begin
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hregisterlow:=getregister32;
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hregisterhigh:=getregister32;
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emit_reg_reg(A_MOV,S_L,p^.left^.location.registerlow,
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hregisterlow);
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emit_reg_reg(A_MOV,S_L,p^.left^.location.registerhigh,
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hregisterlow);
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end
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else
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begin
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del_reference(p^.left^.location.reference);
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hregisterlow:=getregister32;
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hregisterhigh:=getregister32;
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emit_mov_ref_reg64(p^.left^.location.reference,
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hregisterlow,
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hregisterhigh);
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end;
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end
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else
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begin
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hregisterlow:=p^.left^.location.registerlow;
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hregisterhigh:=p^.left^.location.registerhigh;
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end;
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{ shifting by a constant directly coded: }
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if (p^.right^.treetype=ordconstn) then
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begin
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{ shrd/shl works only for values <=31 !! }
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if p^.right^.value>31 then
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begin
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if p^.treetype=shln then
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begin
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emit_reg_reg(A_XOR,S_L,hregisterhigh,
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hregisterhigh);
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emit_const_reg(A_SHL,S_L,p^.right^.value and 31,
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hregisterlow);
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end
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else
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begin
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emit_reg_reg(A_XOR,S_L,hregisterlow,
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hregisterlow);
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emit_const_reg(A_SHR,S_L,p^.right^.value and 31,
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hregisterhigh);
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end;
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p^.location.registerhigh:=hregisterlow;
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p^.location.registerlow:=hregisterhigh;
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end
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else
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begin
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if p^.treetype=shln then
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begin
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emit_const_reg_reg(A_SHLD,S_L,p^.right^.value and 31,
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hregisterlow,hregisterhigh);
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emit_const_reg(A_SHL,S_L,p^.right^.value and 31,
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hregisterlow);
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end
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else
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begin
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emit_const_reg_reg(A_SHRD,S_L,p^.right^.value and 31,
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hregisterhigh,hregisterlow);
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emit_const_reg(A_SHR,S_L,p^.right^.value and 31,
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hregisterhigh);
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end;
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p^.location.registerlow:=hregisterlow;
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p^.location.registerhigh:=hregisterhigh;
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end;
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p^.location.loc:=LOC_REGISTER;
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end
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else
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begin
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{ load right operators in a register }
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if p^.right^.location.loc<>LOC_REGISTER then
|
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begin
|
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if p^.right^.location.loc=LOC_CREGISTER then
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begin
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hregister2:=getexplicitregister32(R_ECX);
|
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emit_reg_reg(A_MOV,S_L,p^.right^.location.register,
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hregister2);
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end
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else
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begin
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del_reference(p^.right^.location.reference);
|
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hregister2:=getexplicitregister32(R_ECX);
|
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emit_ref_reg(A_MOV,S_L,newreference(p^.right^.location.reference),
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hregister2);
|
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end;
|
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end
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else
|
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hregister2:=p^.right^.location.register;
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|
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{ left operator is already in a register }
|
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{ hence are both in a register }
|
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{ is it in the case ECX ? }
|
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if (hregisterlow=R_ECX) then
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begin
|
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{ then only swap }
|
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emit_reg_reg(A_XCHG,S_L,hregisterlow,hregister2);
|
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hregister3:=hregisterlow;
|
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hregisterlow:=hregister2;
|
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hregister2:=hregister3;
|
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end
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else if (hregisterhigh=R_ECX) then
|
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begin
|
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{ then only swap }
|
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emit_reg_reg(A_XCHG,S_L,hregisterhigh,hregister2);
|
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hregister3:=hregisterhigh;
|
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hregisterhigh:=hregister2;
|
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hregister2:=hregister3;
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end
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|
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{ if second operator not in ECX ? }
|
|
else if (hregister2<>R_ECX) then
|
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begin
|
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{ ECX occupied then push it }
|
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if not (R_ECX in unused) then
|
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begin
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popecx:=true;
|
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emit_reg(A_PUSH,S_L,R_ECX);
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end;
|
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emit_reg_reg(A_MOV,S_L,hregister2,R_ECX);
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end;
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|
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ungetregister32(hregister2);
|
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|
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{ the damned shift instructions work only til a count of 32 }
|
|
{ so we've to do some tricks here }
|
|
if p^.treetype=shln then
|
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begin
|
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getlabel(l1);
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getlabel(l2);
|
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getlabel(l3);
|
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emit_const_reg(A_CMP,S_L,64,R_ECX);
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emitjmp(C_L,l1);
|
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emit_reg_reg(A_XOR,S_L,hregisterlow,hregisterlow);
|
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emit_reg_reg(A_XOR,S_L,hregisterhigh,hregisterhigh);
|
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emitjmp(C_None,l3);
|
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emitlab(l1);
|
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emit_const_reg(A_CMP,S_L,32,R_ECX);
|
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emitjmp(C_L,l2);
|
|
emit_const_reg(A_SUB,S_L,32,R_ECX);
|
|
emit_reg_reg(A_SHL,S_L,R_CL,
|
|
hregisterlow);
|
|
emit_reg_reg(A_MOV,S_L,hregisterlow,hregisterhigh);
|
|
emit_reg_reg(A_XOR,S_L,hregisterlow,hregisterlow);
|
|
emitjmp(C_None,l3);
|
|
emitlab(l2);
|
|
emit_reg_reg_reg(A_SHLD,S_L,R_CL,
|
|
hregisterlow,hregisterhigh);
|
|
emit_reg_reg(A_SHL,S_L,R_CL,
|
|
hregisterlow);
|
|
emitlab(l3);
|
|
end
|
|
else
|
|
begin
|
|
getlabel(l1);
|
|
getlabel(l2);
|
|
getlabel(l3);
|
|
emit_const_reg(A_CMP,S_L,64,R_ECX);
|
|
emitjmp(C_L,l1);
|
|
emit_reg_reg(A_XOR,S_L,hregisterlow,hregisterlow);
|
|
emit_reg_reg(A_XOR,S_L,hregisterhigh,hregisterhigh);
|
|
emitjmp(C_None,l3);
|
|
emitlab(l1);
|
|
emit_const_reg(A_CMP,S_L,32,R_ECX);
|
|
emitjmp(C_L,l2);
|
|
emit_const_reg(A_SUB,S_L,32,R_ECX);
|
|
emit_reg_reg(A_SHR,S_L,R_CL,
|
|
hregisterhigh);
|
|
emit_reg_reg(A_MOV,S_L,hregisterhigh,hregisterlow);
|
|
emit_reg_reg(A_XOR,S_L,hregisterhigh,hregisterhigh);
|
|
emitjmp(C_None,l3);
|
|
emitlab(l2);
|
|
emit_reg_reg_reg(A_SHRD,S_L,R_CL,
|
|
hregisterhigh,hregisterlow);
|
|
emit_reg_reg(A_SHR,S_L,R_CL,
|
|
hregisterhigh);
|
|
emitlab(l3);
|
|
|
|
end;
|
|
|
|
{ maybe put ECX back }
|
|
if popecx then
|
|
emit_reg(A_POP,S_L,R_ECX);
|
|
|
|
p^.location.registerlow:=hregisterlow;
|
|
p^.location.registerhigh:=hregisterhigh;
|
|
end;
|
|
end
|
|
else
|
|
begin
|
|
{ load left operators in a register }
|
|
if p^.left^.location.loc<>LOC_REGISTER then
|
|
begin
|
|
if p^.left^.location.loc=LOC_CREGISTER then
|
|
begin
|
|
hregister1:=getregister32;
|
|
emit_reg_reg(A_MOV,S_L,p^.left^.location.register,
|
|
hregister1);
|
|
end
|
|
else
|
|
begin
|
|
del_reference(p^.left^.location.reference);
|
|
hregister1:=getregister32;
|
|
emit_ref_reg(A_MOV,S_L,newreference(p^.left^.location.reference),
|
|
hregister1);
|
|
end;
|
|
end
|
|
else
|
|
hregister1:=p^.left^.location.register;
|
|
|
|
{ determine operator }
|
|
if p^.treetype=shln then
|
|
op:=A_SHL
|
|
else
|
|
op:=A_SHR;
|
|
|
|
{ shifting by a constant directly coded: }
|
|
if (p^.right^.treetype=ordconstn) then
|
|
begin
|
|
{ l shl 32 should 0 imho, but neither TP nor Delphi do it in this way (FK)
|
|
if p^.right^.value<=31 then
|
|
}
|
|
emit_const_reg(op,S_L,p^.right^.value and 31,
|
|
hregister1);
|
|
{
|
|
else
|
|
emit_reg_reg(A_XOR,S_L,hregister1,
|
|
hregister1);
|
|
}
|
|
p^.location.loc:=LOC_REGISTER;
|
|
p^.location.register:=hregister1;
|
|
end
|
|
else
|
|
begin
|
|
{ load right operators in a register }
|
|
if p^.right^.location.loc<>LOC_REGISTER then
|
|
begin
|
|
if p^.right^.location.loc=LOC_CREGISTER then
|
|
begin
|
|
hregister2:=getexplicitregister32(R_ECX);
|
|
emit_reg_reg(A_MOV,S_L,p^.right^.location.register,
|
|
hregister2);
|
|
end
|
|
else
|
|
begin
|
|
del_reference(p^.right^.location.reference);
|
|
hregister2:=getexplicitregister32(R_ECX);
|
|
emit_ref_reg(A_MOV,S_L,newreference(p^.right^.location.reference),
|
|
hregister2);
|
|
end;
|
|
end
|
|
else
|
|
hregister2:=p^.right^.location.register;
|
|
|
|
{ left operator is already in a register }
|
|
{ hence are both in a register }
|
|
{ is it in the case ECX ? }
|
|
if (hregister1=R_ECX) then
|
|
begin
|
|
{ then only swap }
|
|
emit_reg_reg(A_XCHG,S_L,hregister1,hregister2);
|
|
hregister3:=hregister1;
|
|
hregister1:=hregister2;
|
|
hregister2:=hregister3;
|
|
end
|
|
{ if second operator not in ECX ? }
|
|
else if (hregister2<>R_ECX) then
|
|
begin
|
|
{ ECX occupied then push it }
|
|
if not (R_ECX in unused) then
|
|
begin
|
|
popecx:=true;
|
|
emit_reg(A_PUSH,S_L,R_ECX);
|
|
end;
|
|
emit_reg_reg(A_MOV,S_L,hregister2,R_ECX);
|
|
end;
|
|
ungetregister32(hregister2);
|
|
{ right operand is in ECX }
|
|
emit_reg_reg(op,S_L,R_CL,hregister1);
|
|
{ maybe ECX back }
|
|
if popecx then
|
|
emit_reg(A_POP,S_L,R_ECX);
|
|
p^.location.register:=hregister1;
|
|
end;
|
|
end;
|
|
end;
|
|
|
|
|
|
{*****************************************************************************
|
|
SecondUnaryMinus
|
|
*****************************************************************************}
|
|
|
|
procedure secondunaryminus(var p : ptree);
|
|
|
|
{$ifdef SUPPORT_MMX}
|
|
procedure do_mmx_neg;
|
|
var
|
|
op : tasmop;
|
|
begin
|
|
p^.location.loc:=LOC_MMXREGISTER;
|
|
if cs_mmx_saturation in aktlocalswitches then
|
|
case mmx_type(p^.resulttype) of
|
|
mmxs8bit:
|
|
op:=A_PSUBSB;
|
|
mmxu8bit:
|
|
op:=A_PSUBUSB;
|
|
mmxs16bit,mmxfixed16:
|
|
op:=A_PSUBSW;
|
|
mmxu16bit:
|
|
op:=A_PSUBUSW;
|
|
end
|
|
else
|
|
case mmx_type(p^.resulttype) of
|
|
mmxs8bit,mmxu8bit:
|
|
op:=A_PSUBB;
|
|
mmxs16bit,mmxu16bit,mmxfixed16:
|
|
op:=A_PSUBW;
|
|
mmxs32bit,mmxu32bit:
|
|
op:=A_PSUBD;
|
|
end;
|
|
emit_reg_reg(op,S_NO,p^.location.register,R_MM7);
|
|
emit_reg_reg(A_MOVQ,S_NO,R_MM7,p^.location.register);
|
|
end;
|
|
{$endif}
|
|
|
|
begin
|
|
if is_64bitint(p^.left^.resulttype) then
|
|
begin
|
|
secondpass(p^.left);
|
|
clear_location(p^.location);
|
|
p^.location.loc:=LOC_REGISTER;
|
|
case p^.left^.location.loc of
|
|
LOC_REGISTER :
|
|
begin
|
|
p^.location.registerlow:=p^.left^.location.registerlow;
|
|
p^.location.registerhigh:=p^.left^.location.registerhigh;
|
|
end;
|
|
LOC_CREGISTER :
|
|
begin
|
|
p^.location.registerlow:=getregister32;
|
|
p^.location.registerhigh:=getregister32;
|
|
emit_reg_reg(A_MOV,S_L,p^.left^.location.registerlow,p^.location.registerlow);
|
|
emit_reg_reg(A_MOV,S_L,p^.left^.location.registerhigh,p^.location.registerhigh);
|
|
end;
|
|
LOC_REFERENCE,LOC_MEM :
|
|
begin
|
|
del_reference(p^.left^.location.reference);
|
|
p^.location.registerlow:=getregister32;
|
|
p^.location.registerhigh:=getregister32;
|
|
emit_mov_ref_reg64(p^.left^.location.reference,
|
|
p^.location.registerlow,
|
|
p^.location.registerhigh);
|
|
end;
|
|
end;
|
|
{
|
|
emit_reg(A_NEG,S_L,p^.location.registerlow);
|
|
emit_const_reg(A_ADC,S_L,0,p^.location.registerhigh);
|
|
emit_reg(A_NEG,S_L,p^.location.registerhigh);
|
|
}
|
|
emit_reg(A_NOT,S_L,p^.location.registerhigh);
|
|
emit_reg(A_NEG,S_L,p^.location.registerlow);
|
|
emit_const_reg(A_SBB,S_L,-1,p^.location.registerhigh);
|
|
end
|
|
else
|
|
begin
|
|
secondpass(p^.left);
|
|
p^.location.loc:=LOC_REGISTER;
|
|
case p^.left^.location.loc of
|
|
LOC_REGISTER:
|
|
begin
|
|
p^.location.register:=p^.left^.location.register;
|
|
emit_reg(A_NEG,S_L,p^.location.register);
|
|
end;
|
|
LOC_CREGISTER:
|
|
begin
|
|
p^.location.register:=getregister32;
|
|
emit_reg_reg(A_MOV,S_L,p^.location.register,
|
|
p^.location.register);
|
|
emit_reg(A_NEG,S_L,p^.location.register);
|
|
end;
|
|
{$ifdef SUPPORT_MMX}
|
|
LOC_MMXREGISTER:
|
|
begin
|
|
set_location(p^.location,p^.left^.location);
|
|
emit_reg_reg(A_PXOR,S_NO,R_MM7,R_MM7);
|
|
do_mmx_neg;
|
|
end;
|
|
LOC_CMMXREGISTER:
|
|
begin
|
|
p^.location.register:=getregistermmx;
|
|
emit_reg_reg(A_PXOR,S_NO,R_MM7,R_MM7);
|
|
emit_reg_reg(A_MOVQ,S_NO,p^.left^.location.register,
|
|
p^.location.register);
|
|
do_mmx_neg;
|
|
end;
|
|
{$endif SUPPORT_MMX}
|
|
LOC_REFERENCE,LOC_MEM:
|
|
begin
|
|
del_reference(p^.left^.location.reference);
|
|
if (p^.left^.resulttype^.deftype=floatdef) and
|
|
(pfloatdef(p^.left^.resulttype)^.typ<>f32bit) then
|
|
begin
|
|
p^.location.loc:=LOC_FPU;
|
|
floatload(pfloatdef(p^.left^.resulttype)^.typ,
|
|
p^.left^.location.reference);
|
|
emit_none(A_FCHS,S_NO);
|
|
end
|
|
{$ifdef SUPPORT_MMX}
|
|
else if (cs_mmx in aktlocalswitches) and is_mmx_able_array(p^.left^.resulttype) then
|
|
begin
|
|
p^.location.register:=getregistermmx;
|
|
emit_reg_reg(A_PXOR,S_NO,R_MM7,R_MM7);
|
|
emit_ref_reg(A_MOVQ,S_NO,
|
|
newreference(p^.left^.location.reference),
|
|
p^.location.register);
|
|
do_mmx_neg;
|
|
end
|
|
{$endif SUPPORT_MMX}
|
|
else
|
|
begin
|
|
p^.location.register:=getregister32;
|
|
emit_ref_reg(A_MOV,S_L,
|
|
newreference(p^.left^.location.reference),
|
|
p^.location.register);
|
|
emit_reg(A_NEG,S_L,p^.location.register);
|
|
end;
|
|
end;
|
|
LOC_FPU:
|
|
begin
|
|
p^.location.loc:=LOC_FPU;
|
|
emit_none(A_FCHS,S_NO);
|
|
end;
|
|
LOC_CFPUREGISTER:
|
|
begin
|
|
emit_reg(A_FLD,S_NO,
|
|
correct_fpuregister(p^.left^.location.register,fpuvaroffset));
|
|
inc(fpuvaroffset);
|
|
p^.location.loc:=LOC_FPU;
|
|
emit_none(A_FCHS,S_NO);
|
|
end;
|
|
end;
|
|
end;
|
|
{ Here was a problem... }
|
|
{ Operand to be negated always }
|
|
{ seems to be converted to signed }
|
|
{ 32-bit before doing neg!! }
|
|
{ So this is useless... }
|
|
{ that's not true: -2^31 gives an overflow error if it is negaded (FK) }
|
|
{ emitoverflowcheck(p);}
|
|
end;
|
|
|
|
|
|
{*****************************************************************************
|
|
SecondNot
|
|
*****************************************************************************}
|
|
|
|
procedure secondnot(var p : ptree);
|
|
const
|
|
flagsinvers : array[F_E..F_BE] of tresflags =
|
|
(F_NE,F_E,F_LE,F_GE,F_L,F_G,F_NC,F_C,
|
|
F_A,F_AE,F_B,F_BE);
|
|
var
|
|
hl : pasmlabel;
|
|
opsize : topsize;
|
|
begin
|
|
if is_boolean(p^.resulttype) then
|
|
begin
|
|
opsize:=def_opsize(p^.resulttype);
|
|
{ the second pass could change the location of left }
|
|
{ if it is a register variable, so we've to do }
|
|
{ this before the case statement }
|
|
if p^.left^.location.loc in [LOC_REFERENCE,LOC_MEM,
|
|
LOC_FLAGS,LOC_REGISTER,LOC_CREGISTER] then
|
|
secondpass(p^.left);
|
|
case p^.left^.location.loc of
|
|
LOC_JUMP :
|
|
begin
|
|
hl:=truelabel;
|
|
truelabel:=falselabel;
|
|
falselabel:=hl;
|
|
secondpass(p^.left);
|
|
maketojumpbool(p^.left);
|
|
hl:=truelabel;
|
|
truelabel:=falselabel;
|
|
falselabel:=hl;
|
|
end;
|
|
LOC_FLAGS :
|
|
p^.location.resflags:=flagsinvers[p^.left^.location.resflags];
|
|
LOC_REGISTER :
|
|
begin
|
|
{p^.location.register:=p^.left^.location.register;
|
|
emit_const_reg(A_XOR,opsize,1,p^.location.register);}
|
|
p^.location.loc:=LOC_FLAGS;
|
|
p^.location.resflags:=F_E;
|
|
emit_reg_reg(A_TEST,opsize,
|
|
p^.left^.location.register,p^.left^.location.register);
|
|
ungetregister(p^.left^.location.register);
|
|
end;
|
|
LOC_CREGISTER :
|
|
begin
|
|
clear_location(p^.location);
|
|
p^.location.loc:=LOC_REGISTER;
|
|
p^.location.register:=def_getreg(p^.resulttype);
|
|
emit_reg_reg(A_MOV,opsize,p^.left^.location.register,p^.location.register);
|
|
emit_reg_reg(A_TEST,opsize,p^.location.register,p^.location.register);
|
|
ungetregister(p^.location.register);
|
|
p^.location.loc:=LOC_FLAGS;
|
|
p^.location.resflags:=F_E;
|
|
end;
|
|
LOC_REFERENCE,
|
|
LOC_MEM :
|
|
begin
|
|
clear_location(p^.location);
|
|
p^.location.loc:=LOC_REGISTER;
|
|
del_reference(p^.left^.location.reference);
|
|
{ this was placed before del_ref => internaalerror(10) }
|
|
p^.location.register:=def_getreg(p^.resulttype);
|
|
emit_ref_reg(A_MOV,opsize,
|
|
newreference(p^.left^.location.reference),p^.location.register);
|
|
emit_reg_reg(A_TEST,opsize,p^.location.register,p^.location.register);
|
|
ungetregister(p^.location.register);
|
|
p^.location.loc:=LOC_FLAGS;
|
|
p^.location.resflags:=F_E;
|
|
end;
|
|
end;
|
|
end
|
|
{$ifdef SUPPORT_MMX}
|
|
else
|
|
if (cs_mmx in aktlocalswitches) and is_mmx_able_array(p^.left^.resulttype) then
|
|
begin
|
|
secondpass(p^.left);
|
|
p^.location.loc:=LOC_MMXREGISTER;
|
|
{ prepare EDI }
|
|
{$ifndef noAllocEdi}
|
|
getexplicitregister32(R_EDI);
|
|
{$endif noAllocEdi}
|
|
emit_const_reg(A_MOV,S_L,$ffffffff,R_EDI);
|
|
{ load operand }
|
|
case p^.left^.location.loc of
|
|
LOC_MMXREGISTER:
|
|
set_location(p^.location,p^.left^.location);
|
|
LOC_CMMXREGISTER:
|
|
begin
|
|
p^.location.register:=getregistermmx;
|
|
emit_reg_reg(A_MOVQ,S_NO,p^.left^.location.register,p^.location.register);
|
|
end;
|
|
LOC_REFERENCE,LOC_MEM:
|
|
begin
|
|
del_reference(p^.left^.location.reference);
|
|
p^.location.register:=getregistermmx;
|
|
emit_ref_reg(A_MOVQ,S_NO,
|
|
newreference(p^.left^.location.reference),p^.location.register);
|
|
end;
|
|
end;
|
|
{ load mask }
|
|
emit_reg_reg(A_MOVD,S_NO,R_EDI,R_MM7);
|
|
{$ifndef noAllocEdi}
|
|
ungetregister32(R_EDI);
|
|
{$endif noAllocEdi}
|
|
{ lower 32 bit }
|
|
emit_reg_reg(A_PXOR,S_D,R_MM7,p^.location.register);
|
|
{ shift mask }
|
|
emit_const_reg(A_PSLLQ,S_NO,32,R_MM7);
|
|
{ higher 32 bit }
|
|
emit_reg_reg(A_PXOR,S_D,R_MM7,p^.location.register);
|
|
end
|
|
{$endif SUPPORT_MMX}
|
|
else if is_64bitint(p^.left^.resulttype) then
|
|
begin
|
|
secondpass(p^.left);
|
|
clear_location(p^.location);
|
|
p^.location.loc:=LOC_REGISTER;
|
|
case p^.left^.location.loc of
|
|
LOC_REGISTER :
|
|
begin
|
|
p^.location.registerlow:=p^.left^.location.registerlow;
|
|
p^.location.registerhigh:=p^.left^.location.registerhigh;
|
|
emit_reg(A_NOT,S_L,p^.location.registerlow);
|
|
emit_reg(A_NOT,S_L,p^.location.registerhigh);
|
|
end;
|
|
LOC_CREGISTER :
|
|
begin
|
|
p^.location.registerlow:=getregister32;
|
|
p^.location.registerhigh:=getregister32;
|
|
emit_reg_reg(A_MOV,S_L,p^.left^.location.registerlow,p^.location.registerlow);
|
|
emit_reg_reg(A_MOV,S_L,p^.left^.location.registerhigh,p^.location.registerhigh);
|
|
emit_reg(A_NOT,S_L,p^.location.registerlow);
|
|
emit_reg(A_NOT,S_L,p^.location.registerhigh);
|
|
end;
|
|
LOC_REFERENCE,LOC_MEM :
|
|
begin
|
|
del_reference(p^.left^.location.reference);
|
|
p^.location.registerlow:=getregister32;
|
|
p^.location.registerhigh:=getregister32;
|
|
emit_mov_ref_reg64(p^.left^.location.reference,
|
|
p^.location.registerlow,
|
|
p^.location.registerhigh);
|
|
emit_reg(A_NOT,S_L,p^.location.registerlow);
|
|
emit_reg(A_NOT,S_L,p^.location.registerhigh);
|
|
end;
|
|
end;
|
|
end
|
|
else
|
|
begin
|
|
secondpass(p^.left);
|
|
clear_location(p^.location);
|
|
p^.location.loc:=LOC_REGISTER;
|
|
case p^.left^.location.loc of
|
|
LOC_REGISTER :
|
|
begin
|
|
p^.location.register:=p^.left^.location.register;
|
|
emit_reg(A_NOT,S_L,p^.location.register);
|
|
end;
|
|
LOC_CREGISTER :
|
|
begin
|
|
p^.location.register:=getregister32;
|
|
emit_reg_reg(A_MOV,S_L,p^.left^.location.register,p^.location.register);
|
|
emit_reg(A_NOT,S_L,p^.location.register);
|
|
end;
|
|
LOC_REFERENCE,LOC_MEM :
|
|
begin
|
|
del_reference(p^.left^.location.reference);
|
|
p^.location.register:=getregister32;
|
|
emit_ref_reg(A_MOV,S_L,
|
|
newreference(p^.left^.location.reference),p^.location.register);
|
|
emit_reg(A_NOT,S_L,p^.location.register);
|
|
end;
|
|
end;
|
|
end;
|
|
end;
|
|
|
|
|
|
|
|
end.
|
|
{
|
|
$Log$
|
|
Revision 1.45 2000-03-19 15:20:22 florian
|
|
* not(b) if b is a register variable, didn't work, fixed
|
|
|
|
Revision 1.44 2000/02/24 18:41:38 peter
|
|
* removed warnings/notes
|
|
|
|
Revision 1.43 2000/02/18 21:25:48 florian
|
|
* fixed a bug in int64/qword handling was a quite ugly one
|
|
|
|
Revision 1.42 2000/02/09 13:22:47 peter
|
|
* log truncated
|
|
|
|
Revision 1.41 2000/01/27 15:46:00 florian
|
|
* slighly improved code for -<qword> and -<int64>
|
|
|
|
Revision 1.40 2000/01/09 12:35:01 jonas
|
|
* changed edi allocation to use getexplicitregister32/ungetregister
|
|
(adapted tgeni386 a bit for this) and enabled it by default
|
|
* fixed very big and stupid bug of mine in cg386mat that broke the
|
|
include() code (and make cycle :( ) if you compiled without
|
|
-dnewoptimizations
|
|
|
|
Revision 1.39 2000/01/09 01:44:20 jonas
|
|
+ (de)allocation info for EDI to fix reported bug on mailinglist.
|
|
Also some (de)allocation info for ESI added. Between -dallocEDI
|
|
because at this time of the night bugs could easily slip in ;)
|
|
|
|
Revision 1.38 2000/01/07 01:14:21 peter
|
|
* updated copyright to 2000
|
|
|
|
Revision 1.37 2000/01/07 00:12:10 peter
|
|
* fixed movd isntruction to be A_MOVD instead of A_MOV S_D
|
|
|
|
Revision 1.36 1999/11/18 15:34:44 pierre
|
|
* Notes/Hints for local syms changed to
|
|
Set_varstate function
|
|
|
|
Revision 1.35 1999/11/06 14:34:18 peter
|
|
* truncated log to 20 revs
|
|
|
|
Revision 1.34 1999/09/28 19:43:47 florian
|
|
* the maybe_push fix of Pierre wasn't 100%, the tree parameter
|
|
must contain a valid location (which is saved if necessary)
|
|
|
|
Revision 1.33 1999/09/27 23:37:26 peter
|
|
* fixed push/restore bug in div/mod
|
|
|
|
Revision 1.32 1999/09/02 17:07:38 florian
|
|
* problems with -Or fixed: tdef.isfpuregable was wrong!
|
|
|
|
Revision 1.31 1999/08/19 13:08:50 pierre
|
|
* emit_??? used
|
|
|
|
Revision 1.30 1999/08/04 13:45:23 florian
|
|
+ floating point register variables !!
|
|
* pairegalloc is now generated for register variables
|
|
|
|
Revision 1.29 1999/08/04 00:22:51 florian
|
|
* renamed i386asm and i386base to cpuasm and cpubase
|
|
|
|
Revision 1.28 1999/08/03 22:02:45 peter
|
|
* moved bitmask constants to sets
|
|
* some other type/const renamings
|
|
|
|
} |