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https://gitlab.com/freepascal.org/fpc/source.git
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25b0de0c28
This avoids problems on newer GNU assembler, which might have a default ABI different from O32. git-svn-id: trunk@22664 -
416 lines
13 KiB
ObjectPascal
416 lines
13 KiB
ObjectPascal
{
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Copyright (c) 1999-2009 by Florian Klaempfl and David Zhang
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This unit implements an asmoutput class for MIPS assembly syntax
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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unit cpugas;
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{$i fpcdefs.inc}
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interface
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uses
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cpubase, aasmbase, globtype,
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aasmtai, aasmcpu, assemble, aggas;
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type
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TMIPSGNUAssembler = class(TGNUassembler)
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nomacro, noreorder, noat : boolean;
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constructor create(smart: boolean); override;
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{# Constructs the command line for calling the assembler }
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function MakeCmdLine: TCmdStr; override;
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end;
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TMIPSInstrWriter = class(TCPUInstrWriter)
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procedure WriteInstruction(hp : tai);override;
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end;
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const
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use_std_regnames : boolean =
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{$ifndef USE_MIPS_GAS_REGS}
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true;
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{$else}
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false;
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{$endif}
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implementation
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uses
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cutils, systems, cpuinfo,
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verbose, itcpugas, cgbase, cgutils;
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function gas_std_regname(r:Tregister):string;
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var
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hr: tregister;
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p: longint;
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begin
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{ Double uses the same table as single }
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hr := r;
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case getsubreg(hr) of
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R_SUBFD:
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setsubreg(hr, R_SUBFS);
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R_SUBL, R_SUBW, R_SUBD, R_SUBQ:
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setsubreg(hr, R_SUBD);
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end;
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result:=std_regname(hr);
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end;
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function asm_regname(reg : TRegister) : string;
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begin
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if use_std_regnames then
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asm_regname:='$'+gas_std_regname(reg)
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else
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asm_regname:=gas_regname(reg);
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end;
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{****************************************************************************}
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{ GNU MIPS Assembler writer }
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{****************************************************************************}
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constructor TMIPSGNUAssembler.create(smart: boolean);
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begin
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inherited create(smart);
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InstrWriter := TMIPSInstrWriter.create(self);
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nomacro:=false;
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noreorder:=false;
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noat:=false;
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end;
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function TMIPSGNUAssembler.MakeCmdLine: TCmdStr;
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begin
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result := Inherited MakeCmdLine;
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{ ABI selection }
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Replace(result,'$ABI','-mabi='+abitypestr[mips_abi]);
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{ ACH selection }
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Replace(result,'$ARCH','-march='+cputypestr[mips_cpu]);
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end;
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{****************************************************************************}
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{ Helper routines for Instruction Writer }
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{****************************************************************************}
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function GetReferenceString(var ref: TReference): string;
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var
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hasgot : boolean;
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gotprefix : string;
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begin
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GetReferenceString := '';
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hasgot:=false;
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with ref do
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begin
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if (base = NR_NO) and (index = NR_NO) then
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begin
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if assigned(symbol) then
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begin
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GetReferenceString := symbol.Name;
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if symbol.typ=AT_FUNCTION then
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gotprefix:='%call16('
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else
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gotprefix:='%got(';
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hasgot:=true;
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end;
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if offset > 0 then
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GetReferenceString := GetReferenceString + '+' + ToStr(offset)
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else if offset < 0 then
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GetReferenceString := GetReferenceString + ToStr(offset);
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case refaddr of
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addr_high:
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GetReferenceString := '%hi(' + GetReferenceString + ')';
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addr_low:
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GetReferenceString := '%lo(' + GetReferenceString + ')';
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addr_pic:
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begin
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if hasgot then
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GetReferenceString := gotprefix + GetReferenceString + ')'
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else
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internalerror(2012070401);
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end;
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end;
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end
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else
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begin
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{$ifdef extdebug}
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if assigned(symbol) and
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not(refaddr in [addr_pic,addr_low]) then
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internalerror(2003052601);
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{$endif extdebug}
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if base <> NR_NO then
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GetReferenceString := GetReferenceString + '(' + asm_regname(base) + ')';
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if index = NR_NO then
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begin
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if offset <> 0 then
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GetReferenceString := ToStr(offset) + GetReferenceString;
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if assigned(symbol) then
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begin
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if refaddr = addr_low then
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GetReferenceString := '%lo(' + symbol.Name + ')' + GetReferenceString
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else if refaddr = addr_pic then
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begin
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if symbol.typ=AT_FUNCTION then
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gotprefix:='%call16('
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else
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gotprefix:='%got(';
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GetReferenceString := gotprefix + symbol.Name + ')' + GetReferenceString;
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end
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else
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GetReferenceString := symbol.Name + {'+' +} GetReferenceString;
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end;
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end
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else
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begin
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{$ifdef extdebug}
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if (Offset<>0) or assigned(symbol) then
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internalerror(2003052603);
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{$endif extdebug}
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GetReferenceString := GetReferenceString + '(' + asm_regname(index) + ')';
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end;
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end;
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end;
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end;
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function getopstr(const Oper: TOper): string;
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begin
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with Oper do
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case typ of
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top_reg:
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getopstr := asm_regname(reg);
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top_const:
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getopstr := tostr(longint(val));
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top_ref:
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if (oper.ref^.refaddr in [addr_no, addr_pic]) or ((oper.ref^.refaddr = addr_low) and ((oper.ref^.base <> NR_NO) or
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(oper.ref^.index <> NR_NO))) then
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getopstr := getreferencestring(ref^)
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else
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getopstr := getreferencestring(ref^);
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else
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internalerror(10001);
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end;
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end;
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function getopstr_4(const Oper: TOper): string;
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var
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tmpref: treference;
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begin
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with Oper do
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case typ of
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top_ref:
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begin
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tmpref := ref^;
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Inc(tmpref.offset, 4);
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getopstr_4 := getreferencestring(tmpref);
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end;
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else
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internalerror(2007050403);
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end;
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end;
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{
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function getnextfpreg(tmpfpu : shortstring) : shortstring;
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begin
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case length(tmpfpu) of
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3:
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if (tmpfpu[3] = '9') then
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tmpfpu:='$f10'
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else
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tmpfpu[3] := succ(tmpfpu[3]);
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4:
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if (tmpfpu[4] = '9') then
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tmpfpu:='$f20'
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else
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tmpfpu[4] := succ(tmpfpu[4]);
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else
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internalerror(20120531);
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end;
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getnextfpreg := tmpfpu;
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end;
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}
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function is_macro_instruction(op : TAsmOp) : boolean;
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begin
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is_macro_instruction :=
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(op=A_SEQ) or (op=A_SNE);
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end;
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procedure TMIPSInstrWriter.WriteInstruction(hp: Tai);
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var
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Op: TAsmOp;
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s,s1: string;
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i: integer;
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tmpfpu: string;
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tmpfpu_len: longint;
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r: TRegister;
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begin
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if hp.typ <> ait_instruction then
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exit;
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op := taicpu(hp).opcode;
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case op of
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A_P_SET_NOMIPS16:
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begin
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s := #9 + '.set' + #9 + 'nomips16';
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owner.AsmWriteLn(s);
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end;
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A_P_MASK,
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A_P_FMASK:
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begin
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s := #9 + gas_op2str[op] + #9'0x' + hexstr(taicpu(hp).oper[0]^.val,8)+ ',' + getopstr(taicpu(hp).oper[1]^) ;
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owner.AsmWriteLn(s);
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end;
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A_P_SET_MACRO:
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begin
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s := #9 + '.set' + #9 + 'macro';
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owner.AsmWriteLn(s);
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TMIPSGNUAssembler(owner).nomacro:=false;
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end;
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A_P_SET_REORDER:
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begin
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s := #9 + '.set' + #9 + 'reorder';
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owner.AsmWriteLn(s);
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TMIPSGNUAssembler(owner).noreorder:=false;
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end;
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A_P_SET_NOMACRO:
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begin
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s := #9 + '.set' + #9 + 'nomacro';
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owner.AsmWriteLn(s);
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TMIPSGNUAssembler(owner).nomacro:=true;
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end;
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A_P_SET_NOREORDER:
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begin
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s := #9 + '.set' + #9 + 'noreorder';
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owner.AsmWriteLn(s);
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TMIPSGNUAssembler(owner).noreorder:=true;
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end;
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A_P_SW:
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begin
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s := #9 + gas_op2str[A_SW] + #9 + getopstr(taicpu(hp).oper[0]^)+ ',' + getopstr(taicpu(hp).oper[2]^) + '(' + getopstr(taicpu(hp).oper[1]^) + ')';
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owner.AsmWriteLn(s);
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end;
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A_P_LW:
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begin
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s := #9 + gas_op2str[A_LW] + #9 + getopstr(taicpu(hp).oper[0]^)+ ',' + getopstr(taicpu(hp).oper[2]^) + '(' + getopstr(taicpu(hp).oper[1]^) + ')';
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owner.AsmWriteLn(s);
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end;
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A_LDC1:
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begin
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if (target_info.endian = endian_big) then
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begin
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s := #9 + gas_op2str[A_LDC1] + #9 + getopstr(taicpu(hp).oper[0]^)
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+ ',' + getopstr(taicpu(hp).oper[1]^);
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end
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else
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begin
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tmpfpu := getopstr(taicpu(hp).oper[0]^);
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s := #9 + gas_op2str[A_LWC1] + #9 + tmpfpu + ',' + getopstr(taicpu(hp).oper[1]^); // + '(' + getopstr(taicpu(hp).oper[1]^) + ')';
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owner.AsmWriteLn(s);
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{ bug if $f9/$f19
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tmpfpu_len := length(tmpfpu);
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tmpfpu[tmpfpu_len] := succ(tmpfpu[tmpfpu_len]);
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}
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r := taicpu(hp).oper[0]^.reg;
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setsupreg(r, getsupreg(r) + 1);
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tmpfpu := asm_regname(r);
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s := #9 + gas_op2str[A_LWC1] + #9 + tmpfpu + ',' + getopstr_4(taicpu(hp).oper[1]^); // + '(' + getopstr(taicpu(hp).oper[1]^) + ')';
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end;
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owner.AsmWriteLn(s);
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end;
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A_SDC1:
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begin
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if (target_info.endian = endian_big) then
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begin
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s := #9 + gas_op2str[A_SDC1] + #9 + getopstr(taicpu(hp).oper[0]^)
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+ ',' + getopstr(taicpu(hp).oper[1]^);
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end
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else
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begin
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tmpfpu := getopstr(taicpu(hp).oper[0]^);
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s := #9 + gas_op2str[A_SWC1] + #9 + tmpfpu + ',' + getopstr(taicpu(hp).oper[1]^); //+ ',' + getopstr(taicpu(hp).oper[2]^) + '(' + getopstr(taicpu(hp).oper[1]^) + ')';
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owner.AsmWriteLn(s);
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{
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tmpfpu_len := length(tmpfpu);
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tmpfpu[tmpfpu_len] := succ(tmpfpu[tmpfpu_len]);
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}
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r := taicpu(hp).oper[0]^.reg;
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setsupreg(r, getsupreg(r) + 1);
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tmpfpu := asm_regname(r);
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s := #9 + gas_op2str[A_SWC1] + #9 + tmpfpu + ',' + getopstr_4(taicpu(hp).oper[1]^); //+ ',' + getopstr(taicpu(hp).oper[2]^) + '(' + getopstr(taicpu(hp).oper[1]^) + ')';
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end;
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owner.AsmWriteLn(s);
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end;
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else
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begin
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if is_macro_instruction(op) and TMIPSGNUAssembler(owner).nomacro then
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owner.AsmWriteln(#9'.set'#9'macro');
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s := #9 + gas_op2str[op] + cond2str[taicpu(hp).condition];
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if taicpu(hp).delayslot_annulled then
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s := s + ',a';
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if taicpu(hp).ops > 0 then
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begin
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s := s + #9 + getopstr(taicpu(hp).oper[0]^);
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for i := 1 to taicpu(hp).ops - 1 do
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s := s + ',' + getopstr(taicpu(hp).oper[i]^);
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end;
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owner.AsmWriteLn(s);
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if is_macro_instruction(op) and TMIPSGNUAssembler(owner).nomacro then
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owner.AsmWriteln(#9'.set'#9'nomacro');
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end;
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end;
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end;
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const
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as_MIPSEL_as_info: tasminfo =
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(
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id: as_gas;
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idtxt: 'AS';
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asmbin: 'as';
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asmcmd: '$ABI $ARCH $NOWARN -EL $PIC -o $OBJ $ASM';
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supported_targets: [system_mipsel_linux];
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flags: [af_allowdirect, af_needar, af_smartlink_sections];
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labelprefix: '.L';
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comment: '# ';
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dollarsign: '$';
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);
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as_MIPSEB_as_info: tasminfo =
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(
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id: as_gas;
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idtxt: 'AS';
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asmbin: 'as';
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asmcmd: '$ABI $ARCH $NOWARN -EB $PIC -o $OBJ $ASM';
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supported_targets: [system_mipseb_linux];
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flags: [af_allowdirect, af_needar, af_smartlink_sections];
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labelprefix: '.L';
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comment: '# ';
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dollarsign: '$';
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);
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begin
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{$ifdef MIPSEL}
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RegisterAssembler(as_MIPSEL_as_info, TMIPSGNUAssembler);
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{$else MIPSEL}
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RegisterAssembler(as_MIPSEB_as_info, TMIPSGNUAssembler);
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{$endif MIPSEL}
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end.
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