fpc/compiler/riscv64
florian 28f25b2df0 * reworked usage of tcgnotnode.handle_locjump
git-svn-id: trunk@46275 -
2020-08-05 21:15:32 +00:00
..
aoptcpu.pas - RISC-V: Share optimizations between 32 and 64-bit. 2020-01-13 22:49:23 +00:00
aoptcpub.pas
aoptcpuc.pas
aoptcpud.pas
cgcpu.pas * renamed getintparaloc to getcgtempparaloc 2019-12-24 22:12:25 +00:00
cpubase.pas Change parameter type to tcgint for is_imm12 and is_lui_imm functions to avoid range check errors 2019-11-29 10:31:31 +00:00
cpuinfo.pas * disable cs_opt_regvar on all platforms when compiled for LLVM (LLVM does 2020-01-29 22:21:07 +00:00
cpunode.pas
cpupara.pas * renamed getintparaloc to getcgtempparaloc 2019-12-24 22:12:25 +00:00
cpupi.pas
cputarg.pas
hlcgcpu.pas
itcpugas.pas
nrv64add.pas
nrv64cal.pas
nrv64cnv.pas
nrv64ld.pas
nrv64mat.pas * reworked usage of tcgnotnode.handle_locjump 2020-08-05 21:15:32 +00:00
rarv64gas.pas * correctly handle local reference in the RISC V assembler readers (both 32 and 64 bit) 2019-12-25 15:23:28 +00:00
rarv.pas
rrv32con.inc
rrv32dwa.inc
rrv32nor.inc
rrv32num.inc
rrv32rni.inc
rrv32sri.inc
rrv32sta.inc
rrv32std.inc
rrv32sup.inc
rv32reg.dat
symcpu.pas
tripletcpu.pas * mark all external assemblers using an LLVM tool using af_llvm 2020-07-19 14:30:35 +00:00