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425 lines
13 KiB
ObjectPascal
425 lines
13 KiB
ObjectPascal
{
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Copyright (c) 1998-2002 by Florian Klaempfl and Peter Vreman
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Contains the base types for the ARM
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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{# Base unit for processor information. This unit contains
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enumerations of registers, opcodes, sizes, and other
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such things which are processor specific.
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}
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unit cpubase;
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{$define USEINLINE}
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{$i fpcdefs.inc}
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interface
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uses
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globtype,globals,
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cpuinfo,
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cgbase
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;
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{*****************************************************************************
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Assembler Opcodes
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*****************************************************************************}
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type
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TAsmOp= {$i xtensaop.inc}
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{ This should define the array of instructions as string }
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op2strtable=array[tasmop] of string[11];
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const
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{ First value of opcode enumeration }
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firstop = low(tasmop);
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{ Last value of opcode enumeration }
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lastop = high(tasmop);
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{*****************************************************************************
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Registers
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*****************************************************************************}
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type
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{ Number of registers used for indexing in tables }
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tregisterindex=0..{$i rxtensanor.inc}-1;
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const
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{ Available Superregisters }
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{$i rxtensasup.inc}
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{ No Subregisters }
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R_SUBWHOLE = R_SUBNONE;
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{ Available Registers }
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{$i rxtensacon.inc}
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{ Integer Super registers first and last }
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first_int_supreg = RS_A0;
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first_int_imreg = $10;
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{ Float Super register first and last }
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first_fpu_supreg = RS_F0;
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first_fpu_imreg = $10;
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{ MM Super register first and last }
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first_mm_supreg = RS_INVALID;
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first_mm_imreg = $30;
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{ firs flag imaginary register }
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first_flag_imreg = $10;
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{ TODO: Calculate bsstart}
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regnumber_count_bsstart = 16;
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regnumber_table : array[tregisterindex] of tregister = (
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{$i rxtensanum.inc}
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);
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regstabs_table : array[tregisterindex] of shortint = (
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{$i rxtensasta.inc}
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);
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regdwarf_table : array[tregisterindex] of shortint = (
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{$i rxtensadwa.inc}
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);
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{*****************************************************************************
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Conditions
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*****************************************************************************}
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type
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TAsmCond=(C_None,
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C_EQ,C_NE,
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C_GE,C_LT,C_GEU,C_LTU,
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C_ANY,C_BNONE,C_ALL,C_NALL,C_BC,C_BS,
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C_EQZ,C_NEZ,C_LTZ,C_GEZ,
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C_EQI,C_NEI,C_LTI,C_GEI,C_LTUI,C_GEUI,
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C_F,C_T
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);
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TAsmConds = set of TAsmCond;
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TResFlagsEnum = (F_Z,F_NZ);
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TResFlags = record
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register: TRegister;
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flag: TResFlagsEnum;
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end;
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const
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cond2str : array[TAsmCond] of string[4]=('',
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'eq','ne',
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'ge','lt','geu','ltu',
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'any','none','all','nall','bc','bs',
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'eqz','nez','ltz','gez',
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'eqi','nei','lti','gei','ltui','geui',
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'f','t'
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);
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uppercond2str : array[TAsmCond] of string[4]=('',
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'EQ','NE',
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'GE','LT','GEU','LTU',
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'ANY','NONE','ALL','NALL','BC','BS',
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'EQZ','NEZ','LTZ','GEZ',
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'EQI','NEI','LTI','GEI','LTUI','GEUI',
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'F','T'
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);
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{*****************************************************************************
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Operands
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*****************************************************************************}
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type
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tupdatereg = (UR_None,UR_Update);
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tcpumodeflag = (mfA, mfI, mfF);
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tcpumodeflags = set of tcpumodeflag;
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tspecialregflag = (srC, srX, srS, srF);
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tspecialregflags = set of tspecialregflag;
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{*****************************************************************************
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Constants
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*****************************************************************************}
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const
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max_operands = 6;
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maxintregs = 15;
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maxfpuregs = 8;
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maxaddrregs = 0;
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{*****************************************************************************
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Operand Sizes
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*****************************************************************************}
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type
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topsize = (S_NO,
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S_B,S_W,S_L,S_BW,S_BL,S_WL,
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S_IS,S_IL,S_IQ,
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S_FS,S_FL,S_FX,S_D,S_Q,S_FV,S_FXX
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);
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{*****************************************************************************
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Default generic sizes
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*****************************************************************************}
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const
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{ Defines the default address size for a processor, }
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OS_ADDR = OS_32;
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{ the natural int size for a processor,
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has to match osuinttype/ossinttype as initialized in psystem }
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OS_INT = OS_32;
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OS_SINT = OS_S32;
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{ the maximum float size for a processor, }
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OS_FLOAT = OS_F64;
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{ the size of a vector register for a processor }
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OS_VECTOR = OS_M32;
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{*****************************************************************************
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Generic Register names
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*****************************************************************************}
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{ Stack pointer register }
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NR_STACK_POINTER_REG = NR_A1;
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RS_STACK_POINTER_REG = RS_A1;
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{ Frame pointer register (initialized in tcpuprocinfo.init_framepointer) }
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RS_FRAME_POINTER_REG: tsuperregister = RS_A7;
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NR_FRAME_POINTER_REG: tregister = NR_A7;
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{ Register for addressing absolute data in a position independant way,
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such as in PIC code. The exact meaning is ABI specific. For
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further information look at GCC source : PIC_OFFSET_TABLE_REGNUM
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}
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{ Results are returned in this register (32-bit values) }
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NR_FUNCTION_RETURN_REG = NR_A2;
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RS_FUNCTION_RETURN_REG = RS_A2;
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{ The value returned from a function is available in this register }
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NR_FUNCTION_RESULT_REG = NR_FUNCTION_RETURN_REG;
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RS_FUNCTION_RESULT_REG = RS_FUNCTION_RETURN_REG;
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NR_FPU_RESULT_REG = NR_INVALID;
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NR_MM_RESULT_REG = NR_INVALID;
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NR_RETURN_ADDRESS_REG = NR_FUNCTION_RETURN_REG;
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{ Offset where the parent framepointer is pushed }
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PARENT_FRAMEPOINTER_OFFSET = 0;
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{ we consider B0 as the default flag }
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NR_DEFAULTFLAGS = NR_B0;
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RS_DEFAULTFLAGS = RS_B0;
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{*****************************************************************************
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GCC /ABI linking information
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*****************************************************************************}
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const
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{ Required parameter alignment when calling a routine declared as
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stdcall and cdecl. The alignment value should be the one defined
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by GCC or the target ABI.
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The value of this constant is equal to the constant
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PARM_BOUNDARY / BITS_PER_UNIT in the GCC source.
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}
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std_param_align = 4;
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{*****************************************************************************
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Helpers
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*****************************************************************************}
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{ Returns the tcgsize corresponding with the size of reg.}
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function reg_cgsize(const reg: tregister) : tcgsize;
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function cgsize2subreg(regtype: tregistertype; s:Tcgsize):Tsubregister;
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function is_calljmp(o:tasmop):boolean;{$ifdef USEINLINE}inline;{$endif USEINLINE}
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function findreg_by_number(r:Tregister):tregisterindex;
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function std_regnum_search(const s:string):Tregister;
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function std_regname(r:Tregister):string;
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function inverse_cond(const c: TAsmCond): TAsmCond; {$ifdef USEINLINE}inline;{$endif USEINLINE}
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function conditions_equal(const c1, c2: TAsmCond): boolean; {$ifdef USEINLINE}inline;{$endif USEINLINE}
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function flags_to_cond(const f: TResFlagsEnum) : TAsmCond;
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{ Checks if Subset is a subset of c (e.g. "less than" is a subset of "less than or equal" }
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function condition_in(const Subset, c: TAsmCond): Boolean;
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function dwarf_reg(r:tregister):shortint;
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function dwarf_reg_no_error(r:tregister):shortint;
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function eh_return_data_regno(nr: longint): longint;
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implementation
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uses
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systems,rgBase,verbose;
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const
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std_regname_table : TRegNameTable = (
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{$i rxtensastd.inc}
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);
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regnumber_index : array[tregisterindex] of tregisterindex = (
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{$i rxtensarni.inc}
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);
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std_regname_index : array[tregisterindex] of tregisterindex = (
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{$i rxtensasri.inc}
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);
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function cgsize2subreg(regtype: tregistertype; s:Tcgsize):Tsubregister;
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begin
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case regtype of
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R_MMREGISTER:
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begin
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case s of
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{ records passed in MM registers }
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OS_32,
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OS_F32:
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cgsize2subreg:=R_SUBFS;
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OS_64,
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OS_F64:
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cgsize2subreg:=R_SUBFD;
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else
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internalerror(2009112701);
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end;
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end;
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else
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cgsize2subreg:=R_SUBWHOLE;
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end;
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end;
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function reg_cgsize(const reg: tregister): tcgsize;
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begin
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case getregtype(reg) of
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R_INTREGISTER :
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reg_cgsize:=OS_32;
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R_FPUREGISTER :
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reg_cgsize:=OS_F32;
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else
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internalerror(2020040501);
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end;
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end;
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function is_calljmp(o:tasmop):boolean;{$ifdef USEINLINE}inline;{$endif USEINLINE}
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begin
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{ This isn't 100% perfect because the arm allows jumps also by writing to PC=R15.
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To overcome this problem we simply forbid that FPC generates jumps by loading R15 }
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is_calljmp:= o in [A_Bcc,A_BT,A_CALL0,A_CALL4,A_CALL8,A_CALL12,A_CALLX0,A_CALLX4,A_CALLX8,A_CALLX12];
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end;
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function findreg_by_number(r:Tregister):tregisterindex;
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begin
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result:=rgBase.findreg_by_number_table(r,regnumber_index);
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end;
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function std_regnum_search(const s:string):Tregister;
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begin
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result:=regnumber_table[findreg_by_name_table(s,std_regname_table,std_regname_index)];
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end;
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function std_regname(r:Tregister):string;
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var
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p : tregisterindex;
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begin
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p:=findreg_by_number_table(r,regnumber_index);
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if p<>0 then
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result:=std_regname_table[p]
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else
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result:=generic_regname(r);
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end;
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function inverse_cond(const c: TAsmCond): TAsmCond; {$ifdef USEINLINE}inline;{$endif USEINLINE}
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const
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inverse: array[TAsmCond] of TAsmCond=(C_None,
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C_NE,C_EQ,
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C_LT,C_GE,C_LTU,C_GEU,
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C_BNONE,C_ANY,C_NALL,C_BNONE,C_BS,C_BC,
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C_NEZ,C_EQZ,C_GEZ,C_LTZ,
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C_NEI,C_EQI,C_GEI,C_LTI,C_GEUI,C_LTUI,
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C_T,C_F
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);
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begin
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result := inverse[c];
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end;
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function flags_to_cond(const f: TResFlagsEnum) : TAsmCond;
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const flags2cond: array[TResFlagsEnum] of tasmcond = (
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C_F,
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C_T);
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begin
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flags_to_cond := flags2cond[f];
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end;
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function conditions_equal(const c1, c2: TAsmCond): boolean; {$ifdef USEINLINE}inline;{$endif USEINLINE}
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begin
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result := c1 = c2;
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end;
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{ Checks if Subset is a subset of c (e.g. "less than" is a subset of "less than or equal" }
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function condition_in(const Subset, c: TAsmCond): Boolean;
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begin
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Result := (c = C_None) or conditions_equal(Subset, c);
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{ Please update as necessary. [Kit] }
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Result := False;
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end;
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function dwarf_reg(r:tregister):shortint;
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begin
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result:=regdwarf_table[findreg_by_number(r)];
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if result=-1 then
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internalerror(200603251);
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end;
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function dwarf_reg_no_error(r:tregister):shortint;
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begin
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result:=regdwarf_table[findreg_by_number(r)];
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end;
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function eh_return_data_regno(nr: longint): longint;
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begin
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if (nr>=0) and (nr<2) then
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result:=nr
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else
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result:=-1;
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end;
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end.
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