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530 lines
17 KiB
ObjectPascal
530 lines
17 KiB
ObjectPascal
{
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$Id$
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Copyright (c) 1999-2002 by Mazen Neifer
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Contains the assembler object for the SPARC
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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unit aasmcpu;
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{$i fpcdefs.inc}
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interface
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uses
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cclasses,aasmtai,
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aasmbase,globals,verbose,
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cpubase,cpuinfo;
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const
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{ "mov reg,reg" source operand number }
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O_MOV_SOURCE = 0;
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{ "mov reg,reg" source operand number }
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O_MOV_DEST = 1;
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type
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taicpu = class(taicpu_abstract)
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constructor op_none(op : tasmop);
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constructor op_reg(op : tasmop;_op1 : tregister);
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constructor op_ref(op : tasmop;const _op1 : treference);
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constructor op_const(op : tasmop;_op1 : aword);
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constructor op_reg_reg(op : tasmop;_op1,_op2 : tregister);
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constructor op_reg_ref(op : tasmop;_op1 : tregister;const _op2 : treference);
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constructor op_reg_const(op:tasmop; _op1: tregister; _op2: aword);
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constructor op_const_reg(op:tasmop; _op1: aword; _op2: tregister);
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constructor op_ref_reg(op : tasmop;const _op1 : treference;_op2 : tregister);
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constructor op_reg_reg_reg(op : tasmop;_op1,_op2,_op3 : tregister);
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constructor op_reg_ref_reg(op:tasmop;_op1:TRegister;_op2:TReference;_op3:tregister);
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constructor op_reg_const_reg(op:tasmop;_op1:TRegister;_op2:aword;_op3:tregister);
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{ this is for Jmp instructions }
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constructor op_cond_sym(op : tasmop;cond:TAsmCond;_op1 : tasmsymbol);
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constructor op_sym(op : tasmop;_op1 : tasmsymbol);
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constructor op_sym_ofs(op : tasmop;_op1 : tasmsymbol;_op1ofs:longint);
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{ register allocation }
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function is_nop:boolean;override;
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function is_move:boolean;override;
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function spill_registers(list:Taasmoutput;
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rgget:Trggetproc;
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rgunget:Trgungetproc;
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r:Tsupregset;
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var unusedregsint:Tsupregset;
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const spilltemplist:Tspill_temp_list):boolean; override;
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end;
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tai_align = class(tai_align_abstract)
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{ nothing to add }
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end;
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procedure InitAsm;
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procedure DoneAsm;
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implementation
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{*****************************************************************************
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taicpu Constructors
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*****************************************************************************}
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constructor taicpu.op_none(op : tasmop);
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begin
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inherited create(op);
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end;
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constructor taicpu.op_reg(op : tasmop;_op1 : tregister);
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begin
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inherited create(op);
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if (_op1.enum = R_INTREGISTER) and (_op1.number = NR_NO) then
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internalerror(2003031207);
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ops:=1;
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loadreg(0,_op1);
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end;
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constructor taicpu.op_ref(op : tasmop;const _op1 : treference);
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begin
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inherited create(op);
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ops:=1;
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loadref(0,_op1);
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end;
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constructor taicpu.op_const(op : tasmop;_op1 : aword);
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begin
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inherited create(op);
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ops:=1;
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loadconst(0,_op1);
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end;
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constructor taicpu.op_reg_reg(op : tasmop;_op1,_op2 : tregister);
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begin
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inherited create(op);
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if (_op1.enum = R_INTREGISTER) and (_op1.number = NR_NO) then
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internalerror(2003031205);
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if (_op2.enum = R_INTREGISTER) and (_op2.number = NR_NO) then
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internalerror(2003031206);
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ops:=2;
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loadreg(0,_op1);
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loadreg(1,_op2);
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end;
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constructor taicpu.op_reg_const(op:tasmop; _op1: tregister; _op2: aword);
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begin
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inherited create(op);
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if (_op1.enum = R_INTREGISTER) and (_op1.number = NR_NO) then
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internalerror(2003031208);
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ops:=2;
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loadreg(0,_op1);
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loadconst(1,_op2);
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end;
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constructor taicpu.op_const_reg(op:tasmop; _op1: aword; _op2: tregister);
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begin
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inherited create(op);
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if (_op2.enum = R_INTREGISTER) and (_op2.number = NR_NO) then
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internalerror(2003031209);
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ops:=2;
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loadconst(0,_op1);
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loadreg(1,_op2);
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end;
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constructor taicpu.op_reg_ref(op : tasmop;_op1 : tregister;const _op2 : treference);
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begin
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inherited create(op);
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if (_op1.enum = R_INTREGISTER) and (_op1.number = NR_NO) then
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internalerror(2003031210);
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ops:=2;
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loadreg(0,_op1);
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loadref(1,_op2);
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end;
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constructor taicpu.op_ref_reg(op : tasmop;const _op1 : treference;_op2 : tregister);
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begin
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inherited create(op);
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if (_op2.enum = R_INTREGISTER) and (_op2.number = NR_NO) then
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internalerror(2003031210);
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ops:=2;
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loadref(0,_op1);
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loadreg(1,_op2);
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end;
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constructor taicpu.op_reg_reg_reg(op : tasmop;_op1,_op2,_op3 : tregister);
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begin
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inherited create(op);
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if (_op1.enum = R_INTREGISTER) and (_op1.number = NR_NO) then
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internalerror(2003031211);
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if (_op2.enum = R_INTREGISTER) and (_op2.number = NR_NO) then
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internalerror(2003031212);
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if (_op3.enum = R_INTREGISTER) and (_op3.number = NR_NO) then
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internalerror(2003031213);
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ops:=3;
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loadreg(0,_op1);
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loadreg(1,_op2);
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loadreg(2,_op3);
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end;
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constructor taicpu.op_reg_ref_reg(op:tasmop;_op1:TRegister;_op2:TReference;_op3:tregister);
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begin
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inherited create(op);
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if (_op1.enum = R_INTREGISTER) and (_op1.number = NR_NO) then
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internalerror(2003031214);
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if (_op3.enum = R_INTREGISTER) and (_op3.number = NR_NO) then
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internalerror(2003031215);
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{ only allowed to load the address }
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if not(_op2.symaddr in [refs_lo,refs_hi]) then
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internalerror(200305311);
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ops:=3;
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loadreg(0,_op1);
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loadref(1,_op2);
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loadreg(2,_op3);
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end;
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constructor taicpu.op_reg_const_reg(op:tasmop;_op1:TRegister;_op2:aword;_op3:tregister);
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begin
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inherited create(op);
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if (_op1.enum = R_INTREGISTER) and (_op1.number = NR_NO) then
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internalerror(2003031216);
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if (_op3.enum = R_INTREGISTER) and (_op3.number = NR_NO) then
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internalerror(2003031217);
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ops:=3;
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loadreg(0,_op1);
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loadconst(1,_op2);
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loadreg(2,_op3);
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end;
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constructor taicpu.op_cond_sym(op:tasmop;cond:TAsmCond;_op1:tasmsymbol);
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begin
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inherited create(op);
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condition:=cond;
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ops:=1;
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loadsymbol(0,_op1,0);
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end;
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constructor taicpu.op_sym(op : tasmop;_op1 : tasmsymbol);
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begin
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inherited create(op);
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ops:=1;
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loadsymbol(0,_op1,0);
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end;
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constructor taicpu.op_sym_ofs(op : tasmop;_op1 : tasmsymbol;_op1ofs:longint);
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begin
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inherited create(op);
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ops:=1;
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loadsymbol(0,_op1,_op1ofs);
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end;
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function taicpu.is_nop:boolean;
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begin
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result:=(opcode=A_NOP);
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end;
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function taicpu.is_move:boolean;
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begin
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result:=(opcode=A_MOV) and
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(oper[0].typ=top_reg) and
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(oper[1].typ=top_reg);
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end;
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function taicpu.spill_registers(list:Taasmoutput;
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rgget:Trggetproc;
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rgunget:Trgungetproc;
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r:Tsupregset;
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var unusedregsint:Tsupregset;
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const spilltemplist:Tspill_temp_list): boolean;
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function decode_loadstore(op: tasmop; var counterpart: tasmop; var wasload: boolean): boolean;
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begin
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result := true;
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wasload := true;
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case op of
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A_LDSB,
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A_LDUB :
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begin
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counterpart := A_STB;
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end;
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A_LDSH,
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A_LDUH:
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begin
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counterpart := A_STH;
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end;
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A_LD :
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begin
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counterpart := A_ST;
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wasload := false;
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end;
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A_LDD:
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begin
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counterpart := A_STD;
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wasload := false;
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end;
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else
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result := false;
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end;
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end;
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var i:byte;
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supreg, reg1, reg2, reg3: Tsuperregister;
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helpreg:Tregister;
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helpins:Taicpu;
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op:Tasmop;
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pos:Tai;
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wasload: boolean;
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begin
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spill_registers:=false;
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if (ops = 2) and
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(oper[1].typ=top_ref) and
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{ oper[1] can also be ref in case of "lis r3,symbol@ha" or so }
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decode_loadstore(opcode,op,wasload) then
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begin
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{ the register that's being stored/loaded }
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supreg:=oper[0].reg.number shr 8;
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if supreg in r then
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begin
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// Example:
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// l?? r20d, 8(r1) ; r20d must be spilled into -60(r1)
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//
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// Change into:
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//
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// l?? r21d, 8(r1)
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// st? r21d, -60(r1)
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//
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// And:
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//
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// st? r20d, 8(r1) ; r20d must be spilled into -60(r1)
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//
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// Change into:
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//
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// l?? r21d, -60(r1)
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// st? r21d, 8(r1)
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pos := get_insert_pos(Tai(previous),oper[0].reg.number shr 8,
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oper[1].ref^.base.number shr 8,
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oper[1].ref^.index.number shr 8,
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unusedregsint);
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rgget(list,pos,0,helpreg);
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spill_registers := true;
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if wasload then
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begin
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helpins := taicpu.op_reg_ref(opcode,helpreg,oper[1].ref^);
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loadref(1,spilltemplist[supreg]);
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opcode := op;
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end
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else
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helpins := taicpu.op_reg_ref(op,helpreg,spilltemplist[supreg]);
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if pos=nil then
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list.insertafter(helpins,list.first)
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else
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list.insertafter(helpins,pos.next);
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loadreg(0,helpreg);
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rgunget(list,helpins,helpreg);
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forward_allocation(tai(helpins.next),unusedregsint);
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{
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writeln('spilling!');
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list.insertafter(tai_comment.Create(strpnew('Spilling!')),helpins);
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}
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end;
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{ now the registers used in the reference }
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{ a) base }
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supreg := oper[1].ref^.base.number shr 8;
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if supreg in r then
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begin
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if wasload then
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pos:=get_insert_pos(Tai(previous),oper[1].ref^.index.number shr 8,oper[0].reg.number shr 8,0,unusedregsint)
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else
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pos:=get_insert_pos(Tai(previous),oper[1].ref^.index.number shr 8,0,0,unusedregsint);
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rgget(list,pos,0,helpreg);
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spill_registers:=true;
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helpins:=Taicpu.op_reg_ref(A_LD,helpreg,spilltemplist[supreg]);
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if pos=nil then
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list.insertafter(helpins,list.first)
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else
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list.insertafter(helpins,pos.next);
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oper[1].ref^.base:=helpreg;
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rgunget(list,helpins,helpreg);
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forward_allocation(Tai(helpins.next),unusedregsint);
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{
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writeln('spilling!');
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list.insertafter(tai_comment.Create(strpnew('Spilling!')),helpins);
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}
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end;
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{ b) index }
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supreg := oper[1].ref^.index.number shr 8;
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if supreg in r then
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begin
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if wasload then
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pos:=get_insert_pos(Tai(previous),oper[1].ref^.base.number shr 8,oper[0].reg.number shr 8,0,unusedregsint)
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else
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pos:=get_insert_pos(Tai(previous),oper[1].ref^.base.number shr 8,0,0,unusedregsint);
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rgget(list,pos,0,helpreg);
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spill_registers:=true;
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helpins:=Taicpu.op_reg_ref(A_LD,helpreg,spilltemplist[supreg]);
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if pos=nil then
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list.insertafter(helpins,list.first)
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else
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list.insertafter(helpins,pos.next);
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oper[1].ref^.index:=helpreg;
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rgunget(list,helpins,helpreg);
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forward_allocation(Tai(helpins.next),unusedregsint);
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{
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writeln('spilling!');
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list.insertafter(tai_comment.Create(strpnew('Spilling!')),helpins);
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}
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end;
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{ load/store is done }
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exit;
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end;
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{ all other instructions the compiler generates are the same (I hope): }
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{ operand 0 is a register and is the destination, the others are sources }
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{ and can be either registers or constants }
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{ exception: branches (is_jmp isn't always set for them) }
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if oper[0].typ <> top_reg then
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exit;
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reg1 := oper[0].reg.number shr 8;
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if oper[1].typ = top_reg then
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reg2 := oper[1].reg.number shr 8
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else
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reg2 := 0;
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if (ops >= 3) and
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(oper[2].typ = top_reg) then
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reg3 := oper[2].reg.number shr 8
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else
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reg3 := 0;
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supreg:=reg1;
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if supreg in r then
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begin
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// Example:
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// add r20d, r21d, r22d ; r20d must be spilled into -60(r1)
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//
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// Change into:
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//
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// lwz r23d, -60(r1)
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// add r23d, r21d, r22d
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// stw r23d, -60(r1)
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pos := get_insert_pos(Tai(previous),reg1,reg2,reg3,unusedregsint);
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rgget(list,pos,0,helpreg);
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spill_registers := true;
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helpins := taicpu.op_reg_ref(A_ST,helpreg,spilltemplist[supreg]);
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list.insertafter(helpins,self);
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helpins := taicpu.op_reg_ref(A_LD,helpreg,spilltemplist[supreg]);
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if pos=nil then
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list.insertafter(helpins,list.first)
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else
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list.insertafter(helpins,pos.next);
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loadreg(0,helpreg);
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rgunget(list,helpins,helpreg);
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forward_allocation(tai(helpins.next),unusedregsint);
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{
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writeln('spilling!');
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list.insertafter(tai_comment.Create(strpnew('Spilling!')),helpins);
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}
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end;
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for i := 1 to 2 do
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if (oper[i].typ = top_reg) then
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begin
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supreg:=oper[i].reg.number shr 8;
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if supreg in r then
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begin
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// Example:
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// add r20d, r21d, r22d ; r20d must be spilled into -60(r1)
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//
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// Change into:
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//
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// lwz r23d, -60(r1)
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// add r23d, r21d, r22d
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// stw r23d, -60(r1)
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pos := get_insert_pos(Tai(previous),reg1,reg2,reg3,unusedregsint);
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rgget(list,pos,0,helpreg);
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spill_registers := true;
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helpins := taicpu.op_reg_ref(A_LD,helpreg,spilltemplist[supreg]);
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if pos=nil then
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list.insertafter(helpins,list.first)
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else
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list.insertafter(helpins,pos.next);
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loadreg(i,helpreg);
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rgunget(list,helpins,helpreg);
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forward_allocation(tai(helpins.next),unusedregsint);
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{
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writeln('spilling!');
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list.insertafter(tai_comment.Create(strpnew('Spilling!')),helpins);
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}
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end;
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end;
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end;
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procedure InitAsm;
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begin
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end;
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procedure DoneAsm;
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begin
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end;
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end.
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{
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$Log$
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Revision 1.31 2003-08-11 21:18:20 peter
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* start of sparc support for newra
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Revision 1.30 2003/06/14 14:53:50 jonas
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* fixed newra cycle for x86
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* added constants for indicating source and destination operands of the
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"move reg,reg" instruction to aasmcpu (and use those in rgobj)
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Revision 1.29 2003/06/12 16:43:07 peter
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* newra compiles for sparc
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Revision 1.28 2003/06/01 01:03:41 peter
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* remove unsupported combinations
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* reg_ref_reg only allowed for refs_lo,refs_hi
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Revision 1.27 2003/05/30 23:57:08 peter
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* more sparc cleanup
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* accumulator removed, splitted in function_return_reg (called) and
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function_result_reg (caller)
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}
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