fpc/compiler/mips/cpuinfo.pas
Jonas Maebe 3798b79fd7 + optimization that (re)orders instance fields of Delphi-style classes in
order to minimise memory losses due to alignment padding. Not yet enabled
    by default at any optimization level, but can be (de)activated separately
    via -Oo(no)orderfields
   o added separate tdef.structalignment method that returns the alignment
     of a type when it appears in a record/object/class (factors out
     AIX-specific double alignment in structs)
   o changed the handling of the offset of a delegate interface
     implemented via a field, by taking the field offset on demand
     rather than at declaration time (because the ordering optimization
     causes the offsets of fields to be unknown until the entire
     declaration has been parsed)

git-svn-id: trunk@21947 -
2012-07-22 16:47:19 +00:00

81 lines
2.1 KiB
ObjectPascal

{
Copyright (c) 1998-2002 by the Free Pascal development team
Basic Processor information for the ARM
See the file COPYING.FPC, included in this distribution,
for details about the copyright.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
**********************************************************************}
Unit CPUInfo;
Interface
uses
globtype;
Type
bestreal = double;
ts32real = single;
ts64real = double;
ts80real = type double;
ts128real = type double;
ts64comp = comp;
pbestreal=^bestreal;
{ possible supported processors for this target }
tcputype =
(cpu_none,
cpu_mips32
);
tfputype =(fpu_none,fpu_soft,fpu_mips2,fpu_mips3);
Const
{# Size of native extended floating point type }
extended_size = 8;
{# Size of a multimedia register }
mmreg_size = 0;
{ target cpu string (used by compiler options) }
{$ifdef MIPSEL}
target_cpu_string = 'mipsel';
{$else MIPSEL}
target_cpu_string = 'mips';
{$endif MIPSEL}
{ calling conventions supported by the code generator }
supported_calling_conventions : tproccalloptions = [
pocall_internproc,
pocall_stdcall,
{ same as stdcall only different name mangling }
pocall_cdecl,
{ same as stdcall only different name mangling }
pocall_cppdecl
];
cputypestr : array[tcputype] of string[6] = ('',
'MIPS32'
);
fputypestr : array[tfputype] of string[9] = ('',
'SOFT',
'FPU_MIPS2','FPU_MIPS3'
);
{ Supported optimizations, only used for information }
supported_optimizerswitches = [cs_opt_regvar,cs_opt_loopunroll,cs_opt_nodecse,
cs_opt_reorder_fields];
level1optimizerswitches = [];
level2optimizerswitches = level1optimizerswitches + [cs_opt_regvar,cs_opt_stackframe,cs_opt_nodecse];
level3optimizerswitches = level2optimizerswitches + [cs_opt_loopunroll];
Implementation
end.