fpc/compiler/i8086
florian 912e6d129a * fix modification flags for *ROUND*
git-svn-id: trunk@36280 -
2017-05-21 11:12:57 +00:00
..
aoptcpu.pas * unified usage of MatchOpType 2017-05-07 16:18:33 +00:00
aoptcpub.pas
aoptcpud.pas
cgcpu.pas + allocate and free the flags register (when necessary), when generating code 2017-04-30 01:25:54 +00:00
cpubase.inc
cpuinfo.pas
cpunode.pas
cpupara.pas
cpupi.pas * renamed t<cpuname>procinfo to tcpuprocinfo for all targets, so we can 2016-12-16 22:41:21 +00:00
cputarg.pas
hlcgcpu.pas + added volatility information to all memory references 2016-11-27 18:17:37 +00:00
i8086att.inc + support for the PREFETCHTW1 instruction based on a patch by Emelyanov Roman, resolves #30933 2016-11-18 20:19:39 +00:00
i8086atts.inc * x86 AT&T reader and writer: cleaned up usage of attsufMM suffix: 2016-11-21 02:07:13 +00:00
i8086int.inc + support for the PREFETCHTW1 instruction based on a patch by Emelyanov Roman, resolves #30933 2016-11-18 20:19:39 +00:00
i8086nop.inc * Fixed VMOVQ instruction encoding, now assembles correctly also in 32-bit code. 2016-11-21 13:59:44 +00:00
i8086op.inc + support for the PREFETCHTW1 instruction based on a patch by Emelyanov Roman, resolves #30933 2016-11-18 20:19:39 +00:00
i8086prop.inc * fix modification flags for *ROUND* 2017-05-21 11:12:57 +00:00
i8086tab.inc * Fixed VMOVQ instruction encoding, now assembles correctly also in 32-bit code. 2016-11-21 13:59:44 +00:00
n8086add.pas + added volatility information to all memory references 2016-11-27 18:17:37 +00:00
n8086cal.pas
n8086cnv.pas
n8086con.pas
n8086inl.pas * use an enum instead of integer constants to represent inline numbers 2017-05-10 14:41:43 +00:00
n8086ld.pas + added volatility information to all memory references 2016-11-27 18:17:37 +00:00
n8086mat.pas + implemented 64-bit OP_SHR,OP_SHL and OP_SAR in a_op64_reg_reg for i8086 and 2017-04-29 21:57:48 +00:00
n8086mem.pas + added volatility information to all memory references 2016-11-27 18:17:37 +00:00
n8086tcon.pas * use an enum instead of integer constants to represent inline numbers 2017-05-10 14:41:43 +00:00
n8086util.pas
r8086ari.inc + added individual bits of the x86 flags register as subregisters 2017-04-26 13:52:52 +00:00
r8086att.inc + added individual bits of the x86 flags register as subregisters 2017-04-26 13:52:52 +00:00
r8086con.inc + added individual bits of the x86 flags register as subregisters 2017-04-26 13:52:52 +00:00
r8086dwrf.inc + added individual bits of the x86 flags register as subregisters 2017-04-26 13:52:52 +00:00
r8086int.inc + added individual bits of the x86 flags register as subregisters 2017-04-26 13:52:52 +00:00
r8086iri.inc + added individual bits of the x86 flags register as subregisters 2017-04-26 13:52:52 +00:00
r8086nasm.inc + added individual bits of the x86 flags register as subregisters 2017-04-26 13:52:52 +00:00
r8086nor.inc + added individual bits of the x86 flags register as subregisters 2017-04-26 13:52:52 +00:00
r8086nri.inc + added individual bits of the x86 flags register as subregisters 2017-04-26 13:52:52 +00:00
r8086num.inc + added individual bits of the x86 flags register as subregisters 2017-04-26 13:52:52 +00:00
r8086ot.inc + added individual bits of the x86 flags register as subregisters 2017-04-26 13:52:52 +00:00
r8086rni.inc + added individual bits of the x86 flags register as subregisters 2017-04-26 13:52:52 +00:00
r8086sri.inc + added individual bits of the x86 flags register as subregisters 2017-04-26 13:52:52 +00:00
r8086stab.inc + added individual bits of the x86 flags register as subregisters 2017-04-26 13:52:52 +00:00
r8086std.inc + added individual bits of the x86 flags register as subregisters 2017-04-26 13:52:52 +00:00
ra8086att.pas
ra8086int.pas
rgcpu.pas
symcpu.pas + added an unsigned counterpart to tpointerdef.pointer_arithmetic_it_type (needed by inc/dec) 2016-10-08 11:45:24 +00:00
tgcpu.pas