sergei 3a3197ae9c + i386: inline 64-bit multiplications if overflow checking is disabled and not optimizing for size. Rough testing on Core 2 Duo shows speed improvement by factor of 5, even despite inlined code does not check for zero upper dwords. ... git-svn-id: trunk@26504 -		2014-01-18 11:41:55 +00:00
..
aopt386.pas
cgcpu.pas	* tcg386.g_proc_exit: instead of recalculating stack size, use current_procinfo.final_localsize which was calculated in g_proc_entry.	2013-12-19 10:32:32 +00:00
cpubase.inc	* optimize mov/lea	2013-11-01 19:01:14 +00:00
cpuelf.pas	* Add android to supported targets for assemblers. It fixes assembling for i386-android.	2013-01-18 14:51:09 +00:00
cpuinfo.pas	+ cpu_capabilites for x86_64 and i386	2014-01-16 21:47:28 +00:00
cpunode.pas	+ SEH support for Win32. Enable by cycling with OPT=-dTEST_WIN32_SEH.	2013-12-12 12:43:46 +00:00
cpupara.pas	* missing part of r24776, using a build server also has pitfalls :/	2013-06-02 14:35:29 +00:00
cpupi.pas
cputarg.pas	* Sync with trunk r23404.	2013-01-16 13:21:51 +00:00
csopt386.pas	* fixes several issues which cause warnings by the dfa code when using it to detect uninitialized variables	2013-12-01 17:02:08 +00:00
daopt386.pas	* fixes several issues which cause warnings by the dfa code when using it to detect uninitialized variables	2013-12-01 17:02:08 +00:00
hlcgcpu.pas
i386att.inc	+ added the NEC V20/V30 instructions	2013-10-11 21:27:56 +00:00
i386atts.inc	+ added the NEC V20/V30 instructions	2013-10-11 21:27:56 +00:00
i386int.inc	+ added the NEC V20/V30 instructions	2013-10-11 21:27:56 +00:00
i386nop.inc	- rm LEA reg,imm from x86ins.dat, as that's not a valid x86 instruction,	2013-10-18 23:26:58 +00:00
i386op.inc	+ added the NEC V20/V30 instructions	2013-10-11 21:27:56 +00:00
i386prop.inc	+ added the NEC V20/V30 instructions	2013-10-11 21:27:56 +00:00
i386tab.inc	+ handle 32 bit references on x86-64 so lea can be used for 32 bit arithmetics	2013-11-01 19:01:39 +00:00
n386add.pas	+ i386: inline 64-bit multiplications if overflow checking is disabled and not optimizing for size. Rough testing on Core 2 Duo shows speed improvement by factor of 5, even despite inlined code does not check for zero upper dwords.	2014-01-18 11:41:55 +00:00
n386cal.pas	* Turn off special handling of interrupt calling convention for i386-android.	2013-01-22 14:43:42 +00:00
n386flw.pas	+ SEH support for Win32. Enable by cycling with OPT=-dTEST_WIN32_SEH.	2013-12-12 12:43:46 +00:00
n386inl.pas	+ i386: generate optimized code for 64-bit arithmetic shifts by constant amount. Shifts by 63 and by less than 32 take just two instructions, shifts by 32..62 bits are done with 3 instructions.	2013-10-29 16:10:13 +00:00
n386mat.pas
n386mem.pas	+ added support for special versions of near data pointers associated with a x86 segment register. They are supported on all x86 platforms: i8086, i386 and x86_64	2013-05-05 17:22:37 +00:00
n386set.pas	* cleanup of unused units	2013-07-07 20:00:33 +00:00
popt386.pas	* fixes several issues which cause warnings by the dfa code when using it to detect uninitialized variables	2013-12-01 17:02:08 +00:00
r386ari.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r386att.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r386con.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r386dwrf.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r386int.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r386iri.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r386nasm.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r386nor.inc
r386nri.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r386num.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r386ot.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r386rni.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r386sri.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r386stab.inc
r386std.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
ra386att.pas
ra386int.pas
rgcpu.pas
rropt386.pas	* fixes several issues which cause warnings by the dfa code when using it to detect uninitialized variables	2013-12-01 17:02:08 +00:00