nickysn dea947f87b * fixed tcgx86.a_op_const_ref for shl/shr/sar/rol/ror on i8086 and x86_64 ... git-svn-id: trunk@26018 -		2013-11-10 20:39:47 +00:00
..
aasmcpu.pas	+ handle 32 bit references on x86-64 so lea can be used for 32 bit arithmetics	2013-11-01 19:01:39 +00:00
agx86att.pas
agx86int.pas
agx86nsm.pas	* put the i8086-msdos dwarf debug sections in USE32 class=DWARF segments because	2013-10-27 20:28:43 +00:00
cga.pas
cgx86.pas	* fixed tcgx86.a_op_const_ref for shl/shr/sar/rol/ror on i8086 and x86_64	2013-11-10 20:39:47 +00:00
cpubase.pas	+ handle 32 bit references on x86-64 so lea can be used for 32 bit arithmetics	2013-11-01 19:01:39 +00:00
hlcgx86.pas
itcpugas.pas
itx86int.pas
nx86add.pas	* make use of lea if possible	2013-11-01 19:01:11 +00:00
nx86cal.pas
nx86cnv.pas
nx86con.pas
nx86inl.pas	* Mantis #17273: don't generate x87 instructions on win64 target.	2013-11-08 13:31:07 +00:00
nx86mat.pas
nx86mem.pas
nx86set.pas
rax86.pas
rax86att.pas
rax86int.pas
rgx86.pas	* be able to replace lea by add when spilling	2013-11-01 19:01:20 +00:00
x86ins.dat	+ handle 32 bit references on x86-64 so lea can be used for 32 bit arithmetics	2013-11-01 19:01:39 +00:00
x86reg.dat	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00