mirror of
https://gitlab.com/freepascal.org/fpc/source.git
synced 2025-06-01 16:22:47 +02:00
f36e5411af
a) cpu64bitaddr, which means that we are generating a compiler which
will generate code for targets with a 64 bit address space/abi
b) cpu64bitalu, which means that we are generating a compiler which
will generate code for a cpu with support for 64 bit integer
operations (possibly running in a 32 bit address space, depending
on the cpu64bitaddr define)
All cpus which had cpu64bit set now have both the above defines set,
and none of the 32 bit cpus have cpu64bitalu set (and none will
compile with it currently)
+ pint and puint types, similar to aint/aword (not pword because that
that conflicts with pword=^word)
* several changes from aint/aword to pint/pword
* some changes of tcgsize2size[OS_INT] to sizeof(pint)
git-svn-id: trunk@10320 -
453 lines
13 KiB
ObjectPascal
453 lines
13 KiB
ObjectPascal
{
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Copyright (c) 1998-2002 by Florian Klaempfl
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This unit the GAS asm writers for PowerPC/PowerPC64
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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{****************************************************************************}
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{ Helper routines for Instruction Writer }
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{****************************************************************************}
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unit agppcgas;
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{$i fpcdefs.inc}
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interface
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uses
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aasmbase,
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aasmtai,aasmdata,
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aggas,
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cpubase,cgutils,
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globtype;
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type
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TPPCInstrWriter=class(TCPUInstrWriter)
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procedure WriteInstruction(hp : tai);override;
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end;
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TPPCGNUAssembler=class(TGNUassembler)
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constructor create(smart: boolean); override;
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procedure WriteExtraHeader; override;
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end;
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TPPCAppleGNUAssembler=class(TAppleGNUassembler)
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constructor create(smart: boolean); override;
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function MakeCmdLine: TCmdStr; override;
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end;
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topstr = string[4];
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function getreferencestring(var ref : treference) : string;
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function getopstr_jmp(const o:toper) : string;
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function getopstr(const o:toper) : string;
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function branchmode(o: tasmop): topstr;
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function cond2str(op: tasmop; c: tasmcond): string;
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implementation
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uses
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cutils,globals,verbose,
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cgbase,systems,
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assemble,
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itcpugas,cpuinfo,
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aasmcpu;
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{$ifdef cpu64bitaddr}
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const
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refaddr2str: array[trefaddr] of string[9] = ('', '', '', '@l', '@h', '@higher', '@highest', '@ha', '@highera', '@highesta');
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verbose_refaddrs = [addr_low, addr_high, addr_higher, addr_highest, addr_higha, addr_highera, addr_highesta];
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refaddr2str_darwin: array[trefaddr] of string[4] = ('','','','lo16', 'hi16', '@err', '@err', 'ha16', '@err', '@err');
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{$else cpu64bitaddr}
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const
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refaddr2str: array[trefaddr] of string[3] = ('','','','@l','@h','@ha');
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refaddr2str_darwin: array[trefaddr] of string[4] = ('','','','lo16','hi16','ha16');
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verbose_refaddrs = [addr_low,addr_high,addr_higha];
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{$endif cpu64bitaddr}
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function getreferencestring(var ref : treference) : string;
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var
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s : string;
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begin
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with ref do
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begin
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if ((offset < -32768) or (offset > 32767)) and
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(refaddr = addr_no) then
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internalerror(2006052501);
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if (refaddr = addr_no) then
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s := ''
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else
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begin
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if target_info.system in [system_powerpc_darwin,system_powerpc64_darwin] then
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s := refaddr2str_darwin[refaddr]
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else
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s :='';
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s := s+'(';
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if assigned(symbol) then
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begin
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s:=s+symbol.name;
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if assigned(relsymbol) then
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s:=s+'-'+relsymbol.name;
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end;
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end;
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if offset<0 then
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s:=s+tostr(offset)
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else
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if (offset>0) then
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begin
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if assigned(symbol) then
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s:=s+'+'+tostr(offset)
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else
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s:=s+tostr(offset);
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end;
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if (refaddr in verbose_refaddrs) then
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begin
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s := s+')';
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if not(target_info.system in [system_powerpc_darwin,system_powerpc64_darwin]) then
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s := s+refaddr2str[refaddr];
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end;
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{$ifdef cpu64bitaddr}
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if (refaddr = addr_pic) then
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if (target_info.system <> system_powerpc64_linux) then
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s := s + ')'
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else
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s := s + ')@got';
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{$endif cpu64bitaddr}
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if (index=NR_NO) and (base<>NR_NO) then
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begin
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if offset=0 then
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begin
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if not (assigned(symbol)) then
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s:=s+'0';
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end;
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s:=s+'('+gas_regname(base)+')';
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end
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else if (index<>NR_NO) and (base<>NR_NO) then
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begin
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if (offset=0) then
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s:=s+gas_regname(base)+','+gas_regname(index)
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else
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internalerror(2006052502);
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end;
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end;
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getreferencestring:=s;
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end;
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function getopstr_jmp(const o:toper) : string;
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var
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hs : string;
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begin
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case o.typ of
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top_reg :
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getopstr_jmp:=gas_regname(o.reg);
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{ no top_ref jumping for powerpc }
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top_const :
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getopstr_jmp:=tostr(o.val);
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top_ref :
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begin
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if o.ref^.refaddr<>addr_full then
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internalerror(200402262);
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hs:=o.ref^.symbol.name;
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if o.ref^.offset>0 then
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hs:=hs+'+'+tostr(o.ref^.offset)
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else
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if o.ref^.offset<0 then
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hs:=hs+tostr(o.ref^.offset);
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getopstr_jmp:=hs;
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end;
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top_none:
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getopstr_jmp:='';
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else
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internalerror(2002070603);
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end;
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end;
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function getopstr(const o:toper) : string;
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var
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hs : string;
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begin
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case o.typ of
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top_reg:
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getopstr:=gas_regname(o.reg);
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top_const:
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getopstr:=tostr(longint(o.val));
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top_ref:
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if o.ref^.refaddr=addr_full then
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begin
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hs:=o.ref^.symbol.name;
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if o.ref^.offset>0 then
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hs:=hs+'+'+tostr(o.ref^.offset)
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else
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if o.ref^.offset<0 then
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hs:=hs+tostr(o.ref^.offset);
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getopstr:=hs;
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end
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else
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getopstr:=getreferencestring(o.ref^);
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else
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internalerror(2002070604);
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end;
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end;
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function branchmode(o: tasmop): topstr;
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var tempstr: topstr;
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begin
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tempstr := '';
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case o of
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A_BCCTR,A_BCCTRL: tempstr := 'ctr';
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A_BCLR,A_BCLRL: tempstr := 'lr';
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end;
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case o of
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A_BL,A_BLA,A_BCL,A_BCLA,A_BCCTRL,A_BCLRL: tempstr := tempstr+'l';
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end;
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case o of
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A_BA,A_BLA,A_BCA,A_BCLA: tempstr:=tempstr+'a';
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end;
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branchmode := tempstr;
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end;
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function cond2str(op: tasmop; c: tasmcond): string;
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{ note: no checking is performed whether the given combination of }
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{ conditions is valid }
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var
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tempstr: string;
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begin
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tempstr:=#9;
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case c.simple of
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false:
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begin
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cond2str := tempstr+gas_op2str[op];
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case c.dirhint of
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DH_None:;
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DH_Minus:
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cond2str:=cond2str+'-';
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DH_Plus:
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cond2str:=cond2str+'+';
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else
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internalerror(2003112901);
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end;
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cond2str:=cond2str+#9+tostr(c.bo)+','+tostr(c.bi);
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end;
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true:
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if (op >= A_B) and (op <= A_BCLRL) then
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case c.cond of
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{ unconditional branch }
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C_NONE:
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cond2str := tempstr+gas_op2str[op];
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{ bdnzt etc }
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else
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begin
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tempstr := tempstr+'b'+asmcondflag2str[c.cond]+
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branchmode(op);
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case c.dirhint of
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DH_None:
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tempstr:=tempstr+#9;
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DH_Minus:
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tempstr:=tempstr+('-'+#9);
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DH_Plus:
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tempstr:=tempstr+('+'+#9);
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else
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internalerror(2003112901);
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end;
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case c.cond of
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C_LT..C_NU:
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cond2str := tempstr+gas_regname(newreg(R_SPECIALREGISTER,c.cr,R_SUBWHOLE));
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C_T,C_F,C_DNZT,C_DNZF,C_DZT,C_DZF:
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cond2str := tempstr+tostr(c.crbit);
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else
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cond2str := tempstr;
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end;
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end;
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end
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{ we have a trap instruction }
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else
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begin
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internalerror(2002070601);
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{ not yet implemented !!!!!!!!!!!!!!!!!!!!! }
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{ case tempstr := 'tw';}
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end;
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end;
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end;
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{****************************************************************************}
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{ PowerPC Instruction Writer }
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{****************************************************************************}
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Procedure TPPCInstrWriter.WriteInstruction(hp : tai);
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var op: TAsmOp;
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s: string;
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i: byte;
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sep: string[3];
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begin
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op:=taicpu(hp).opcode;
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if is_calljmp(op) then
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begin
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{ direct BO/BI in op[0] and op[1] not supported, put them in condition! }
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case op of
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A_B,A_BA,A_BL,A_BLA:
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s:=#9+gas_op2str[op]+#9;
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A_BCTR,A_BCTRL,A_BLR,A_BLRL:
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s:=#9+gas_op2str[op]
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else
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begin
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s:=cond2str(op,taicpu(hp).condition);
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if (s[length(s)] <> #9) and
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(taicpu(hp).ops>0) then
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s := s + ',';
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end;
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end;
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if (taicpu(hp).ops>0) and (taicpu(hp).oper[0]^.typ<>top_none) then
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begin
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{ first write the current contents of s, because the symbol }
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{ may be 255 characters }
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owner.asmwrite(s);
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s:=getopstr_jmp(taicpu(hp).oper[0]^);
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end;
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end
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else
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{ process operands }
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begin
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s:=#9+gas_op2str[op];
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if taicpu(hp).ops<>0 then
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begin
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{
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if not is_calljmp(op) then
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sep:=','
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else
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}
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sep:=#9;
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for i:=0 to taicpu(hp).ops-1 do
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begin
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// debug code
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// writeln(s);
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// writeln(taicpu(hp).fileinfo.line);
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s:=s+sep+getopstr(taicpu(hp).oper[i]^);
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sep:=',';
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end;
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end;
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end;
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owner.AsmWriteLn(s);
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end;
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{****************************************************************************}
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{ GNU PPC Assembler writer }
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{****************************************************************************}
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constructor TPPCGNUAssembler.create(smart: boolean);
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begin
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inherited create(smart);
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InstrWriter := TPPCInstrWriter.create(self);
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end;
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procedure TPPCGNUAssembler.WriteExtraHeader;
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var
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i : longint;
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begin
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for i:=0 to 31 do
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AsmWriteln(#9'.set'#9'r'+tostr(i)+','+tostr(i));
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for i:=0 to 31 do
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AsmWriteln(#9'.set'#9'f'+tostr(i)+','+tostr(i));
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end;
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{****************************************************************************}
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{ GNU/Apple PPC Assembler writer }
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{****************************************************************************}
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constructor TPPCAppleGNUAssembler.create(smart: boolean);
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begin
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inherited create(smart);
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InstrWriter := TPPCInstrWriter.create(self);
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end;
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function TPPCAppleGNUAssembler.MakeCmdLine: TCmdStr;
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begin
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result := inherited MakeCmdLine;
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{$ifdef cpu64bitaddr}
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Replace(result,'$ARCH','ppc64')
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{$else cpu64bitaddr}
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case current_settings.cputype of
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cpu_PPC7400:
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Replace(result,'$ARCH','ppc7400');
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cpu_PPC970:
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Replace(result,'$ARCH','ppc970');
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else
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Replace(result,'$ARCH','ppc')
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end;
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{$endif cpu64bitaddr}
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end;
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{*****************************************************************************
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Initialize
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*****************************************************************************}
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const
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as_ppc_gas_info : tasminfo =
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(
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id : as_gas;
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idtxt : 'AS';
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asmbin : 'as';
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{$ifdef cpu64bitaddr}
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asmcmd : '-a64 -o $OBJ $ASM';
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{$else cpu64bitaddr}
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asmcmd: '-o $OBJ $ASM';
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{$endif cpu64bitaddr}
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supported_target : system_any;
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flags : [af_allowdirect,af_needar,af_smartlink_sections];
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labelprefix : '.L';
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comment : '# ';
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);
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as_ppc_gas_darwin_powerpc_info : tasminfo =
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(
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id : as_darwin;
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idtxt : 'AS-Darwin';
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asmbin : 'as';
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asmcmd : '-o $OBJ $ASM -arch $ARCH';
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supported_target : system_any;
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flags : [af_allowdirect,af_needar,af_smartlink_sections,af_supports_dwarf];
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labelprefix : 'L';
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comment : '# ';
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);
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begin
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RegisterAssembler(as_ppc_gas_info,TPPCGNUAssembler);
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RegisterAssembler(as_ppc_gas_darwin_powerpc_info,TPPCAppleGNUAssembler);
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end.
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