| .. |
|
aasmcpu.pas
|
+ prove of concept how FMA4 could be supported in inline assembler
|
2014-03-20 21:25:38 +00:00 |
|
agx86att.pas
|
Separate out nasm assembler for i8086, i386 and x86_64 cpus, also separte based on target object format
|
2014-01-21 00:26:08 +00:00 |
|
agx86int.pas
|
Separate out nasm assembler for i8086, i386 and x86_64 cpus, also separte based on target object format
|
2014-01-21 00:26:08 +00:00 |
|
agx86nsm.pas
|
Avoid new line after lock prefix for nasm
|
2014-04-10 14:56:30 +00:00 |
|
cga.pas
|
|
|
|
cgx86.pas
|
* initialize DS from CS in the interrupt procedure entry code in tiny model,
|
2014-04-10 20:02:35 +00:00 |
|
cpubase.pas
|
+ support compact, large and huge memory models in x86/cpubase.segment_regs_equal()
|
2014-03-30 19:36:21 +00:00 |
|
hlcgx86.pas
|
|
|
|
itcpugas.pas
|
|
|
|
itx86int.pas
|
|
|
|
ni86mem.pas
|
* isolated segment-related functionality of tabsolutevarsym into i386/i8086-
|
2014-03-30 15:42:53 +00:00 |
|
nx86add.pas
|
* tx86addnode.second_addfloat: use single and double-precision memory locations without loading them on FPU stack if possible.
|
2014-04-13 12:37:30 +00:00 |
|
nx86cal.pas
|
* a_call_ref functionality cannot be implemented efficiently at code generator level, because references need specific preparations at earlier points. Moved this support to tcgcallnode and its x86 descendants, and got rid of all ifdef's around.
|
2014-02-03 13:28:56 +00:00 |
|
nx86cnv.pas
|
* x86: improve x87 qword to float conversion, using single-precision constants saves space and removes need in separate load on FPU stack. No precision loss occurs because 2**64 is representable exactly even in single precision.
|
2014-03-03 20:41:42 +00:00 |
|
nx86con.pas
|
|
|
|
nx86inl.pas
|
* moved pbestrealtype from symdef to symcpu
|
2014-04-01 21:41:37 +00:00 |
|
nx86mat.pas
|
* create shorter code for -<single/double> when generating avx code
|
2014-03-29 19:35:41 +00:00 |
|
nx86mem.pas
|
* preserve the segment of the reference in tx86vecnode.update_reference_reg_mul
|
2014-04-05 14:46:35 +00:00 |
|
nx86set.pas
|
* Use GOT-relative constants for i386 PIC jump tables, they don't need runtime relocations. Now almost ABI-compliant on Linux/BSD (Darwin targets unchanged). Also clean up i8086-specific stuff: using tai_const.create_type_sym(aitconst_ptr,...) generates near pointers on i8086, which is the desired goal.
|
2014-03-03 21:06:49 +00:00 |
|
rax86.pas
|
* merged avx2 branch, developed by Torsten Grundke
|
2014-03-20 12:03:52 +00:00 |
|
rax86att.pas
|
* properly propagate PIC-related suffixes from the x86 assembler reader in
|
2013-05-30 12:20:48 +00:00 |
|
rax86int.pas
|
* Moved local label infrastructure into tasmreader, reduces number of global vars. Functionality is not changed.
|
2014-04-05 09:43:13 +00:00 |
|
rgx86.pas
|
* do not allow VCOMISD/VCOMISS to use a memory location as target
|
2014-02-14 21:26:51 +00:00 |
|
symi86.pas
|
* i8086 and i386-specific code from tabstractprocdef.is_pushleftright moved to
|
2014-04-12 15:34:08 +00:00 |
|
symx86.pas
|
+ symx86 unit, forgot to commit (part of r27397)
|
2014-03-30 22:03:55 +00:00 |
|
x86ins.dat
|
+ prove of concept how FMA4 could be supported in inline assembler
|
2014-03-20 21:25:38 +00:00 |
|
x86reg.dat
|
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
|
2013-10-03 08:08:04 +00:00 |