Pierre Muller 43538416e3 Handle ADR LDM and STM arm instructions ... in taicpu.spilling_get_operation_type method		2025-04-03 11:58:59 +00:00
..
aasmcpu.pas	Handle ADR LDM and STM arm instructions	2025-04-03 11:58:59 +00:00
agarmgas.pas
agarmvasm.pas
aoptcpu.pas	* enclose {$define DEBUG_AOPTCPU} in {$ifdef EXTDEBUG}	2025-03-10 22:50:49 +01:00
aoptcpub.pas
aoptcpud.pas
armatt.inc
armatts.inc
armins.dat
armnop.inc
armop.inc
armreg.dat
armtab.inc
cgcpu.pas	* make use of not_zero in tbasecgarm.a_bit_scan_reg_reg	2025-02-12 23:02:03 +01:00
cpubase.pas
cpuelf.pas
cpuinfo.pas	* ARMv7A / A64: Constant writes to memory merged to larger forms where possible	2024-11-03 15:02:51 +00:00
cpunode.pas
cpupara.pas
cpupi.pas
cputarg.pas
hlcgcpu.pas
itcpugas.pas
narmadd.pas
narmcal.pas
narmcnv.pas
narmcon.pas
narminl.pas
narmld.pas
narmmat.pas
narmmem.pas
narmset.pas
narmutil.pas	* tai_eabi_attribute -> tai_attribute so it can be used by other architectures	2024-12-30 15:56:24 +01:00
pp.lpi.template
raarm.pas
raarmgas.pas
rarmcon.inc
rarmdwa.inc
rarmnor.inc
rarmnum.inc
rarmrni.inc
rarmsri.inc
rarmsta.inc
rarmstd.inc
rarmsup.inc
rgcpu.pas
symcpu.pas
tripletcpu.pas