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	* ppc get/freeintparaloc now check whether the parameter regs are
    properly allocated/deallocated (and get an extra list para)
  * ppc a_call_* now internalerrors if pi_do_call is not yet set
  * fixed lot of missing pi_do_call's
		
	
			
		
			
				
	
	
		
			281 lines
		
	
	
		
			10 KiB
		
	
	
	
		
			ObjectPascal
		
	
	
	
	
	
			
		
		
	
	
			281 lines
		
	
	
		
			10 KiB
		
	
	
	
		
			ObjectPascal
		
	
	
	
	
	
{
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    $Id$
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    Copyright (c) 1998-2002 by Florian Klaempfl
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    Generate 680x0 assembler for math nodes
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    This program is free software; you can redistribute it and/or modify
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    it under the terms of the GNU General Public License as published by
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    the Free Software Foundation; either version 2 of the License, or
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    (at your option) any later version.
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    This program is distributed in the hope that it will be useful,
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    but WITHOUT ANY WARRANTY; without even the implied warranty of
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    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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    GNU General Public License for more details.
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    You should have received a copy of the GNU General Public License
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    along with this program; if not, write to the Free Software
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    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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 ****************************************************************************
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}
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unit n68kmat;
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{$i fpcdefs.inc}
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interface
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    uses
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      node,nmat,ncgmat,cpubase,cginfo;
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    type
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      tm68knotnode = class(tnotnode)
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         procedure pass_2;override;
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      end;
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      tm68kmoddivnode = class(tcgmoddivnode)
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         procedure emit_div_reg_reg(signed: boolean;denum,num : tregister);override;
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         procedure emit_mod_reg_reg(signed: boolean;denum,num : tregister);override;
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      end;  
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implementation
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    uses
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      globtype,systems,
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      cutils,verbose,globals,
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      symconst,symdef,aasmbase,aasmtai,aasmcpu,
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      cgbase,pass_1,pass_2,
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      ncon,
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      cpuinfo,paramgr,defutil,
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      tgobj,ncgutil,cgobj,rgobj,rgcpu,cgcpu,cg64f32;
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{*****************************************************************************
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                               TM68KNOTNODE
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*****************************************************************************}
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    procedure tm68knotnode.pass_2;
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      var
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         hl : tasmlabel;
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         opsize : tcgsize;
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      begin
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         opsize:=def_cgsize(resulttype.def);
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         if is_boolean(resulttype.def) then
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          begin
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            { the second pass could change the location of left }
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            { if it is a register variable, so we've to do      }
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            { this before the case statement                    }
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            if left.location.loc<>LOC_JUMP then
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             secondpass(left);
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            case left.location.loc of
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              LOC_JUMP :
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                begin
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                  location_reset(location,LOC_JUMP,OS_NO);
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                  hl:=truelabel;
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                  truelabel:=falselabel;
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                  falselabel:=hl;
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                  secondpass(left);
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                  maketojumpbool(exprasmlist,left,lr_load_regvars);
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                  hl:=truelabel;
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                  truelabel:=falselabel;
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                  falselabel:=hl;
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                end;
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              LOC_FLAGS :
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                begin
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                  location_copy(location,left.location);
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                  location_release(exprasmlist,left.location);
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                  inverse_flags(location.resflags);
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                end;
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              LOC_CONSTANT,
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              LOC_REGISTER,
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              LOC_CREGISTER,
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              LOC_REFERENCE,
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              LOC_CREFERENCE :
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                begin
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                  location_force_reg(exprasmlist,left.location,def_cgsize(resulttype.def),true);
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                  exprasmlist.concat(taicpu.op_reg(A_TST,tcgsize2opsize[opsize],left.location.register));
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                  location_release(exprasmlist,left.location);
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                  location_reset(location,LOC_FLAGS,OS_NO);
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                  location.resflags:=F_E;
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                end;
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             else
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                internalerror(200203224);
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            end;
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          end
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         else if is_64bitint(left.resulttype.def) then
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           begin
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              secondpass(left);
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              location_copy(location,left.location);
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              location_force_reg(exprasmlist,location,OS_64,false);
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              cg64.a_op64_loc_reg(exprasmlist,OP_NOT,location,
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                joinreg64(location.registerlow,location.registerhigh));
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           end
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         else
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          begin
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             secondpass(left);
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             location_force_reg(exprasmlist,left.location,def_cgsize(left.resulttype.def),false);
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             location_copy(location,left.location);
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             if location.loc=LOC_CREGISTER then
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              location.register := rg.getregisterint(exprasmlist,opsize);
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             { perform the NOT operation }
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             cg.a_op_reg_reg(exprasmlist,OP_NOT,opsize,location.register,left.location.register);
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          end;
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      end;
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{*****************************************************************************
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                               TM68KMODDIVNODE
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*****************************************************************************}
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  procedure tm68kmoddivnode.emit_div_reg_reg(signed: boolean;denum,num : tregister);
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   var
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     continuelabel : tasmlabel;  
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     reg_d0,reg_d1 : tregister;
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   begin
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     { no RTL call, so inline a zero denominator verification }   
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     if aktoptprocessor <> MC68000 then
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       begin 
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         { verify if denominator is zero }
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         objectlibrary.getlabel(continuelabel);
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         { compare against zero, if not zero continue }
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         cg.a_cmp_const_reg_label(exprasmlist,OS_S32,OC_NE,0,denum,continuelabel);
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         cg.a_param_const(exprasmlist, OS_S32,200,paramanager.getintparaloc(exprasmlist,1));
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         cg.a_call_name(exprasmlist,'FPC_HANDLEERROR');
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         paramanager.freeintparaloc(exprasmlist,1);
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         cg.a_label(exprasmlist, continuelabel);
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         if signed then 
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            exprasmlist.concat(taicpu.op_reg_reg(A_DIVS,S_L,denum,num))
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         else
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            exprasmlist.concat(taicpu.op_reg_reg(A_DIVU,S_L,denum,num));
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         { result should be in denuminator }
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         cg.a_load_reg_reg(exprasmlist,OS_INT,OS_INT,num,denum);   
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       end
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     else
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       begin
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         { On MC68000/68010 mw must pass through RTL routines }
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         reg_d0:=rg.getexplicitregisterint(exprasmlist,NR_D0);
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         reg_d1:=rg.getexplicitregisterint(exprasmlist,NR_D1);
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         { put numerator in d0 }
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         cg.a_load_reg_reg(exprasmlist,OS_INT,OS_INT,num,reg_d0);   
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         { put denum in D1 }
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         cg.a_load_reg_reg(exprasmlist,OS_INT,OS_INT,denum,reg_d1);   
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         if signed then 
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             cg.a_call_name(exprasmlist,'FPC_DIV_LONGINT')
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         else
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             cg.a_call_name(exprasmlist,'FPC_DIV_CARDINAL');
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        cg.a_load_reg_reg(exprasmlist,OS_INT,OS_INT,reg_d0,denum);   
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        rg.ungetregisterint(exprasmlist,reg_d0);
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        rg.ungetregisterint(exprasmlist,reg_d1);
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       end;
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   end;
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  procedure tm68kmoddivnode.emit_mod_reg_reg(signed: boolean;denum,num : tregister);
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      var tmpreg : tregister;
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          continuelabel : tasmlabel;  
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          signlabel : tasmlabel;
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          reg_d0,reg_d1 : tregister;
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    begin
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     { no RTL call, so inline a zero denominator verification }   
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     if aktoptprocessor <> MC68000 then
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       begin 
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         { verify if denominator is zero }
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         objectlibrary.getlabel(continuelabel);
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         { compare against zero, if not zero continue }
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         cg.a_cmp_const_reg_label(exprasmlist,OS_S32,OC_NE,0,denum,continuelabel);
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         cg.a_param_const(exprasmlist, OS_S32,200,paramanager.getintparaloc(exprasmlist,1));
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         cg.a_call_name(exprasmlist,'FPC_HANDLEERROR');
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         paramanager.freeintparaloc(exprasmlist,1);
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         cg.a_label(exprasmlist, continuelabel);
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         tmpreg := cg.get_scratch_reg_int(exprasmlist,OS_INT);
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         { we have to prepare the high register with the  }
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         { correct sign. i.e we clear it, check if the low dword reg }
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         { which will participate in the division is signed, if so we}
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         { we extend the sign to the high doword register by inverting }
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         { all the bits.                                             }
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         exprasmlist.concat(taicpu.op_reg(A_CLR,S_L,tmpreg));
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         objectlibrary.getlabel(signlabel);
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         exprasmlist.concat(taicpu.op_reg(A_TST,S_L,tmpreg));
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         cg.a_cmp_const_reg_label(exprasmlist,OS_S32,OC_A,0,tmpreg,signlabel);
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         { its a negative value, therefore change sign }
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         cg.a_label(exprasmlist,signlabel);
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         { tmpreg:num / denum }
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         if signed then
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           exprasmlist.concat(taicpu.op_reg_reg_reg(A_DIVSL,S_L,denum,tmpreg,num))
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         else
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           exprasmlist.concat(taicpu.op_reg_reg_reg(A_DIVUL,S_L,denum,tmpreg,num));
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         { remainder in tmpreg }
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         cg.a_load_reg_reg(exprasmlist,OS_INT,OS_INT,tmpreg,denum);
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         cg.free_scratch_reg(exprasmlist,tmpreg);   
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       end
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     else
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       begin
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         { On MC68000/68010 mw must pass through RTL routines }
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         Reg_d0:=rg.getexplicitregisterint(exprasmlist,NR_D0);
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         Reg_d1:=rg.getexplicitregisterint(exprasmlist,NR_D1);
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         { put numerator in d0 }
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         cg.a_load_reg_reg(exprasmlist,OS_INT,OS_INT,num,Reg_D0);   
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         { put denum in D1 }
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         cg.a_load_reg_reg(exprasmlist,OS_INT,OS_INT,denum,Reg_D1);   
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         if signed then 
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             cg.a_call_name(exprasmlist,'FPC_MOD_LONGINT')
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         else
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             cg.a_call_name(exprasmlist,'FPC_MOD_CARDINAL');
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        cg.a_load_reg_reg(exprasmlist,OS_INT,OS_INT,Reg_D0,denum);   
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        rg.ungetregisterint(exprasmlist,Reg_D0);
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        rg.ungetregisterint(exprasmlist,Reg_D1);
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       end;
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    end;
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begin
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   cnotnode:=tm68knotnode;
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   cmoddivnode:=tm68kmoddivnode;
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end.
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{
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  $Log$
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  Revision 1.7  2003-06-07 18:57:04  jonas
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    + added freeintparaloc
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    * ppc get/freeintparaloc now check whether the parameter regs are
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      properly allocated/deallocated (and get an extra list para)
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    * ppc a_call_* now internalerrors if pi_do_call is not yet set
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    * fixed lot of missing pi_do_call's
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  Revision 1.6  2003/02/19 22:00:16  daniel
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    * Code generator converted to new register notation
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    - Horribily outdated todo.txt removed
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  Revision 1.5  2003/02/02 19:25:54  carl
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    * Several bugfixes for m68k target (register alloc., opcode emission)
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    + VIS target
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    + Generic add more complete (still not verified)
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  Revision 1.4  2002/09/07 15:25:13  peter
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    * old logs removed and tabs fixed
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  Revision 1.3  2002/08/15 15:15:55  carl
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    * jmpbuf size allocation for exceptions is now cpu specific (as it should)
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    * more generic nodes for maths
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    * several fixes for better m68k support
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  Revision 1.2  2002/08/15 08:13:54  carl
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    - a_load_sym_ofs_reg removed
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    * loadvmt now calls loadaddr_ref_reg instead
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  Revision 1.1  2002/08/14 19:16:34  carl
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    + m68k type conversion nodes
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    + started some mathematical nodes
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    * out of bound references should now be handled correctly
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}
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