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644 lines
22 KiB
ObjectPascal
644 lines
22 KiB
ObjectPascal
{
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Copyright (c) 1998-2002 by the Free Pascal dev. team
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Contains the base types for the virtual instruction set
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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{ This Unit contains the base types for the Virtual Instruction machine
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}
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unit cpubase;
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{$i fpcdefs.inc}
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interface
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uses
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strings,cutils,cclasses,aasmbase,cpuinfo,cginfo;
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{*****************************************************************************
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Assembler Opcodes
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*****************************************************************************}
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type
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TAsmOp=(a_none,a_beqs,a_bges,a_bgts,a_bles,a_blts,a_bnes,
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a_bras,a_rets,a_bccs,a_bcss,a_bvcs,a_bvss,a_bbss,
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a_bass,a_bats,a_bbts,a_beql,a_bgel,a_bgtl,a_blel,
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a_bltl,a_bnel,a_bral,a_bsrl,a_bbsl,a_basl,a_batl,
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a_bbtl,a_add,a_addc,a_and,a_asr,a_lsl,a_lsr,a_cmp,
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a_sub,a_subb,a_divs,a_divu,a_mod,a_move,a_muls,a_mulu,
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a_neg,a_not,a_or,a_xor,a_fadd,a_fcmp,a_fdiv,a_fmove,
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a_fmul,a_fneg,a_fsub,a_fldd,a_flds,a_lbzx,a_lbsx,a_llsx,
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a_llzx,a_lwsx,a_lwzx,a_fstd,a_fsts,a_stb,a_stl,a_stw,
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a_syscall,a_nop,a_lims,a_orhi,a_lilo,a_call,a_popl,
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a_pushl,
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{ these are simplified mnemonics }
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a_lea,a_limm,a_bxx
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);
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{# This should define the array of instructions as string }
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op2strtable=array[tasmop] of string[8];
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Const
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{# First value of opcode enumeration }
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firstop = low(tasmop);
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{# Last value of opcode enumeration }
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lastop = high(tasmop);
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{*****************************************************************************
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Registers
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*****************************************************************************}
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type
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toldregister = (R_NO,R_R0,R_R1,R_R2,R_R3,
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R_R4,R_R5,R_R6,R_R7,
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R_R8,R_R9,R_R10,R_R11,
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R_CCR,R_SP,R_FP,R_PC,
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R_FP0,R_FP1,R_FP2,R_FP3,
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R_FP4,R_FP5,R_FP6,R_FP7,
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R_FP8,R_FP9,R_FP10,R_FP11,
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R_FP12,R_FP13,R_FP14,R_FP15,
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R_INTREGISTER,R_FPUREGISTER
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);
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{# Set type definition for registers }
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tregisterset = set of Toldregister;
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Tnewregister=word;
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tregister=record
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enum:toldregister;
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number:Tnewregister;
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end;
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{ A type to store register locations for 64 Bit values. }
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tregister64 = packed record
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reglo,reghi : tregister;
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end;
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Tsuperregister=byte;
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Tsubregister=byte;
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Tsupregset=set of Tsuperregister;
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{ alias for compact code }
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treg64 = tregister64;
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{# Type definition for the array of string of register nnames }
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treg2strtable = array[toldregister] of string[5];
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Const
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{Special registers:}
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NR_NO = $0000; {Invalid register}
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{Normal registers:}
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{General purpose registers:}
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NR_R0 = $0100; NR_R1 = $0200; NR_R2 = $0300;
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NR_R3 = $0400; NR_R4 = $0500; NR_R5 = $0600;
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NR_R6 = $0700; NR_R7 = $0800; NR_R8 = $0900;
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NR_R9 = $0A00; NR_R10 = $0B00; NR_R11 = $0C00;
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NR_SP = $0D00; NR_FP = $0E00;
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{Super registers:}
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RS_R0 = $01; RS_R1 = $02; RS_R2 = $03;
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RS_R3 = $04; RS_R4 = $05; RS_R5 = $06;
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RS_R6 = $07; RS_R7 = $08; RS_R8 = $09;
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RS_R9 = $0A; RS_R10 = $0B; RS_R11 = $0C;
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RS_SP = $0D; RS_FP = $0E;
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{Subregisters:}
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R_SUBL = $00;
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R_SUBW = $01;
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R_SUBD = $02;
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{# First register in the tregister enumeration }
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firstreg = low(toldregister);
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{# Last register in the tregister enumeration }
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lastreg = high(toldregister);
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first_supreg = $01;
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last_supreg = $0c;
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std_reg2str : treg2strtable = ('',
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'r0','r1','r2','r3','r4','r5','r6','r7','r8','r9','r10','r11','ccr',
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'sp','fp','pc','fp0','fp1','fp2','fp3','fp4','fp5','fp6','fp7',
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'fp8','fp9','fp10','fp11','fp12','fp13','fp14','fp15','',''
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);
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{*****************************************************************************
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Conditions
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*****************************************************************************}
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type
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TAsmCond=(C_None,
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C_EQ, { equal }
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C_NE, { not equal }
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C_GE, { greater or equal (signed) }
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C_GT, { greater than (signed) }
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C_LE, { less or equal (signed) }
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C_LT, { less than (signed) }
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C_LS, { lower or same (unordered) }
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C_AS, { above or same (unordered) }
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C_AT, { above than (unordered) }
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C_BT, { below than (unordered) }
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C_CC, { carry clear }
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C_CS { carry set }
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);
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const
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cond2str:array[TAsmCond] of string[3]=('',
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'eq','ne','ge','gt','le','lt','ls','as',
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'at','bt','cc','cs');
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{*****************************************************************************
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Flags
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*****************************************************************************}
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type
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TResFlags = (
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F_E, { zero flag = equal }
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F_NE, { !zero_flag = not equal }
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F_G, { greater (signed) }
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F_L, { less (signed) }
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F_GE,
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F_LE,
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F_C, { carry flag }
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F_NC, { !carry flag }
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F_A, { greater (unsigned) }
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F_AE,
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F_B, { less (unsigned) }
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F_BE
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);
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{*****************************************************************************
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Reference
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*****************************************************************************}
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type
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trefoptions=(ref_none,ref_parafixup,ref_localfixup,ref_selffixup);
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{ reference record }
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preference = ^treference;
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treference = packed record
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base,
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index : tregister;
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offset : longint;
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symbol : tasmsymbol;
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offsetfixup : longint;
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options : trefoptions;
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alignment : byte;
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end;
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{ reference record }
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pparareference = ^tparareference;
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tparareference = packed record
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index : tregister;
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offset : aword;
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end;
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{*****************************************************************************
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Operand
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*****************************************************************************}
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type
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toptype=(top_none,top_reg,top_ref,top_const,top_symbol,top_bool);
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toper=record
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ot : longint;
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case typ : toptype of
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top_none : ();
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top_reg : (reg:tregister);
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top_ref : (ref:^treference);
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top_const : (val:aword);
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top_symbol : (sym:tasmsymbol;symofs:longint);
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top_bool : (b: boolean);
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end;
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{*****************************************************************************
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Operand Sizes
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*****************************************************************************}
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{ S_NO = No Size of operand }
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{ S_B = 8-bit size operand }
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{ S_W = 16-bit size operand }
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{ S_L = 32-bit size operand }
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{ Floating point types }
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{ S_FS = single type (32 bit) }
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{ S_FD = double/64bit integer }
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{ S_FX = Extended type }
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topsize = (S_NO,S_B,S_W,S_L,S_FS,S_FD,S_FX,S_IQ);
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{*****************************************************************************
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Generic Location
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*****************************************************************************}
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type
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TLoc=(
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{ added for tracking problems}
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LOC_INVALID,
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{ ordinal constant }
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LOC_CONSTANT,
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{ in a processor register }
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LOC_REGISTER,
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{ Constant register which shouldn't be modified }
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LOC_CREGISTER,
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{ FPU register}
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LOC_FPUREGISTER,
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{ Constant FPU register which shouldn't be modified }
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LOC_CFPUREGISTER,
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{ multimedia register }
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LOC_MMREGISTER,
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{ Constant multimedia reg which shouldn't be modified }
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LOC_CMMREGISTER,
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{ in memory }
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LOC_REFERENCE,
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{ in memory (constant) }
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LOC_CREFERENCE,
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{ boolean results only, jump to false or true label }
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LOC_JUMP,
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{ boolean results only, flags are set }
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LOC_FLAGS
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);
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{ tparamlocation describes where a parameter for a procedure is stored.
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References are given from the caller's point of view. The usual
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TLocation isn't used, because contains a lot of unnessary fields.
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}
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tparalocation = packed record
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size : TCGSize;
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{ The location type where the parameter is passed, usually
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LOC_REFERENCE,LOC_REGISTER or LOC_FPUREGISTER
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}
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loc : TLoc;
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{ The stack pointer must be decreased by this value before
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the parameter is copied to the given destination.
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This allows to "encode" pushes with tparalocation.
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On the PowerPC, this field is unsed but it is there
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because several generic code accesses it.
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}
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sp_fixup : longint;
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case TLoc of
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LOC_REFERENCE : (reference : tparareference);
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LOC_FPUREGISTER, LOC_CFPUREGISTER, LOC_MMREGISTER, LOC_CMMREGISTER,
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LOC_REGISTER,LOC_CREGISTER : (
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case longint of
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1 : (register,register64.reghi : tregister);
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{ overlay a register64.reglo }
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2 : (register64.reglo : tregister);
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{ overlay a 64 Bit register type }
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3 : (reg64 : tregister64);
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4 : (register64 : tregister64);
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);
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end;
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treglocation = packed record
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case longint of
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1 : (register,register64.reghi : tregister);
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{ overlay a register64.reglo }
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2 : (register64.reglo : tregister);
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{ overlay a 64 Bit register type }
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3 : (reg64 : tregister64);
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4 : (register64 : tregister64);
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end;
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tlocation = packed record
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size : TCGSize;
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loc : tloc;
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case tloc of
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LOC_CREFERENCE,LOC_REFERENCE : (reference : treference);
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LOC_CONSTANT : (
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case longint of
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1 : (value : AWord);
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{ can't do this, this layout depends on the host cpu. Use }
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{ lo(valueqword)/hi(valueqword) instead (JM) }
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{ 2 : (valuelow, valuehigh:AWord); }
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{ overlay a complete 64 Bit value }
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3 : (valueqword : qword);
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);
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LOC_FPUREGISTER, LOC_CFPUREGISTER, LOC_MMREGISTER, LOC_CMMREGISTER,
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LOC_REGISTER,LOC_CREGISTER : (
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case longint of
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1 : (register64.reglo,register64.reghi : tregister);
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2 : (register : tregister);
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{ overlay a 64 Bit register type }
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3 : (reg64 : tregister64);
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4 : (register64 : tregister64);
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);
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LOC_FLAGS : (resflags : tresflags);
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end;
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{*****************************************************************************
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Constants
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*****************************************************************************}
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const
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max_operands = 2;
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lvaluelocations = [LOC_REFERENCE, LOC_CREGISTER, LOC_CFPUREGISTER,
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LOC_CMMREGISTER];
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{# Constant defining possibly all registers which might require saving }
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ALL_REGISTERS = [R_FP0..R_FP15];
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general_registers = [R_R0..R_R11];
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{# low and high of the available maximum width integer general purpose }
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{ registers }
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LoGPReg = R_R0;
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HiGPReg = R_R11;
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{# low and high of every possible width general purpose register (same as }
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{ above on most architctures apart from the 80x86) }
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LoReg = R_R0;
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HiReg = R_R11;
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{# Table of registers which can be allocated by the code generator
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internally, when generating the code.
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}
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{ legend: }
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{ xxxregs = set of all possibly used registers of that type in the code }
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{ generator }
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{ usableregsxxx = set of all 32bit components of registers that can be }
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{ possible allocated to a regvar or using getregisterxxx (this }
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{ excludes registers which can be only used for parameter }
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{ passing on ABI's that define this) }
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{ c_countusableregsxxx = amount of registers in the usableregsxxx set }
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maxintregs = 12;
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intregs = [R_R0..R_R11];
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usableregsint = [R_R2..R_R11];
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c_countusableregsint = 18;
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maxfpuregs = 16;
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fpuregs = [R_FP0..R_FP15];
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usableregsfpu = [R_FP1..R_FP15];
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c_countusableregsfpu = 15;
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mmregs = [];
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usableregsmm = [];
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c_countusableregsmm = 0;
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{ no distinction on this platform }
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maxaddrregs = 0;
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addrregs = [];
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usableregsaddr = [];
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c_countusableregsaddr = 0;
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firstsaveintreg = R_R2;
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lastsaveintreg = R_R11;
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firstsavefpureg = R_FP1;
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lastsavefpureg = R_FP15;
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firstsavemmreg = R_NO;
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lastsavemmreg = R_NO;
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maxvarregs = 10;
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varregs : Array [1..maxvarregs] of toldregister =
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(R_R2,R_R3,R_R4,R_R5,R_R6,R_R7,R_R8,R_R9,R_R10,R_R11);
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maxfpuvarregs = 15;
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fpuvarregs : Array [1..maxfpuvarregs] of toldregister =
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(R_FP1,R_FP2,R_FP3,
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R_FP4,R_FP5,R_FP6,
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R_FP7,R_FP8,R_FP9,
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R_FP10,R_FP11,R_FP12,
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R_FP13,R_FP14,R_FP15);
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max_param_regs_int = 0;
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max_param_regs_fpu = 0;
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max_param_regs_mm = 0;
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{# Registers which are defined as scratch and no need to save across
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routine calls or in assembler blocks.
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}
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max_scratch_regs = 2;
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scratch_regs: Array[1..max_scratch_regs] of Tsuperregister = (RS_R0,RS_R1);
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{*****************************************************************************
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Default generic sizes
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*****************************************************************************}
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{# Defines the default address size for a processor, }
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OS_ADDR = OS_32;
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{# the natural int size for a processor, }
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OS_INT = OS_32;
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{# the maximum float size for a processor, }
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OS_FLOAT = OS_F64;
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{# the size of a vector register for a processor }
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OS_VECTOR = OS_NO;
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{*****************************************************************************
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GDB Information
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*****************************************************************************}
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{# Register indexes for stabs information, when some
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parameters or variables are stored in registers.
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Currently unsupported by abstract machine
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}
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stab_regindex : array[toldregister] of shortint =
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(-1,
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{ r0..r11 }
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-1,-1,-1,-1,-1,-1,
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-1,-1,-1,-1,-1,-1,
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{ sp,fp,ccr,pc }
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-1,-1,-1,-1,
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{ FP0..FP7 }
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-1,-1,-1,-1,-1,-1,-1,-1,
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{ FP8..FP15 }
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-1,-1,-1,-1,-1,-1,-1,-1,
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{ invalid }
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-1,-1
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);
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{*****************************************************************************
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Generic Register names
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*****************************************************************************}
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{# Stack pointer register }
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stack_pointer_reg = R_SP;
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NR_STACK_POINTER_REG = NR_SP;
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RS_STACK_POINTER_REG = RS_SP;
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{# Frame pointer register }
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frame_pointer_reg = R_FP;
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NR_FRAME_POINTER_REG = NR_FP;
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RS_FRAME_POINTER_REG = RS_FP;
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{# Self pointer register : contains the instance address of an
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object or class. }
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self_pointer_reg = R_R11;
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NR_SELF_POINTER_REG = NR_R11;
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RS_SELF_POINTER_REG = RS_R11;
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{# Register for addressing absolute data in a position independant way,
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such as in PIC code. The exact meaning is ABI specific.
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}
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pic_offset_reg = R_R10;
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{# Results are returned in this register (32-bit values) }
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accumulator = R_R0;
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NR_ACCUMULATOR = NR_R0;
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RS_ACCUMULATOR = RS_R0;
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{the return_result_reg, is used inside the called function to store its return
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value when that is a scalar value otherwise a pointer to the address of the
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result is placed inside it}
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return_result_reg = accumulator;
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{the function_result_reg contains the function result after a call to a scalar
|
|
function othewise it contains a pointer to the returned result}
|
|
function_result_reg = accumulator;
|
|
{# Hi-Results are returned in this register (64-bit value high register) }
|
|
accumulatorhigh = R_R1;
|
|
NR_ACCUMULATORHIGH = NR_R1;
|
|
RS_ACCUMULATORHIGH = RS_R1;
|
|
fpu_result_reg = R_FP0;
|
|
mmresultreg = R_NO;
|
|
|
|
{*****************************************************************************
|
|
GCC /ABI linking information
|
|
*****************************************************************************}
|
|
|
|
{# Registers which must be saved when calling a routine declared as
|
|
cppdecl, cdecl, stdcall, safecall, palmossyscall. The registers
|
|
saved should be the ones as defined in the target ABI and / or GCC.
|
|
|
|
This value can be deduced from CALLED_USED_REGISTERS array in the
|
|
GCC source.
|
|
}
|
|
std_saved_registers = [RS_R0,RS_R1,RS_R10,RS_R11];
|
|
{# Required parameter alignment when calling a routine declared as
|
|
stdcall and cdecl. The alignment value should be the one defined
|
|
by GCC or the target ABI.
|
|
|
|
The value of this constant is equal to the constant
|
|
PARM_BOUNDARY / BITS_PER_UNIT in the GCC source.
|
|
}
|
|
std_param_align = 4; { for 32-bit version only }
|
|
|
|
|
|
{*****************************************************************************
|
|
Helpers
|
|
*****************************************************************************}
|
|
|
|
function is_calljmp(o:tasmop):boolean;
|
|
|
|
procedure inverse_flags(var r : TResFlags);
|
|
function flags_to_cond(const f: TResFlags) : TAsmCond;
|
|
procedure convert_register_to_enum(var r:Tregister);
|
|
function cgsize2subreg(s:Tcgsize):Tsubregister;
|
|
|
|
|
|
implementation
|
|
|
|
uses
|
|
verbose;
|
|
|
|
{*****************************************************************************
|
|
Helpers
|
|
*****************************************************************************}
|
|
|
|
function is_calljmp(o:tasmop):boolean;
|
|
begin
|
|
is_calljmp := false;
|
|
if o in [a_bxx,a_call,a_beqs..a_bbtl] then
|
|
is_calljmp := true;
|
|
end;
|
|
|
|
procedure inverse_flags(var r: TResFlags);
|
|
const flagsinvers : array[F_E..F_BE] of tresflags =
|
|
(F_NE,F_E,
|
|
F_LE,F_GE,
|
|
F_L,F_G,
|
|
F_NC,F_C,
|
|
F_BE,F_B,
|
|
F_AE,F_A);
|
|
begin
|
|
r:=flagsinvers[r];
|
|
end;
|
|
|
|
|
|
|
|
function flags_to_cond(const f: TResFlags) : TAsmCond;
|
|
const flags2cond : array[tresflags] of tasmcond =
|
|
(
|
|
{F_E} C_EQ,
|
|
{F_NE} C_NE,
|
|
{F_G } C_GT,
|
|
{F_L } C_LT,
|
|
{F_GE} C_GE,
|
|
{F_LE} C_LE,
|
|
{F_C} C_CS,
|
|
{F_NC} C_CC,
|
|
{F_A} C_AT,
|
|
{F_AE} C_AS,
|
|
{F_B} C_BT,
|
|
{F_BE} C_LS);
|
|
begin
|
|
flags_to_cond := flags2cond[f];
|
|
end;
|
|
|
|
|
|
procedure convert_register_to_enum(var r:Tregister);
|
|
|
|
begin
|
|
if r.enum = R_INTREGISTER then
|
|
case r.number of
|
|
NR_NO: r.enum:= R_NO;
|
|
NR_R0: r.enum:= R_R0;
|
|
NR_R1: r.enum:= R_R1;
|
|
NR_R2: r.enum:= R_R2;
|
|
NR_R3: r.enum:= R_R3;
|
|
NR_R4: r.enum:= R_R4;
|
|
NR_R5: r.enum:= R_R5;
|
|
NR_R6: r.enum:= R_R6;
|
|
NR_R7: r.enum:= R_R7;
|
|
NR_R8: r.enum:= R_R8;
|
|
NR_R9: r.enum:= R_R9;
|
|
NR_R10: r.enum:= R_R10;
|
|
NR_R11: r.enum:= R_R11;
|
|
else
|
|
internalerror(200301082);
|
|
end;
|
|
end;
|
|
|
|
function cgsize2subreg(s:Tcgsize):Tsubregister;
|
|
|
|
begin
|
|
case s of
|
|
OS_8,OS_S8:
|
|
cgsize2subreg:=R_SUBL;
|
|
OS_16,OS_S16:
|
|
cgsize2subreg:=R_SUBW;
|
|
OS_32,OS_S32:
|
|
cgsize2subreg:=R_SUBD;
|
|
else
|
|
internalerror(200301231);
|
|
end;
|
|
end;
|
|
|
|
|
|
end.
|