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515774b864
-- Zusammenführen der Unterschiede zwischen Projektarchiv-URLs in ».«: U rtl/arm/setjump.inc A rtl/arm/thumb2.inc U rtl/arm/divide.inc A rtl/embedded/arm/stm32f103.pp U rtl/inc/system.inc U compiler/alpha/cgcpu.pas U compiler/sparc/cgcpu.pas U compiler/i386/cgcpu.pas U compiler/ncgld.pas U compiler/powerpc/cgcpu.pas U compiler/avr/cgcpu.pas U compiler/aggas.pas U compiler/powerpc64/cgcpu.pas U compiler/x86_64/cgcpu.pas U compiler/cgobj.pas U compiler/psystem.pas U compiler/aasmtai.pas U compiler/m68k/cgcpu.pas U compiler/ncgutil.pas U compiler/rautils.pas U compiler/arm/raarmgas.pas U compiler/arm/armatts.inc U compiler/arm/cgcpu.pas U compiler/arm/armins.dat U compiler/arm/rgcpu.pas U compiler/arm/cpubase.pas U compiler/arm/agarmgas.pas U compiler/arm/cpuinfo.pas U compiler/arm/armop.inc U compiler/arm/narmadd.pas U compiler/arm/aoptcpu.pas U compiler/arm/armatt.inc U compiler/arm/aasmcpu.pas U compiler/systems/t_embed.pas U compiler/psub.pas U compiler/options.pas git-svn-id: trunk@13801 -
841 lines
32 KiB
ObjectPascal
841 lines
32 KiB
ObjectPascal
{
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Copyright (c) 2008 by Florian Klaempfl
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Member of the Free Pascal development team
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This unit implements the code generator for the AVR
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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unit cgcpu;
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{$i fpcdefs.inc}
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interface
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uses
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globtype,symtype,symdef,
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cgbase,cgutils,cgobj,
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aasmbase,aasmcpu,aasmtai,aasmdata,
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parabase,
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cpubase,cpuinfo,node,cg64f32,rgcpu;
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type
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tcgavr = class(tcg)
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{ true, if the next arithmetic operation should modify the flags }
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cgsetflags : boolean;
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procedure init_register_allocators;override;
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procedure done_register_allocators;override;
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procedure a_param_const(list : TAsmList;size : tcgsize;a : aint;const paraloc : TCGPara);override;
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procedure a_param_ref(list : TAsmList;size : tcgsize;const r : treference;const paraloc : TCGPara);override;
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procedure a_paramaddr_ref(list : TAsmList;const r : treference;const paraloc : TCGPara);override;
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procedure a_call_name(list : TAsmList;const s : string; weak: boolean);override;
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procedure a_call_reg(list : TAsmList;reg: tregister);override;
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procedure a_call_ref(list : TAsmList;ref: treference);override;
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procedure a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: aint; reg: TRegister); override;
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procedure a_op_reg_reg(list : TAsmList; Op: TOpCG; size: TCGSize; src, dst: TRegister); override;
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procedure a_op_const_reg_reg(list: TAsmList; op: TOpCg;
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size: tcgsize; a: aint; src, dst: tregister); override;
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procedure a_op_reg_reg_reg(list: TAsmList; op: TOpCg;
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size: tcgsize; src1, src2, dst: tregister); override;
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procedure a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister;setflags : boolean;var ovloc : tlocation);override;
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procedure a_op_reg_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation);override;
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{ move instructions }
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procedure a_load_const_reg(list : TAsmList; size: tcgsize; a : aint;reg : tregister);override;
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procedure a_load_reg_ref(list : TAsmList; fromsize, tosize: tcgsize; reg : tregister;const ref : treference);override;
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procedure a_load_ref_reg(list : TAsmList; fromsize, tosize : tcgsize;const Ref : treference;reg : tregister);override;
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procedure a_load_reg_reg(list : TAsmList; fromsize, tosize : tcgsize;reg1,reg2 : tregister);override;
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function a_internal_load_reg_ref(list : TAsmList; fromsize, tosize: tcgsize; reg : tregister;const ref : treference):treference;
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function a_internal_load_ref_reg(list : TAsmList; fromsize, tosize : tcgsize;const Ref : treference;reg : tregister):treference;
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{ comparison operations }
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procedure a_cmp_const_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;reg : tregister;
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l : tasmlabel);override;
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procedure a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); override;
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procedure a_jmp_name(list : TAsmList;const s : string); override;
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procedure a_jmp_always(list : TAsmList;l: tasmlabel); override;
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procedure a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel); override;
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procedure g_flags2reg(list: TAsmList; size: TCgSize; const f: TResFlags; reg: TRegister); override;
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procedure g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);override;
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procedure g_proc_exit(list : TAsmList;parasize : longint;nostackframe:boolean); override;
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procedure a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);override;
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procedure g_concatcopy(list : TAsmList;const source,dest : treference;len : aint);override;
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procedure g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : aint);override;
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procedure g_concatcopy_move(list : TAsmList;const source,dest : treference;len : aint);
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procedure g_concatcopy_internal(list : TAsmList;const source,dest : treference;len : aint;aligned : boolean);
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procedure g_overflowcheck(list: TAsmList; const l: tlocation; def: tdef); override;
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procedure g_overflowCheck_loc(List:TAsmList;const Loc:TLocation;def:TDef;ovloc : tlocation);override;
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// procedure g_save_registers(list : TAsmList);override;
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// procedure g_restore_registers(list : TAsmList);override;
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procedure a_jmp_cond(list : TAsmList;cond : TOpCmp;l: tasmlabel);
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procedure fixref(list : TAsmList;var ref : treference);
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function handle_load_store(list:TAsmList;op: tasmop;reg:tregister;ref: treference):treference;
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procedure g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);override;
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end;
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tcg64favr = class(tcg64f32)
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procedure a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);override;
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procedure a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;reg : tregister64);override;
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procedure a_op64_const_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64);override;
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procedure a_op64_reg_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);override;
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procedure a_op64_const_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);override;
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procedure a_op64_reg_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);override;
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end;
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procedure create_codegen;
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const
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OpCmp2AsmCond : Array[topcmp] of TAsmCond = (C_NONE,C_EQ,C_GT,
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C_LT,C_GE,C_LE,C_NE,C_LS,C_CC,C_CS,C_HI);
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implementation
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uses
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globals,verbose,systems,cutils,
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fmodule,
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symconst,symsym,
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tgobj,
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procinfo,cpupi,
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paramgr;
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procedure tcgavr.init_register_allocators;
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begin
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inherited init_register_allocators;
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{ currently, we save R14 always, so we can use it }
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rg[R_INTREGISTER]:=trgintcpu.create(R_INTREGISTER,R_SUBWHOLE,
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[RS_R0,RS_R1,RS_R2,RS_R3,RS_R4,RS_R5,RS_R6,RS_R7,RS_R8,
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RS_R9,RS_R10,RS_R12,RS_R14],first_int_imreg,[]);
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end;
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procedure tcgavr.done_register_allocators;
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begin
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rg[R_INTREGISTER].free;
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inherited done_register_allocators;
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end;
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procedure tcgavr.a_param_const(list : TAsmList;size : tcgsize;a : aint;const paraloc : TCGPara);
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var
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ref: treference;
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begin
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paraloc.check_simple_location;
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case paraloc.location^.loc of
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LOC_REGISTER,LOC_CREGISTER:
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a_load_const_reg(list,size,a,paraloc.location^.register);
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LOC_REFERENCE:
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begin
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reference_reset(ref,paraloc.alignment);
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ref.base:=paraloc.location^.reference.index;
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ref.offset:=paraloc.location^.reference.offset;
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a_load_const_ref(list,size,a,ref);
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end;
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else
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internalerror(2002081101);
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end;
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end;
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procedure tcgavr.a_param_ref(list : TAsmList;size : tcgsize;const r : treference;const paraloc : TCGPara);
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var
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tmpref, ref: treference;
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location: pcgparalocation;
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sizeleft: aint;
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begin
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location := paraloc.location;
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tmpref := r;
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sizeleft := paraloc.intsize;
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while assigned(location) do
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begin
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case location^.loc of
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LOC_REGISTER,LOC_CREGISTER:
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a_load_ref_reg(list,location^.size,location^.size,tmpref,location^.register);
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LOC_REFERENCE:
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begin
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reference_reset_base(ref,location^.reference.index,location^.reference.offset,paraloc.alignment);
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{ doubles in softemu mode have a strange order of registers and references }
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if location^.size=OS_32 then
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g_concatcopy(list,tmpref,ref,4)
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else
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begin
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g_concatcopy(list,tmpref,ref,sizeleft);
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if assigned(location^.next) then
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internalerror(2005010710);
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end;
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end;
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LOC_VOID:
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begin
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// nothing to do
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end;
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else
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internalerror(2002081103);
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end;
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inc(tmpref.offset,tcgsize2size[location^.size]);
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dec(sizeleft,tcgsize2size[location^.size]);
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location := location^.next;
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end;
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end;
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procedure tcgavr.a_paramaddr_ref(list : TAsmList;const r : treference;const paraloc : TCGPara);
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var
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ref: treference;
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tmpreg: tregister;
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begin
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paraloc.check_simple_location;
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case paraloc.location^.loc of
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LOC_REGISTER,LOC_CREGISTER:
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a_loadaddr_ref_reg(list,r,paraloc.location^.register);
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LOC_REFERENCE:
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begin
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reference_reset(ref,paraloc.alignment);
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ref.base := paraloc.location^.reference.index;
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ref.offset := paraloc.location^.reference.offset;
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tmpreg := getintregister(list,OS_ADDR);
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a_loadaddr_ref_reg(list,r,tmpreg);
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a_load_reg_ref(list,OS_ADDR,OS_ADDR,tmpreg,ref);
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end;
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else
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internalerror(2002080701);
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end;
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end;
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procedure tcgavr.a_call_name(list : TAsmList;const s : string; weak: boolean);
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begin
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list.concat(taicpu.op_sym(A_RCALL,current_asmdata.RefAsmSymbol(s)));
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{
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the compiler does not properly set this flag anymore in pass 1, and
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for now we only need it after pass 2 (I hope) (JM)
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if not(pi_do_call in current_procinfo.flags) then
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internalerror(2003060703);
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}
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include(current_procinfo.flags,pi_do_call);
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end;
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procedure tcgavr.a_call_reg(list : TAsmList;reg: tregister);
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begin
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a_reg_alloc(list,NR_ZLO);
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a_reg_alloc(list,NR_ZHI);
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list.concat(taicpu.op_reg_reg(A_MOV,NR_ZLO,reg));
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list.concat(taicpu.op_reg_reg(A_MOV,NR_ZHI,GetHigh(reg)));
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list.concat(taicpu.op_none(A_ICALL));
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a_reg_dealloc(list,NR_ZLO);
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a_reg_dealloc(list,NR_ZHI);
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include(current_procinfo.flags,pi_do_call);
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end;
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procedure tcgavr.a_call_ref(list : TAsmList;ref: treference);
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begin
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a_reg_alloc(list,NR_ZLO);
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a_reg_alloc(list,NR_ZHI);
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a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,NR_ZLO);
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list.concat(taicpu.op_none(A_ICALL));
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a_reg_dealloc(list,NR_ZLO);
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a_reg_dealloc(list,NR_ZHI);
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include(current_procinfo.flags,pi_do_call);
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end;
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procedure tcgavr.a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: aint; reg: TRegister);
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begin
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a_op_const_reg_reg(list,op,size,a,reg,reg);
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end;
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procedure tcgavr.a_op_reg_reg(list : TAsmList; Op: TOpCG; size: TCGSize; src, dst: TRegister);
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begin
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case op of
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OP_NEG:
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// !!!! list.concat(taicpu.op_reg_reg_const(A_RSB,dst,src,0));
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;
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OP_NOT:
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begin
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// !!!! list.concat(taicpu.op_reg_reg(A_MVN,dst,src));
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case size of
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OS_8 :
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;
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// !!!! a_op_const_reg_reg(list,OP_AND,OS_INT,$ff,dst,dst);
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OS_16 :
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// !!!! a_op_const_reg_reg(list,OP_AND,OS_INT,$ffff,dst,dst);
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;
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end;
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end
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else
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a_op_reg_reg_reg(list,op,size,src,dst,dst);
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end;
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end;
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procedure tcgavr.a_op_const_reg_reg(list: TAsmList; op: TOpCg;
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size: tcgsize; a: aint; src, dst: tregister);
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var
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ovloc : tlocation;
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begin
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a_op_const_reg_reg_checkoverflow(list,op,size,a,src,dst,false,ovloc);
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end;
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procedure tcgavr.a_op_reg_reg_reg(list: TAsmList; op: TOpCg;
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size: tcgsize; src1, src2, dst: tregister);
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var
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ovloc : tlocation;
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begin
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a_op_reg_reg_reg_checkoverflow(list,op,size,src1,src2,dst,false,ovloc);
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end;
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procedure tcgavr.a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister;setflags : boolean;var ovloc : tlocation);
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begin
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end;
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procedure tcgavr.a_op_reg_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation);
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var
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so : tshifterop;
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tmpreg,overflowreg : tregister;
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asmop : tasmop;
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begin
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ovloc.loc:=LOC_VOID;
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case op of
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OP_NEG,OP_NOT,
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OP_DIV,OP_IDIV:
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internalerror(200308281);
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OP_SHL:
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begin
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end;
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OP_SHR:
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begin
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end;
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OP_SAR:
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begin
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end;
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OP_IMUL,
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OP_MUL:
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begin
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end;
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end;
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end;
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procedure tcgavr.a_load_const_reg(list : TAsmList; size: tcgsize; a : aint;reg : tregister);
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begin
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if not(size in [OS_8,OS_S8,OS_16,OS_S16,OS_32,OS_S32]) then
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internalerror(2002090902);
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end;
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function tcgavr.handle_load_store(list:TAsmList;op: tasmop;reg:tregister;ref: treference):treference;
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begin
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end;
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procedure tcgavr.a_load_reg_ref(list : TAsmList; fromsize, tosize: tcgsize; reg : tregister;const ref : treference);
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begin
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end;
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procedure tcgarm.a_load_ref_reg(list : TAsmList; fromsize, tosize : tcgsize;const Ref : treference;reg : tregister);
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var
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oppostfix:toppostfix;
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usedtmpref: treference;
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tmpreg,tmpreg2 : tregister;
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so : tshifterop;
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dir : integer;
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begin
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if (TCGSize2Size[FromSize] >= TCGSize2Size[ToSize]) then
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FromSize := ToSize;
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case FromSize of
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{ signed integer registers }
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OS_8:
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oppostfix:=PF_B;
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OS_S8:
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oppostfix:=PF_SB;
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OS_16:
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oppostfix:=PF_H;
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OS_S16:
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oppostfix:=PF_SH;
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OS_32,
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OS_S32:
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oppostfix:=PF_None;
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else
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InternalError(200308297);
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end;
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handle_load_store(list,A_LDR,oppostfix,reg,ref);
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if (fromsize=OS_S8) and (tosize = OS_16) then
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a_load_reg_reg(list,OS_16,OS_32,reg,reg);
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end;
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procedure tcgavr.a_load_ref_reg(list : TAsmList; fromsize, tosize : tcgsize;const Ref : treference;reg : tregister);
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var
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href : treference;
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begin
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if (ref.base=R_NO) and (ref.index=R_NO) then
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end;
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function tcgavr.a_internal_load_reg_ref(list : TAsmList; fromsize, tosize: tcgsize; reg : tregister;const ref : treference):treference;
|
|
begin
|
|
end;
|
|
|
|
|
|
function tcgavr.a_internal_load_ref_reg(list : TAsmList; fromsize, tosize : tcgsize;const Ref : treference;reg : tregister):treference;
|
|
begin
|
|
end;
|
|
|
|
procedure tcgavr.a_load_reg_reg(list : TAsmList; fromsize, tosize : tcgsize;reg1,reg2 : tregister);
|
|
begin
|
|
end;
|
|
|
|
|
|
{ comparison operations }
|
|
procedure tcgavr.a_cmp_const_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;reg : tregister;
|
|
l : tasmlabel);
|
|
begin
|
|
end;
|
|
|
|
|
|
procedure tcgavr.a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel);
|
|
begin
|
|
end;
|
|
|
|
|
|
procedure tcgavr.a_jmp_name(list : TAsmList;const s : string);
|
|
begin
|
|
end;
|
|
|
|
|
|
procedure tcgavr.a_jmp_always(list : TAsmList;l: tasmlabel);
|
|
begin
|
|
end;
|
|
|
|
|
|
procedure tcgavr.a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel);
|
|
begin
|
|
end;
|
|
|
|
|
|
procedure tcgavr.g_flags2reg(list: TAsmList; size: TCgSize; const f: TResFlags; reg: TRegister);
|
|
begin
|
|
end;
|
|
|
|
|
|
procedure tcgavr.g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);
|
|
{
|
|
var
|
|
ref : treference;
|
|
shift : byte;
|
|
firstfloatreg,lastfloatreg,
|
|
r : byte;
|
|
regs : tcpuregisterset;
|
|
}
|
|
begin
|
|
{
|
|
LocalSize:=align(LocalSize,4);
|
|
if not(nostackframe) then
|
|
begin
|
|
firstfloatreg:=RS_NO;
|
|
{ save floating point registers? }
|
|
for r:=RS_F0 to RS_F7 do
|
|
if r in rg[R_FPUREGISTER].used_in_proc-paramanager.get_volatile_registers_fpu(pocall_stdcall) then
|
|
begin
|
|
if firstfloatreg=RS_NO then
|
|
firstfloatreg:=r;
|
|
lastfloatreg:=r;
|
|
end;
|
|
a_reg_alloc(list,NR_STACK_POINTER_REG);
|
|
if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
|
|
begin
|
|
a_reg_alloc(list,NR_FRAME_POINTER_REG);
|
|
a_reg_alloc(list,NR_R12);
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|
|
|
list.concat(taicpu.op_reg_reg(A_MOV,NR_R12,NR_STACK_POINTER_REG));
|
|
end;
|
|
{ save int registers }
|
|
reference_reset(ref);
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|
ref.index:=NR_STACK_POINTER_REG;
|
|
ref.addressmode:=AM_PREINDEXED;
|
|
regs:=rg[R_INTREGISTER].used_in_proc-paramanager.get_volatile_registers_int(pocall_stdcall);
|
|
if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
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|
regs:=regs+[RS_R11,RS_R12,RS_R14,RS_R15]
|
|
else
|
|
if (regs<>[]) or (pi_do_call in current_procinfo.flags) then
|
|
include(regs,RS_R14);
|
|
if regs<>[] then
|
|
list.concat(setoppostfix(taicpu.op_ref_regset(A_STM,ref,regs),PF_FD));
|
|
|
|
if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
|
|
list.concat(taicpu.op_reg_reg_const(A_SUB,NR_FRAME_POINTER_REG,NR_R12,4));
|
|
|
|
{ allocate necessary stack size
|
|
not necessary according to Yury Sidorov
|
|
|
|
{ don't use a_op_const_reg_reg here because we don't allow register allocations
|
|
in the entry/exit code }
|
|
if (target_info.system in [system_arm_wince]) and
|
|
(localsize>=winstackpagesize) then
|
|
begin
|
|
if localsize div winstackpagesize<=5 then
|
|
begin
|
|
if is_shifter_const(localsize,shift) then
|
|
list.concat(Taicpu.op_reg_reg_const(A_SUB,NR_STACK_POINTER_REG,NR_STACK_POINTER_REG,localsize))
|
|
else
|
|
begin
|
|
a_load_const_reg(list,OS_ADDR,localsize,NR_R12);
|
|
list.concat(taicpu.op_reg_reg_reg(A_SUB,NR_STACK_POINTER_REG,NR_STACK_POINTER_REG,NR_R12));
|
|
end;
|
|
|
|
for i:=1 to localsize div winstackpagesize do
|
|
begin
|
|
if localsize-i*winstackpagesize<4096 then
|
|
reference_reset_base(href,NR_STACK_POINTER_REG,-(localsize-i*winstackpagesize))
|
|
else
|
|
begin
|
|
a_load_const_reg(list,OS_ADDR,-(localsize-i*winstackpagesize),NR_R12);
|
|
reference_reset_base(href,NR_STACK_POINTER_REG,0);
|
|
href.index:=NR_R12;
|
|
end;
|
|
{ the data stored doesn't matter }
|
|
list.concat(Taicpu.op_reg_ref(A_STR,NR_R0,href));
|
|
end;
|
|
a_reg_dealloc(list,NR_R12);
|
|
reference_reset_base(href,NR_STACK_POINTER_REG,0);
|
|
{ the data stored doesn't matter }
|
|
list.concat(Taicpu.op_reg_ref(A_STR,NR_R0,href));
|
|
end
|
|
else
|
|
begin
|
|
current_asmdata.getjumplabel(again);
|
|
list.concat(Taicpu.op_reg_const(A_MOV,NR_R12,localsize div winstackpagesize));
|
|
a_label(list,again);
|
|
{ always shifterop }
|
|
list.concat(Taicpu.op_reg_reg_const(A_SUB,NR_STACK_POINTER_REG,NR_STACK_POINTER_REG,winstackpagesize));
|
|
reference_reset_base(href,NR_STACK_POINTER_REG,0);
|
|
{ the data stored doesn't matter }
|
|
list.concat(Taicpu.op_reg_ref(A_STR,NR_R0,href));
|
|
list.concat(Taicpu.op_reg_reg_const(A_SUB,NR_R12,NR_R12,1));
|
|
a_jmp_cond(list,OC_NE,again);
|
|
if is_shifter_const(localsize mod winstackpagesize,shift) then
|
|
list.concat(Taicpu.op_reg_reg_const(A_SUB,NR_STACK_POINTER_REG,NR_STACK_POINTER_REG,localsize mod winstackpagesize))
|
|
else
|
|
begin
|
|
a_load_const_reg(list,OS_ADDR,localsize mod winstackpagesize,NR_R12);
|
|
list.concat(taicpu.op_reg_reg_reg(A_SUB,NR_STACK_POINTER_REG,NR_STACK_POINTER_REG,NR_R12));
|
|
end;
|
|
a_reg_dealloc(list,NR_R12);
|
|
reference_reset_base(href,NR_STACK_POINTER_REG,0);
|
|
{ the data stored doesn't matter }
|
|
list.concat(Taicpu.op_reg_ref(A_STR,NR_R0,href));
|
|
end
|
|
end
|
|
else
|
|
}
|
|
if LocalSize<>0 then
|
|
if not(is_shifter_const(localsize,shift)) then
|
|
begin
|
|
if current_procinfo.framepointer=NR_STACK_POINTER_REG then
|
|
a_reg_alloc(list,NR_R12);
|
|
a_load_const_reg(list,OS_ADDR,LocalSize,NR_R12);
|
|
list.concat(taicpu.op_reg_reg_reg(A_SUB,NR_STACK_POINTER_REG,NR_STACK_POINTER_REG,NR_R12));
|
|
a_reg_dealloc(list,NR_R12);
|
|
end
|
|
else
|
|
begin
|
|
a_reg_dealloc(list,NR_R12);
|
|
list.concat(taicpu.op_reg_reg_const(A_SUB,NR_STACK_POINTER_REG,NR_STACK_POINTER_REG,LocalSize));
|
|
end;
|
|
|
|
if firstfloatreg<>RS_NO then
|
|
begin
|
|
reference_reset(ref);
|
|
if tg.direction*tarmprocinfo(current_procinfo).floatregstart>=1023 then
|
|
begin
|
|
a_load_const_reg(list,OS_ADDR,-tarmprocinfo(current_procinfo).floatregstart,NR_R12);
|
|
list.concat(taicpu.op_reg_reg_reg(A_SUB,NR_R12,current_procinfo.framepointer,NR_R12));
|
|
ref.base:=NR_R12;
|
|
end
|
|
else
|
|
begin
|
|
ref.base:=current_procinfo.framepointer;
|
|
ref.offset:=tarmprocinfo(current_procinfo).floatregstart;
|
|
end;
|
|
list.concat(taicpu.op_reg_const_ref(A_SFM,newreg(R_FPUREGISTER,firstfloatreg,R_SUBWHOLE),
|
|
lastfloatreg-firstfloatreg+1,ref));
|
|
end;
|
|
end;
|
|
}
|
|
end;
|
|
|
|
|
|
procedure tcgavr.g_proc_exit(list : TAsmList;parasize : longint;nostackframe:boolean);
|
|
{
|
|
var
|
|
ref : treference;
|
|
firstfloatreg,lastfloatreg,
|
|
r : byte;
|
|
shift : byte;
|
|
regs : tcpuregisterset;
|
|
LocalSize : longint;
|
|
}
|
|
begin
|
|
{
|
|
if not(nostackframe) then
|
|
begin
|
|
{ restore floating point register }
|
|
firstfloatreg:=RS_NO;
|
|
{ save floating point registers? }
|
|
for r:=RS_F0 to RS_F7 do
|
|
if r in rg[R_FPUREGISTER].used_in_proc-paramanager.get_volatile_registers_fpu(pocall_stdcall) then
|
|
begin
|
|
if firstfloatreg=RS_NO then
|
|
firstfloatreg:=r;
|
|
lastfloatreg:=r;
|
|
end;
|
|
|
|
if firstfloatreg<>RS_NO then
|
|
begin
|
|
reference_reset(ref);
|
|
if tg.direction*tarmprocinfo(current_procinfo).floatregstart>=1023 then
|
|
begin
|
|
a_load_const_reg(list,OS_ADDR,-tarmprocinfo(current_procinfo).floatregstart,NR_R12);
|
|
list.concat(taicpu.op_reg_reg_reg(A_SUB,NR_R12,current_procinfo.framepointer,NR_R12));
|
|
ref.base:=NR_R12;
|
|
end
|
|
else
|
|
begin
|
|
ref.base:=current_procinfo.framepointer;
|
|
ref.offset:=tarmprocinfo(current_procinfo).floatregstart;
|
|
end;
|
|
list.concat(taicpu.op_reg_const_ref(A_LFM,newreg(R_FPUREGISTER,firstfloatreg,R_SUBWHOLE),
|
|
lastfloatreg-firstfloatreg+1,ref));
|
|
end;
|
|
|
|
if (current_procinfo.framepointer=NR_STACK_POINTER_REG) then
|
|
begin
|
|
LocalSize:=current_procinfo.calc_stackframe_size;
|
|
if LocalSize<>0 then
|
|
if not(is_shifter_const(LocalSize,shift)) then
|
|
begin
|
|
a_reg_alloc(list,NR_R12);
|
|
a_load_const_reg(list,OS_ADDR,LocalSize,NR_R12);
|
|
list.concat(taicpu.op_reg_reg_reg(A_ADD,NR_STACK_POINTER_REG,NR_STACK_POINTER_REG,NR_R12));
|
|
a_reg_dealloc(list,NR_R12);
|
|
end
|
|
else
|
|
begin
|
|
list.concat(taicpu.op_reg_reg_const(A_ADD,NR_STACK_POINTER_REG,NR_STACK_POINTER_REG,LocalSize));
|
|
end;
|
|
|
|
regs:=rg[R_INTREGISTER].used_in_proc-paramanager.get_volatile_registers_int(pocall_stdcall);
|
|
if (pi_do_call in current_procinfo.flags) or (regs<>[]) then
|
|
begin
|
|
exclude(regs,RS_R14);
|
|
include(regs,RS_R15);
|
|
end;
|
|
if regs=[] then
|
|
list.concat(taicpu.op_reg_reg(A_MOV,NR_R15,NR_R14))
|
|
else
|
|
begin
|
|
reference_reset(ref);
|
|
ref.index:=NR_STACK_POINTER_REG;
|
|
ref.addressmode:=AM_PREINDEXED;
|
|
list.concat(setoppostfix(taicpu.op_ref_regset(A_LDM,ref,regs),PF_FD));
|
|
end;
|
|
end
|
|
else
|
|
begin
|
|
{ restore int registers and return }
|
|
reference_reset(ref);
|
|
ref.index:=NR_FRAME_POINTER_REG;
|
|
list.concat(setoppostfix(taicpu.op_ref_regset(A_LDM,ref,rg[R_INTREGISTER].used_in_proc-paramanager.get_volatile_registers_int(pocall_stdcall)+[RS_R11,RS_R13,RS_R15]),PF_EA));
|
|
end;
|
|
end
|
|
else
|
|
list.concat(taicpu.op_reg_reg(A_MOV,NR_PC,NR_R14));
|
|
}
|
|
end;
|
|
|
|
|
|
procedure tcgavr.a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);
|
|
begin
|
|
end;
|
|
|
|
|
|
procedure tcgavr.fixref(list : TAsmList;var ref : treference);
|
|
begin
|
|
end;
|
|
|
|
|
|
procedure tcgavr.g_concatcopy_move(list : TAsmList;const source,dest : treference;len : aint);
|
|
var
|
|
paraloc1,paraloc2,paraloc3 : TCGPara;
|
|
begin
|
|
paraloc1.init;
|
|
paraloc2.init;
|
|
paraloc3.init;
|
|
paramanager.getintparaloc(pocall_default,1,paraloc1);
|
|
paramanager.getintparaloc(pocall_default,2,paraloc2);
|
|
paramanager.getintparaloc(pocall_default,3,paraloc3);
|
|
paramanager.allocparaloc(list,paraloc3);
|
|
a_param_const(list,OS_INT,len,paraloc3);
|
|
paramanager.allocparaloc(list,paraloc2);
|
|
a_paramaddr_ref(list,dest,paraloc2);
|
|
paramanager.allocparaloc(list,paraloc2);
|
|
a_paramaddr_ref(list,source,paraloc1);
|
|
paramanager.freeparaloc(list,paraloc3);
|
|
paramanager.freeparaloc(list,paraloc2);
|
|
paramanager.freeparaloc(list,paraloc1);
|
|
alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
|
|
a_call_name_static(list,'FPC_MOVE');
|
|
dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
|
|
paraloc3.done;
|
|
paraloc2.done;
|
|
paraloc1.done;
|
|
end;
|
|
|
|
|
|
procedure tcgavr.g_concatcopy_internal(list : TAsmList;const source,dest : treference;len : aint;aligned : boolean);
|
|
begin
|
|
end;
|
|
|
|
procedure tcgavr.g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : aint);
|
|
begin
|
|
g_concatcopy_internal(list,source,dest,len,false);
|
|
end;
|
|
|
|
|
|
procedure tcgavr.g_concatcopy(list : TAsmList;const source,dest : treference;len : aint);
|
|
begin
|
|
if (source.alignment in [1..3]) or
|
|
(dest.alignment in [1..3]) then
|
|
g_concatcopy_internal(list,source,dest,len,false)
|
|
else
|
|
g_concatcopy_internal(list,source,dest,len,true);
|
|
end;
|
|
|
|
|
|
procedure tcgavr.g_overflowCheck(list : TAsmList;const l : tlocation;def : tdef);
|
|
var
|
|
ovloc : tlocation;
|
|
begin
|
|
ovloc.loc:=LOC_VOID;
|
|
g_overflowCheck_loc(list,l,def,ovloc);
|
|
end;
|
|
|
|
|
|
procedure tcgavr.g_overflowCheck_loc(List:TAsmList;const Loc:TLocation;def:TDef;ovloc : tlocation);
|
|
begin
|
|
end;
|
|
|
|
{
|
|
procedure tcgavr.g_save_registers(list : TAsmList);
|
|
begin
|
|
{ this work is done in g_proc_entry }
|
|
end;
|
|
|
|
|
|
procedure tcgavr.g_restore_registers(list : TAsmList);
|
|
begin
|
|
{ this work is done in g_proc_exit }
|
|
end;
|
|
}
|
|
|
|
procedure tcgavr.a_jmp_cond(list : TAsmList;cond : TOpCmp;l: tasmlabel);
|
|
var
|
|
ai : taicpu;
|
|
begin
|
|
ai:=Taicpu.Op_sym(A_BRxx,l);
|
|
ai.SetCondition(OpCmp2AsmCond[cond]);
|
|
ai.is_jmp:=true;
|
|
list.concat(ai);
|
|
end;
|
|
|
|
|
|
procedure tcgavr.g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);
|
|
begin
|
|
end;
|
|
|
|
|
|
procedure tcg64favr.a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);
|
|
begin
|
|
end;
|
|
|
|
|
|
procedure tcg64favr.a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;reg : tregister64);
|
|
begin
|
|
a_op64_const_reg_reg(list,op,size,value,reg,reg);
|
|
end;
|
|
|
|
|
|
procedure tcg64favr.a_op64_const_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64);
|
|
var
|
|
ovloc : tlocation;
|
|
begin
|
|
a_op64_const_reg_reg_checkoverflow(list,op,size,value,regsrc,regdst,false,ovloc);
|
|
end;
|
|
|
|
|
|
procedure tcg64favr.a_op64_reg_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);
|
|
var
|
|
ovloc : tlocation;
|
|
begin
|
|
a_op64_reg_reg_reg_checkoverflow(list,op,size,regsrc1,regsrc2,regdst,false,ovloc);
|
|
end;
|
|
|
|
|
|
procedure tcg64favr.a_op64_const_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
|
|
begin
|
|
end;
|
|
|
|
|
|
procedure tcg64favr.a_op64_reg_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
|
|
begin
|
|
end;
|
|
|
|
|
|
procedure create_codegen;
|
|
begin
|
|
cg:=tcgavr.create;
|
|
cg64:=tcg64favr.create;
|
|
end;
|
|
|
|
end.
|