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1476 lines
49 KiB
ObjectPascal
1476 lines
49 KiB
ObjectPascal
{
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Copyright (c) 1999-2008 by Mazen Neifer and Florian Klaempfl
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Contains the assembler object for the Z80
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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unit aasmcpu;
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{$i fpcdefs.inc}
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interface
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uses
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cclasses,
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globtype,globals,verbose,
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aasmbase,aasmtai,aasmdata,aasmsym,
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cgbase,cgutils,cpubase,cpuinfo,
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ogbase;
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const
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{ "mov reg,reg" source operand number }
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O_MOV_SOURCE = 1;
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{ "mov reg,reg" source operand number }
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O_MOV_DEST = 0;
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instabentries = {$i z80nop.inc}
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maxinfolen = 18;
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type
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{ Operand types }
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toperandtype=(
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OT_NONE,
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OT_IMM3, { 3-bit immediate value (bit number: [0..7]) }
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OT_IMM8, { 8-bit immediate value }
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OT_IMM16, { 16-bit immediate value }
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OT_IMM_VAL0, { the immediate value 0 }
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OT_IMM_VAL1, { the immediate value 1 }
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OT_IMM_VAL2, { the immediate value 2 }
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OT_IMM_RST, { immediate value in [$00,$08,$10,$18,$20,$28,$30,$38] }
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OT_IMM_PORT, { 8-bit immediate port number for the IN and OUT instructions }
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OT_REG8, { 8-bit register: A/B/C/D/E/H/L }
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OT_REG8_A, { register A }
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OT_REG8_I, { register I }
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OT_REG8_R, { register R }
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OT_REG8_C_PORT, { implied parameter of the IN and OUT instructions }
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OT_REG16_IX, { register IX }
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OT_REG16_IY, { register IY }
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OT_REG16_SP, { register SP }
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OT_REG16_BC_DE_HL_SP, { 16-bit register pair: BC/DE/HL/SP }
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OT_REG16_BC_DE_HL_AF, { 16-bit register pair: BC/DE/HL/AF }
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OT_REG16_BC_DE_IX_SP, { 16-bit register pair: BC/DE/IX/SP }
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OT_REG16_BC_DE_IY_SP, { 16-bit register pair: BC/DE/IY/SP }
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OT_REG16_DE, { 16-bit register pair DE }
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OT_REG16_HL, { 16-bit register pair HL }
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OT_REG16_AF, { 16-bit register pair AF }
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OT_REG16_AF_, { alternate register set, 16-bit register pair AF' }
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OT_RELJMP8, { 8-bit relative jump offset }
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OT_COND, { condition: NZ/Z/NC/C/PO/PE/P/M }
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OT_COND_C, { condition C }
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OT_COND_NC, { condition NC }
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OT_COND_Z, { condition Z }
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OT_COND_NZ, { condition NZ }
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OT_REF_ADDR16, { memory contents at address (nn = 16-bit immediate address) }
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OT_REF_BC, { memory contents at address in register BC }
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OT_REF_DE, { memory contents at address in register DE }
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OT_REF_HL, { memory contents at address in register HL }
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OT_REF_SP, { memory contents at address in register SP }
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OT_REF_IX, { memory contents at address in register IX }
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OT_REF_IY, { memory contents at address in register IY }
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OT_REF_IX_d, { memory contents at address in register IX+d, d is in [-128..127] }
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OT_REF_IY_d); { memory contents at address in register IY+d, d is in [-128..127] }
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timmoperandtype = OT_IMM3..OT_IMM_PORT;
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tregoperandtype = OT_REG8..OT_REG16_AF_;
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treg8operandtype = OT_REG8..OT_REG8_C_PORT;
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treg16operandtype = OT_REG16_IX..OT_REG16_AF_;
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tcondoperandtype = OT_COND..OT_COND_NZ;
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trefoperandtype = OT_REF_ADDR16..OT_REF_IY_d;
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trefoperandtypes = set of trefoperandtype;
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tinsentry = record
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opcode : tasmop;
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ops : byte;
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optypes : array[0..max_operands-1] of toperandtype;
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code : array[0..maxinfolen] of char;
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flags : longint;
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end;
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pinsentry=^tinsentry;
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{ taicpu }
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taicpu = class(tai_cpu_abstract_sym)
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private
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{ next fields are filled in pass1, so pass2 is faster }
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insentry : PInsEntry;
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inssize : shortint;
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insoffset : longint;
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LastInsOffset : longint;
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function Matches(p:PInsEntry;objdata:TObjData):boolean;
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function FindInsentry(objdata:TObjData):boolean;
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function calcsize(p:PInsEntry):shortint;
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procedure gencode(objdata:TObjData);
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procedure init; { this need to be called by all constructors }
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public
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constructor op_none(op : tasmop);
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constructor op_reg(op : tasmop;_op1 : tregister);
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constructor op_const(op : tasmop;_op1 : LongInt);
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constructor op_ref(op : tasmop;const _op1 : treference);
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constructor op_reg_reg(op : tasmop;_op1,_op2 : tregister);
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constructor op_reg_ref(op : tasmop;_op1 : tregister;const _op2 : treference);
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constructor op_reg_const(op:tasmop; _op1: tregister; _op2: LongInt);
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constructor op_const_reg(op:tasmop; _op1: LongInt; _op2: tregister);
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constructor op_ref_reg(op : tasmop;const _op1 : treference;_op2 : tregister);
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constructor op_ref_const(op:tasmop; _op1: treference; _op2: LongInt);
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{ this is for Jmp instructions }
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constructor op_cond_sym(op : tasmop;cond:TAsmCond;_op1 : tasmsymbol);
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constructor op_sym(op : tasmop;_op1 : tasmsymbol);
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constructor op_sym_ofs(op : tasmop;_op1 : tasmsymbol;_op1ofs:longint);
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procedure loadbool(opidx:longint;_b:boolean);
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{ register allocation }
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function is_same_reg_move(regtype: Tregistertype):boolean; override;
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{ register spilling code }
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function spilling_get_operation_type(opnr: longint): topertype;override;
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procedure ResetPass1;override;
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procedure ResetPass2;override;
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function Pass1(objdata:TObjData):longint;override;
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procedure Pass2(objdata:TObjData);override;
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function CheckIfValid:boolean;
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function GetString:string;
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end;
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tai_align = class(tai_align_abstract)
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{ nothing to add }
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end;
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procedure InitAsm;
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procedure DoneAsm;
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function spilling_create_load(const ref:treference;r:tregister):Taicpu;
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function spilling_create_store(r:tregister; const ref:treference):Taicpu;
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function is_ref_addr16(const ref:treference): Boolean;
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function is_ref_bc(const ref:treference): Boolean;
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function is_ref_de(const ref:treference): Boolean;
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function is_ref_hl(const ref:treference): Boolean;
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function is_ref_sp(const ref:treference): Boolean;
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function is_ref_ix(const ref:treference): Boolean;
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function is_ref_iy(const ref:treference): Boolean;
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function is_ref_ix_d(const ref:treference): Boolean;
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function is_ref_iy_d(const ref:treference): Boolean;
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function is_ref_opertype(const ref:treference;opertype:toperandtype): Boolean;
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function is_ref_in_opertypes(const ref:treference;const refopertypes:trefoperandtypes): Boolean;
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implementation
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{****************************************************************************
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Instruction table
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*****************************************************************************}
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type
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TInsTabCache=array[TasmOp] of longint;
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PInsTabCache=^TInsTabCache;
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const
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InsTab:array[0..instabentries-1] of TInsEntry={$i z80tab.inc}
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var
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InsTabCache : PInsTabCache;
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{*****************************************************************************
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taicpu Constructors
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*****************************************************************************}
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procedure taicpu.loadbool(opidx:longint;_b:boolean);
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begin
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if opidx>=ops then
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ops:=opidx+1;
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with oper[opidx]^ do
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begin
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if typ=top_ref then
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dispose(ref);
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b:=_b;
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typ:=top_bool;
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end;
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end;
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function taicpu.Matches(p: PInsEntry; objdata:TObjData): boolean;
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function OperandsMatch(const oper: toper; const ot: toperandtype): boolean;
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var
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currsym: TObjSymbol;
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l: ASizeInt;
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relsize: LongInt;
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begin
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case ot of
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OT_IMM3:
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result:=(oper.typ=top_const) and (oper.val>=0) and (oper.val<=7);
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OT_IMM8:
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result:=((oper.typ=top_const) and (oper.val>=-128) and (oper.val<=255)) or
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((oper.typ=top_ref) and
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(oper.ref^.refaddr in [addr_hi8,addr_lo8]) and assigned(oper.ref^.symbol) and
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(oper.ref^.base=NR_NO) and (oper.ref^.index=NR_NO));
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OT_IMM16:
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result:=((oper.typ=top_const) and (oper.val>=-32768) and (oper.val<=65535)) or
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((oper.typ=top_ref) and
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(oper.ref^.refaddr=addr_full) and assigned(oper.ref^.symbol) and
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(oper.ref^.base=NR_NO) and (oper.ref^.index=NR_NO));
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OT_IMM_VAL0:
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result:=(oper.typ=top_const) and (oper.val=0);
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OT_IMM_VAL1:
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result:=(oper.typ=top_const) and (oper.val=1);
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OT_IMM_VAL2:
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result:=(oper.typ=top_const) and (oper.val=2);
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OT_IMM_RST:
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result:=(oper.typ=top_const) and ((oper.val=$00) or (oper.val=$08) or
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(oper.val=$10) or (oper.val=$18) or
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(oper.val=$20) or (oper.val=$28) or
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(oper.val=$30) or (oper.val=$38));
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OT_IMM_PORT:
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result:=(oper.typ=top_ref) and
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(oper.ref^.symbol=nil) and (oper.ref^.relsymbol=nil) and
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(oper.ref^.base=NR_NO) and (oper.ref^.index=NR_NO) and
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(oper.ref^.offset>=0) and (oper.ref^.offset<=255);
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OT_REG8:
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result:=(oper.typ=top_reg) and ((oper.reg=NR_A) or (oper.reg=NR_B) or
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(oper.reg=NR_C) or (oper.reg=NR_D) or
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(oper.reg=NR_E) or (oper.reg=NR_H) or
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(oper.reg=NR_L));
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OT_REG8_A:
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result:=(oper.typ=top_reg) and (oper.reg=NR_A);
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OT_REG8_I:
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result:=(oper.typ=top_reg) and (oper.reg=NR_I);
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OT_REG8_R:
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result:=(oper.typ=top_reg) and (oper.reg=NR_R);
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OT_REG8_C_PORT:
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result:=(oper.typ=top_ref) and
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(((oper.ref^.base=NR_C) and (oper.ref^.index=NR_NO)) or
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((oper.ref^.base=NR_NO) and (oper.ref^.index=NR_C))) and
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(oper.ref^.symbol=nil) and (oper.ref^.relsymbol=nil) and
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(oper.ref^.offset=0);
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OT_REG16_IX:
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result:=(oper.typ=top_reg) and (oper.reg=NR_IX);
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OT_REG16_IY:
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result:=(oper.typ=top_reg) and (oper.reg=NR_IY);
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OT_REG16_SP:
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result:=(oper.typ=top_reg) and (oper.reg=NR_SP);
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OT_REG16_BC_DE_HL_SP:
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result:=(oper.typ=top_reg) and ((oper.reg=NR_BC) or (oper.reg=NR_DE) or (oper.reg=NR_HL) or (oper.reg=NR_SP));
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OT_REG16_BC_DE_HL_AF:
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result:=(oper.typ=top_reg) and ((oper.reg=NR_BC) or (oper.reg=NR_DE) or (oper.reg=NR_HL) or (oper.reg=NR_AF));
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OT_REG16_BC_DE_IX_SP:
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result:=(oper.typ=top_reg) and ((oper.reg=NR_BC) or (oper.reg=NR_DE) or (oper.reg=NR_IX) or (oper.reg=NR_SP));
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OT_REG16_BC_DE_IY_SP:
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result:=(oper.typ=top_reg) and ((oper.reg=NR_BC) or (oper.reg=NR_DE) or (oper.reg=NR_IY) or (oper.reg=NR_SP));
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OT_REG16_DE:
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result:=(oper.typ=top_reg) and (oper.reg=NR_DE);
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OT_REG16_HL:
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result:=(oper.typ=top_reg) and (oper.reg=NR_HL);
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OT_REG16_AF:
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result:=(oper.typ=top_reg) and (oper.reg=NR_AF);
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OT_REG16_AF_:
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result:=(oper.typ=top_reg) and (oper.reg=NR_AF_);
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OT_RELJMP8:
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begin
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result:=(oper.typ=top_ref) and
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(oper.ref^.refaddr=addr_full) and assigned(oper.ref^.symbol) and
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(oper.ref^.base=NR_NO) and (oper.ref^.index=NR_NO);
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if result and assigned(objdata) then
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begin
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currsym:=objdata.symbolref(oper.ref^.symbol);
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l:=oper.ref^.offset;
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{$push}
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{$r-,q-} { disable also overflow as address returns a qword for x86_64 }
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if assigned(currsym) then
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inc(l,currsym.address);
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{$pop}
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{ when it is a forward jump we need to compensate the
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offset of the instruction since the previous time,
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because the symbol address is then still using the
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'old-style' addressing.
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For backwards jumps this is not required because the
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address of the symbol is already adjusted to the
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new offset }
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if (l>InsOffset) and (LastInsOffset<>-1) then
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inc(l,InsOffset-LastInsOffset-1);
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{ instruction size will then always become 2 (PFV) }
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relsize:=l-(InsOffset+2);
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result:=(relsize>=-128) and (relsize<=127) and
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(
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not assigned(currsym) or
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(currsym.objsection=objdata.currobjsec)
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);
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end;
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end;
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OT_REF_ADDR16,
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OT_REF_BC,
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OT_REF_DE,
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OT_REF_HL,
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OT_REF_SP,
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OT_REF_IX,
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OT_REF_IY,
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OT_REF_IX_d,
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OT_REF_IY_d:
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result:=(oper.typ=top_ref) and is_ref_opertype(oper.ref^,ot);
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else
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internalerror(2020042901);
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end;
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end;
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var
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i: Integer;
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begin
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result:=false;
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{ Check the opcode }
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if p^.opcode<>opcode then
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exit;
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{ The opcode doesn't support conditions, but we have a condition?
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That's an invalid instruction, don't match it against anything. }
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if (condition<>C_NONE) and not (opcode in cond_instructions) then
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exit;
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{ if our opcode supports a condition, but our operation doesn't have
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one, and we're matching it with an instruction entry 'p' that has a
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condition, then it doesn't match }
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if (opcode in cond_instructions) and (condition=C_None) and
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(p^.ops>0) and (p^.optypes[0] in [OT_COND..OT_COND_NZ]) then
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exit;
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{ instruction has a condition? }
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if (opcode in cond_instructions) and (condition<>C_None) then
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begin
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{ Check the operand count }
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if p^.ops<>(ops+1) then
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exit;
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{ Check the condition }
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case p^.optypes[0] of
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OT_COND:
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{ any condition accepted };
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OT_COND_C:
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if condition<>C_C then
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exit;
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OT_COND_NC:
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if condition<>C_NC then
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exit;
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OT_COND_Z:
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if condition<>C_Z then
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exit;
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OT_COND_NZ:
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if condition<>C_NZ then
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exit;
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else
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{ no condition in 'p'? Then it's not a match! }
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exit;
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end;
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{ Check the operands }
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for i:=1 to p^.ops-1 do
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if not OperandsMatch(oper[i-1]^,p^.optypes[i]) then
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exit;
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end
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else
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{ no condition }
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begin
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{ Check the operand count }
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if p^.ops<>ops then
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exit;
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{ Check the operands }
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for i:=0 to p^.ops-1 do
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if not OperandsMatch(oper[i]^,p^.optypes[i]) then
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exit;
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end;
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result:=true;
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end;
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function taicpu.FindInsentry(objdata: TObjData): boolean;
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var
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i : longint;
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begin
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result:=false;
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{ Things which may only be done once, not when a second pass is done to
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optimize }
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if (Insentry=nil) or (opcode=A_JRJP) then
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begin
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{ set the file postion }
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current_filepos:=fileinfo;
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end
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else
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begin
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{ we've already an insentry so it's valid }
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result:=true;
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exit;
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end;
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{ Lookup opcode in the table }
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InsSize:=-1;
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i:=instabcache^[opcode];
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if i=-1 then
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begin
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Message1(asmw_e_opcode_not_in_table,std_op2str[opcode]);
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exit;
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end;
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insentry:=@instab[i];
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while (insentry^.opcode=opcode) do
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begin
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if matches(insentry,objdata) then
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begin
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result:=true;
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exit;
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end;
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inc(insentry);
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end;
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Message1(asmw_e_invalid_opcode_and_operands,GetString);
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{ No instruction found, set insentry to nil and inssize to -1 }
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insentry:=nil;
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inssize:=-1;
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end;
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function taicpu.calcsize(p: PInsEntry): shortint;
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var
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code, token: string;
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i: Integer;
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ch: Char;
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begin
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result:=0;
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code:=insentry^.code;
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i:=1;
|
|
token:='';
|
|
while i<=length(code) do
|
|
begin
|
|
ch:=code[i];
|
|
Inc(i);
|
|
if ch<>',' then
|
|
token:=token+ch;
|
|
if (ch=',') or (i>length(code)) then
|
|
begin
|
|
if token='' then
|
|
internalerror(2020050402);
|
|
if (token[1]='$') or (token[1]='%') or (token='n') or (token='d') or (token='e') then
|
|
Inc(result)
|
|
else if token='nn' then
|
|
Inc(result,2)
|
|
else
|
|
internalerror(2020050504);
|
|
token:='';
|
|
end;
|
|
end;
|
|
end;
|
|
|
|
|
|
procedure taicpu.gencode(objdata: TObjData);
|
|
|
|
procedure WriteByte(b: byte);
|
|
begin
|
|
objdata.writebytes(b,1);
|
|
end;
|
|
|
|
procedure WriteWord(w: word);
|
|
var
|
|
bytes: array [0..1] of Byte;
|
|
begin
|
|
bytes[0]:=Byte(w);
|
|
bytes[1]:=Byte(w shr 8);
|
|
objdata.writebytes(bytes,2);
|
|
end;
|
|
|
|
procedure WriteNN;
|
|
var
|
|
i, j: Integer;
|
|
begin
|
|
for j:=0 to insentry^.ops-1 do
|
|
begin
|
|
if condition=C_NONE then
|
|
i:=j
|
|
else
|
|
i:=j-1;
|
|
if insentry^.optypes[j]=OT_IMM16 then
|
|
begin
|
|
case oper[i]^.typ of
|
|
top_const:
|
|
begin
|
|
WriteWord(Word(oper[i]^.val));
|
|
exit;
|
|
end;
|
|
top_ref:
|
|
begin
|
|
if (oper[i]^.ref^.base<>NR_NO) or (oper[i]^.ref^.index<>NR_NO) then
|
|
internalerror(2020050406);
|
|
if Assigned(oper[i]^.ref^.symbol) then
|
|
begin
|
|
if oper[i]^.ref^.refaddr<>addr_full then
|
|
internalerror(2020050407);
|
|
objdata.writeReloc(oper[i]^.ref^.offset,2,ObjData.symbolref(oper[i]^.ref^.symbol),RELOC_ABSOLUTE);
|
|
exit;
|
|
end
|
|
else
|
|
begin
|
|
WriteWord(oper[i]^.ref^.offset);
|
|
exit;
|
|
end;
|
|
end;
|
|
else
|
|
InternalError(2020050404);
|
|
end;
|
|
end
|
|
else if insentry^.optypes[j]=OT_REF_ADDR16 then
|
|
begin
|
|
case oper[i]^.typ of
|
|
top_ref:
|
|
begin
|
|
if (oper[i]^.ref^.base<>NR_NO) or (oper[i]^.ref^.index<>NR_NO) then
|
|
internalerror(2020050603);
|
|
if Assigned(oper[i]^.ref^.symbol) then
|
|
begin
|
|
if oper[i]^.ref^.refaddr<>addr_no then
|
|
internalerror(2020050604);
|
|
objdata.writeReloc(oper[i]^.ref^.offset,2,ObjData.symbolref(oper[i]^.ref^.symbol),RELOC_ABSOLUTE);
|
|
exit;
|
|
end
|
|
else
|
|
begin
|
|
WriteWord(oper[i]^.ref^.offset);
|
|
exit;
|
|
end;
|
|
end;
|
|
else
|
|
InternalError(2020050602);
|
|
end;
|
|
end;
|
|
end;
|
|
InternalError(2020050403);
|
|
end;
|
|
|
|
procedure WriteN;
|
|
var
|
|
i: Integer;
|
|
begin
|
|
for i:=0 to insentry^.ops-1 do
|
|
begin
|
|
if insentry^.optypes[i]=OT_IMM8 then
|
|
begin
|
|
case oper[i]^.typ of
|
|
top_const:
|
|
begin
|
|
WriteByte(Byte(oper[i]^.val));
|
|
exit;
|
|
end;
|
|
top_ref:
|
|
begin
|
|
if (oper[i]^.ref^.base<>NR_NO) or (oper[i]^.ref^.index<>NR_NO) then
|
|
internalerror(2020050507);
|
|
if Assigned(oper[i]^.ref^.symbol) then
|
|
begin
|
|
case oper[i]^.ref^.refaddr of
|
|
addr_hi8:
|
|
objdata.writeReloc(oper[i]^.ref^.offset,1,ObjData.symbolref(oper[i]^.ref^.symbol),RELOC_ABSOLUTE_HI8);
|
|
addr_lo8:
|
|
objdata.writeReloc(oper[i]^.ref^.offset,1,ObjData.symbolref(oper[i]^.ref^.symbol),RELOC_ABSOLUTE_LO8);
|
|
else
|
|
internalerror(2020050408);
|
|
end;
|
|
exit;
|
|
end
|
|
else
|
|
internalerror(2020050409);
|
|
end;
|
|
else
|
|
InternalError(2020050506);
|
|
end;
|
|
end
|
|
else if insentry^.optypes[i]=OT_IMM_PORT then
|
|
begin
|
|
case oper[i]^.typ of
|
|
top_ref:
|
|
begin
|
|
if (oper[i]^.ref^.base<>NR_NO) or (oper[i]^.ref^.index<>NR_NO) or Assigned(oper[i]^.ref^.symbol) then
|
|
internalerror(2020050612);
|
|
WriteByte(Byte(oper[i]^.ref^.offset));
|
|
exit;
|
|
end;
|
|
else
|
|
InternalError(2020050611);
|
|
end;
|
|
end;
|
|
end;
|
|
InternalError(2020050505);
|
|
end;
|
|
|
|
procedure WriteD;
|
|
var
|
|
i: Integer;
|
|
begin
|
|
for i:=0 to insentry^.ops-1 do
|
|
begin
|
|
if insentry^.optypes[i] in [OT_REF_IX_d,OT_REF_IY_d] then
|
|
begin
|
|
case oper[i]^.typ of
|
|
top_ref:
|
|
begin
|
|
if not is_ref_opertype(oper[i]^.ref^,insentry^.optypes[i]) then
|
|
internalerror(2020050510);
|
|
WriteByte(Byte(oper[i]^.ref^.offset));
|
|
exit;
|
|
end;
|
|
else
|
|
InternalError(2020050511);
|
|
end;
|
|
end;
|
|
end;
|
|
InternalError(2020050512);
|
|
end;
|
|
|
|
procedure WriteE;
|
|
var
|
|
i, j: Integer;
|
|
begin
|
|
for j:=0 to insentry^.ops-1 do
|
|
begin
|
|
if condition=C_NONE then
|
|
i:=j
|
|
else
|
|
i:=j-1;
|
|
if insentry^.optypes[j]=OT_RELJMP8 then
|
|
begin
|
|
case oper[i]^.typ of
|
|
top_ref:
|
|
begin
|
|
if (oper[i]^.ref^.base<>NR_NO) or (oper[i]^.ref^.index<>NR_NO) then
|
|
internalerror(2020050608);
|
|
if Assigned(oper[i]^.ref^.symbol) then
|
|
begin
|
|
if oper[i]^.ref^.refaddr<>addr_full then
|
|
internalerror(2020050609);
|
|
objdata.writeReloc(oper[i]^.ref^.offset,1,ObjData.symbolref(oper[i]^.ref^.symbol),RELOC_RELATIVE);
|
|
exit;
|
|
end
|
|
else
|
|
internalerror(2020050610);
|
|
exit;
|
|
end;
|
|
else
|
|
InternalError(2020050607);
|
|
end;
|
|
end;
|
|
end;
|
|
end;
|
|
|
|
function EvalMaskCode(const maskcode: string): byte;
|
|
var
|
|
i: Integer;
|
|
begin
|
|
result:=0;
|
|
case maskcode of
|
|
'dd':
|
|
for i:=0 to insentry^.ops-1 do
|
|
if insentry^.optypes[i]=OT_REG16_BC_DE_HL_SP then
|
|
begin
|
|
if oper[i]^.typ<>top_reg then
|
|
internalerror(2020050410);
|
|
case oper[i]^.reg of
|
|
NR_BC:
|
|
result:=0;
|
|
NR_DE:
|
|
result:=1;
|
|
NR_HL:
|
|
result:=2;
|
|
NR_SP:
|
|
result:=3;
|
|
else
|
|
internalerror(2020050411);
|
|
end;
|
|
end;
|
|
'qq':
|
|
for i:=0 to insentry^.ops-1 do
|
|
if insentry^.optypes[i]=OT_REG16_BC_DE_HL_AF then
|
|
begin
|
|
if oper[i]^.typ<>top_reg then
|
|
internalerror(2020050412);
|
|
case oper[i]^.reg of
|
|
NR_BC:
|
|
result:=0;
|
|
NR_DE:
|
|
result:=1;
|
|
NR_HL:
|
|
result:=2;
|
|
NR_AF:
|
|
result:=3;
|
|
else
|
|
internalerror(2020050413);
|
|
end;
|
|
end;
|
|
'pp':
|
|
for i:=0 to insentry^.ops-1 do
|
|
if insentry^.optypes[i]=OT_REG16_BC_DE_IX_SP then
|
|
begin
|
|
if oper[i]^.typ<>top_reg then
|
|
internalerror(2020050414);
|
|
case oper[i]^.reg of
|
|
NR_BC:
|
|
result:=0;
|
|
NR_DE:
|
|
result:=1;
|
|
NR_IX:
|
|
result:=2;
|
|
NR_SP:
|
|
result:=3;
|
|
else
|
|
internalerror(2020050415);
|
|
end;
|
|
end;
|
|
'rr':
|
|
for i:=0 to insentry^.ops-1 do
|
|
if insentry^.optypes[i]=OT_REG16_BC_DE_IY_SP then
|
|
begin
|
|
if oper[i]^.typ<>top_reg then
|
|
internalerror(2020050416);
|
|
case oper[i]^.reg of
|
|
NR_BC:
|
|
result:=0;
|
|
NR_DE:
|
|
result:=1;
|
|
NR_IY:
|
|
result:=2;
|
|
NR_SP:
|
|
result:=3;
|
|
else
|
|
internalerror(2020050417);
|
|
end;
|
|
end;
|
|
'rrr':
|
|
for i:=0 to insentry^.ops-1 do
|
|
if insentry^.optypes[i]=OT_REG8 then
|
|
begin
|
|
if oper[i]^.typ<>top_reg then
|
|
internalerror(2020050418);
|
|
case oper[i]^.reg of
|
|
NR_A:
|
|
result:=7;
|
|
NR_B:
|
|
result:=0;
|
|
NR_C:
|
|
result:=1;
|
|
NR_D:
|
|
result:=2;
|
|
NR_E:
|
|
result:=3;
|
|
NR_H:
|
|
result:=4;
|
|
NR_L:
|
|
result:=5;
|
|
else
|
|
internalerror(2020050419);
|
|
end;
|
|
end;
|
|
'rrrRRR':
|
|
begin
|
|
if ops<>2 then
|
|
internalerror(2020050420);
|
|
if (insentry^.optypes[0]<>OT_REG8) or (insentry^.optypes[1]<>OT_REG8) then
|
|
internalerror(2020050421);
|
|
if (oper[0]^.typ<>top_reg) or (oper[1]^.typ<>top_reg) then
|
|
internalerror(2020050422);
|
|
case oper[0]^.reg of
|
|
NR_A:
|
|
result:=7 shl 3;
|
|
NR_B:
|
|
result:=0 shl 3;
|
|
NR_C:
|
|
result:=1 shl 3;
|
|
NR_D:
|
|
result:=2 shl 3;
|
|
NR_E:
|
|
result:=3 shl 3;
|
|
NR_H:
|
|
result:=4 shl 3;
|
|
NR_L:
|
|
result:=5 shl 3;
|
|
else
|
|
internalerror(2020050427);
|
|
end;
|
|
case oper[1]^.reg of
|
|
NR_A:
|
|
result:=result or 7;
|
|
NR_B:
|
|
result:=result or 0;
|
|
NR_C:
|
|
result:=result or 1;
|
|
NR_D:
|
|
result:=result or 2;
|
|
NR_E:
|
|
result:=result or 3;
|
|
NR_H:
|
|
result:=result or 4;
|
|
NR_L:
|
|
result:=result or 5;
|
|
else
|
|
internalerror(2020050428);
|
|
end;
|
|
end;
|
|
'ccc':
|
|
begin
|
|
case condition of
|
|
C_NZ:
|
|
result:=0;
|
|
C_Z:
|
|
result:=1;
|
|
C_NC:
|
|
result:=2;
|
|
C_C:
|
|
result:=3;
|
|
C_PO:
|
|
result:=4;
|
|
C_PE:
|
|
result:=5;
|
|
C_P:
|
|
result:=6;
|
|
C_M:
|
|
result:=7;
|
|
else
|
|
internalerror(2020050605);
|
|
end;
|
|
end;
|
|
'ppp':
|
|
begin
|
|
for i:=0 to insentry^.ops-1 do
|
|
if insentry^.optypes[i]=OT_IMM_RST then
|
|
begin
|
|
if oper[i]^.typ<>top_const then
|
|
internalerror(2020050606);
|
|
result:=Byte(oper[i]^.val shr 3) and $07;
|
|
end;
|
|
end;
|
|
'bbb':
|
|
begin
|
|
for i:=0 to insentry^.ops-1 do
|
|
if insentry^.optypes[i]=OT_IMM3 then
|
|
begin
|
|
if oper[i]^.typ<>top_const then
|
|
internalerror(2020050614);
|
|
result:=Byte(oper[i]^.val) and $07;
|
|
end;
|
|
end;
|
|
'bbbrrr':
|
|
result:=(EvalMaskCode('bbb') shl 3) or EvalMaskCode('rrr');
|
|
else
|
|
internalerror(2020050426);
|
|
end;
|
|
end;
|
|
|
|
procedure HandlePercent(token: string);
|
|
var
|
|
bincode: string;
|
|
maskcode: string;
|
|
i, valcode, shiftcount: integer;
|
|
b: Byte;
|
|
begin
|
|
bincode:='';
|
|
maskcode:='';
|
|
for i:=1 to length(token) do
|
|
case token[i] of
|
|
'%':
|
|
bincode:=bincode+'%';
|
|
'0':
|
|
begin
|
|
bincode:=bincode+'0';
|
|
maskcode:=maskcode+'0';
|
|
end;
|
|
'1':
|
|
begin
|
|
bincode:=bincode+'1';
|
|
maskcode:=maskcode+'0';
|
|
end;
|
|
'p','d','r','q','c','b':
|
|
begin
|
|
bincode:=bincode+'0';
|
|
maskcode:=maskcode+token[i];
|
|
end;
|
|
'''':
|
|
begin
|
|
if (maskcode='') or (maskcode[length(maskcode)]<>'r') then
|
|
internalerror(2020050425);
|
|
maskcode[length(maskcode)]:='R';
|
|
end;
|
|
else
|
|
internalerror(2020050405);
|
|
end;
|
|
Val(bincode,b,valcode);
|
|
while maskcode[1]='0' do
|
|
delete(maskcode,1,1);
|
|
shiftcount:=0;
|
|
while maskcode[length(maskcode)]='0' do
|
|
begin
|
|
delete(maskcode,length(maskcode),1);
|
|
Inc(shiftcount);
|
|
end;
|
|
b:=b or (EvalMaskCode(maskcode) shl shiftcount);
|
|
objdata.writebytes(b,1);
|
|
end;
|
|
|
|
var
|
|
i: Integer;
|
|
ch: Char;
|
|
b: Byte;
|
|
valcode: integer;
|
|
code: string;
|
|
token: string;
|
|
begin
|
|
{ safety check }
|
|
if objdata.currobjsec.size<>longword(insoffset) then
|
|
internalerror(2020050401);
|
|
|
|
code:=insentry^.code;
|
|
i:=1;
|
|
token:='';
|
|
while i<=length(code) do
|
|
begin
|
|
ch:=code[i];
|
|
Inc(i);
|
|
if ch<>',' then
|
|
token:=token+ch;
|
|
if (ch=',') or (i>length(code)) then
|
|
begin
|
|
if token='' then
|
|
internalerror(2020050424);
|
|
if token[1]='$' then
|
|
begin
|
|
Val(token,b,valcode);
|
|
WriteByte(b);
|
|
end
|
|
else if token[1]='%' then
|
|
begin
|
|
HandlePercent(token);
|
|
end
|
|
else if token='nn' then
|
|
WriteNN
|
|
else if token='n' then
|
|
WriteN
|
|
else if token='d' then
|
|
WriteD
|
|
else if token='e' then
|
|
WriteE
|
|
else
|
|
internalerror(2020050503);
|
|
token:='';
|
|
end;
|
|
end;
|
|
end;
|
|
|
|
|
|
procedure taicpu.init;
|
|
begin
|
|
insentry:=nil;
|
|
LastInsOffset:=-1;
|
|
InsOffset:=0;
|
|
InsSize:=0;
|
|
end;
|
|
|
|
|
|
constructor taicpu.op_none(op : tasmop);
|
|
begin
|
|
inherited create(op);
|
|
init;
|
|
end;
|
|
|
|
|
|
constructor taicpu.op_reg(op : tasmop;_op1 : tregister);
|
|
begin
|
|
inherited create(op);
|
|
init;
|
|
ops:=1;
|
|
loadreg(0,_op1);
|
|
end;
|
|
|
|
|
|
constructor taicpu.op_ref(op : tasmop;const _op1 : treference);
|
|
begin
|
|
inherited create(op);
|
|
init;
|
|
ops:=1;
|
|
loadref(0,_op1);
|
|
end;
|
|
|
|
|
|
constructor taicpu.op_const(op : tasmop;_op1 : LongInt);
|
|
begin
|
|
inherited create(op);
|
|
init;
|
|
ops:=1;
|
|
loadconst(0,_op1);
|
|
end;
|
|
|
|
|
|
constructor taicpu.op_reg_reg(op : tasmop;_op1,_op2 : tregister);
|
|
begin
|
|
inherited create(op);
|
|
init;
|
|
ops:=2;
|
|
loadreg(0,_op1);
|
|
loadreg(1,_op2);
|
|
end;
|
|
|
|
constructor taicpu.op_reg_const(op:tasmop; _op1: tregister; _op2: LongInt);
|
|
begin
|
|
inherited create(op);
|
|
init;
|
|
ops:=2;
|
|
loadreg(0,_op1);
|
|
loadconst(1,_op2);
|
|
end;
|
|
|
|
constructor taicpu.op_const_reg(op:tasmop; _op1: LongInt; _op2: tregister);
|
|
begin
|
|
inherited create(op);
|
|
init;
|
|
ops:=2;
|
|
loadconst(0,_op1);
|
|
loadreg(1,_op2);
|
|
end;
|
|
|
|
|
|
constructor taicpu.op_reg_ref(op : tasmop;_op1 : tregister;const _op2 : treference);
|
|
begin
|
|
inherited create(op);
|
|
init;
|
|
ops:=2;
|
|
loadreg(0,_op1);
|
|
loadref(1,_op2);
|
|
end;
|
|
|
|
|
|
constructor taicpu.op_ref_reg(op : tasmop;const _op1 : treference;_op2 : tregister);
|
|
begin
|
|
inherited create(op);
|
|
init;
|
|
ops:=2;
|
|
loadref(0,_op1);
|
|
loadreg(1,_op2);
|
|
end;
|
|
|
|
|
|
constructor taicpu.op_ref_const(op: tasmop; _op1: treference; _op2: LongInt);
|
|
begin
|
|
inherited create(op);
|
|
init;
|
|
ops:=2;
|
|
loadref(0,_op1);
|
|
loadconst(1,_op2);
|
|
end;
|
|
|
|
|
|
constructor taicpu.op_cond_sym(op : tasmop;cond:TAsmCond;_op1 : tasmsymbol);
|
|
begin
|
|
inherited create(op);
|
|
init;
|
|
is_jmp:=op in jmp_instructions;
|
|
condition:=cond;
|
|
ops:=1;
|
|
loadsymbol(0,_op1,0);
|
|
end;
|
|
|
|
|
|
constructor taicpu.op_sym(op : tasmop;_op1 : tasmsymbol);
|
|
begin
|
|
inherited create(op);
|
|
init;
|
|
is_jmp:=op in jmp_instructions;
|
|
ops:=1;
|
|
loadsymbol(0,_op1,0);
|
|
end;
|
|
|
|
|
|
constructor taicpu.op_sym_ofs(op : tasmop;_op1 : tasmsymbol;_op1ofs:longint);
|
|
begin
|
|
inherited create(op);
|
|
init;
|
|
ops:=1;
|
|
loadsymbol(0,_op1,_op1ofs);
|
|
end;
|
|
|
|
|
|
function taicpu.is_same_reg_move(regtype: Tregistertype):boolean;
|
|
begin
|
|
result:=(
|
|
((opcode in [A_LD]) and (regtype = R_INTREGISTER))
|
|
) and
|
|
(ops=2) and
|
|
(oper[0]^.typ=top_reg) and
|
|
(oper[1]^.typ=top_reg) and
|
|
(oper[0]^.reg=oper[1]^.reg);
|
|
end;
|
|
|
|
|
|
function taicpu.spilling_get_operation_type(opnr: longint): topertype;
|
|
begin
|
|
result:=operand_read;
|
|
case opcode of
|
|
A_LD,
|
|
A_POP:
|
|
if opnr=0 then
|
|
result:=operand_write;
|
|
A_PUSH,
|
|
A_BIT,
|
|
A_CP,
|
|
A_DJNZ,
|
|
A_JR,
|
|
A_JP,
|
|
A_JRJP,
|
|
A_CALL,
|
|
A_RET,
|
|
A_RETI,
|
|
A_RETN,
|
|
A_RST,
|
|
A_IM:
|
|
;
|
|
A_SET,
|
|
A_RES:
|
|
if opnr=1 then
|
|
result:=operand_readwrite;
|
|
A_EX:
|
|
result:=operand_readwrite;
|
|
else
|
|
begin
|
|
if opnr=0 then
|
|
result:=operand_readwrite;
|
|
end;
|
|
end;
|
|
end;
|
|
|
|
|
|
procedure taicpu.ResetPass1;
|
|
begin
|
|
{ we need to reset everything here, because the choosen insentry
|
|
can be invalid for a new situation where the previously optimized
|
|
insentry is not correct }
|
|
InsEntry:=nil;
|
|
InsSize:=0;
|
|
LastInsOffset:=-1;
|
|
end;
|
|
|
|
|
|
procedure taicpu.ResetPass2;
|
|
begin
|
|
{ we are here in a second pass, check if the instruction can be optimized }
|
|
if assigned(InsEntry) and (opcode=A_JRJP) then
|
|
begin
|
|
InsEntry:=nil;
|
|
InsSize:=0;
|
|
end;
|
|
LastInsOffset:=-1;
|
|
end;
|
|
|
|
|
|
function taicpu.Pass1(objdata: TObjData): longint;
|
|
begin
|
|
Pass1:=0;
|
|
{ Save the old offset and set the new offset }
|
|
InsOffset:=ObjData.CurrObjSec.Size;
|
|
{ Error? }
|
|
if (Insentry=nil) and (InsSize=-1) then
|
|
exit;
|
|
{ set the file postion }
|
|
current_filepos:=fileinfo;
|
|
{ Get InsEntry }
|
|
if FindInsEntry(ObjData) then
|
|
begin
|
|
{ Calculate instruction size }
|
|
InsSize:=calcsize(insentry);
|
|
LastInsOffset:=InsOffset;
|
|
Pass1:=InsSize;
|
|
exit;
|
|
end;
|
|
LastInsOffset:=-1;
|
|
end;
|
|
|
|
|
|
procedure taicpu.Pass2(objdata: TObjData);
|
|
begin
|
|
{ error in pass1 ? }
|
|
if insentry=nil then
|
|
exit;
|
|
current_filepos:=fileinfo;
|
|
{ Generate the instruction }
|
|
GenCode(objdata);
|
|
end;
|
|
|
|
|
|
function taicpu.CheckIfValid: boolean;
|
|
begin
|
|
result:=FindInsEntry(nil);
|
|
end;
|
|
|
|
|
|
function taicpu.GetString: string;
|
|
var
|
|
i : longint;
|
|
s : string;
|
|
first: Boolean;
|
|
begin
|
|
s:='['+std_op2str[opcode];
|
|
for i:=0 to ops-1 do
|
|
begin
|
|
with oper[i]^ do
|
|
begin
|
|
if i=0 then
|
|
begin
|
|
s:=s+' ';
|
|
if condition<>C_None then
|
|
s:=s+cond2str[condition]+',';
|
|
end
|
|
else
|
|
s:=s+',';
|
|
case typ of
|
|
top_reg:
|
|
s:=s+std_regname(reg);
|
|
top_const:
|
|
s:=s+'const';
|
|
top_ref:
|
|
case ref^.refaddr of
|
|
addr_full:
|
|
s:=s+'addr16';
|
|
addr_lo8:
|
|
s:=s+'addr_lo8';
|
|
addr_hi8:
|
|
s:=s+'addr_hi8';
|
|
addr_no:
|
|
begin
|
|
s:=s+'(';
|
|
first:=true;
|
|
if ref^.base<>NR_NO then
|
|
begin
|
|
first:=false;
|
|
s:=s+std_regname(ref^.base);
|
|
end;
|
|
if ref^.index<>NR_NO then
|
|
begin
|
|
if not first then
|
|
s:=s+'+';
|
|
first:=false;
|
|
s:=s+std_regname(ref^.index);
|
|
end;
|
|
if assigned(ref^.symbol) then
|
|
begin
|
|
if not first then
|
|
s:=s+'+';
|
|
first:=false;
|
|
s:=s+'addr16';
|
|
end;
|
|
if ref^.offset<>0 then
|
|
begin
|
|
if not first then
|
|
s:=s+'+';
|
|
if (ref^.offset>=-128) and (ref^.offset<=127) then
|
|
s:=s+'const8'
|
|
else
|
|
s:=s+'const16';
|
|
end;
|
|
s:=s+')';
|
|
end;
|
|
else
|
|
;
|
|
end;
|
|
else
|
|
;
|
|
end;
|
|
end;
|
|
end;
|
|
GetString:=s+']';
|
|
end;
|
|
|
|
|
|
function spilling_create_load(const ref:treference;r:tregister):Taicpu;
|
|
begin
|
|
case getregtype(r) of
|
|
R_INTREGISTER :
|
|
result:=taicpu.op_reg_ref(A_LD,r,ref)
|
|
else
|
|
internalerror(200401041);
|
|
end;
|
|
end;
|
|
|
|
|
|
function spilling_create_store(r:tregister; const ref:treference):Taicpu;
|
|
begin
|
|
case getregtype(r) of
|
|
R_INTREGISTER :
|
|
result:=taicpu.op_ref_reg(A_LD,ref,r);
|
|
else
|
|
internalerror(2004010403);
|
|
end;
|
|
end;
|
|
|
|
|
|
function is_ref_addr16(const ref: treference): Boolean;
|
|
begin
|
|
result:=(ref.base=NR_NO) and (ref.index=NR_NO);
|
|
end;
|
|
|
|
|
|
function is_ref_bc(const ref: treference): Boolean;
|
|
begin
|
|
result:=(((ref.base=NR_BC) and (ref.index=NR_NO)) or
|
|
((ref.base=NR_NO) and (ref.index=NR_BC))) and
|
|
(ref.offset=0) and (ref.scalefactor<=1) and
|
|
(ref.symbol=nil) and (ref.relsymbol=nil);
|
|
end;
|
|
|
|
|
|
function is_ref_de(const ref: treference): Boolean;
|
|
begin
|
|
result:=(((ref.base=NR_DE) and (ref.index=NR_NO)) or
|
|
((ref.base=NR_NO) and (ref.index=NR_DE))) and
|
|
(ref.offset=0) and (ref.scalefactor<=1) and
|
|
(ref.symbol=nil) and (ref.relsymbol=nil);
|
|
end;
|
|
|
|
|
|
function is_ref_hl(const ref: treference): Boolean;
|
|
begin
|
|
result:=(((ref.base=NR_HL) and (ref.index=NR_NO)) or
|
|
((ref.base=NR_NO) and (ref.index=NR_HL))) and
|
|
(ref.offset=0) and (ref.scalefactor<=1) and
|
|
(ref.symbol=nil) and (ref.relsymbol=nil);
|
|
end;
|
|
|
|
|
|
function is_ref_sp(const ref: treference): Boolean;
|
|
begin
|
|
result:=(((ref.base=NR_SP) and (ref.index=NR_NO)) or
|
|
((ref.base=NR_NO) and (ref.index=NR_SP))) and
|
|
(ref.offset=0) and (ref.scalefactor<=1) and
|
|
(ref.symbol=nil) and (ref.relsymbol=nil);
|
|
end;
|
|
|
|
|
|
function is_ref_ix(const ref: treference): Boolean;
|
|
begin
|
|
result:=(((ref.base=NR_IX) and (ref.index=NR_NO)) or
|
|
((ref.base=NR_NO) and (ref.index=NR_IX))) and
|
|
(ref.offset=0) and (ref.scalefactor<=1) and
|
|
(ref.symbol=nil) and (ref.relsymbol=nil);
|
|
end;
|
|
|
|
|
|
function is_ref_iy(const ref: treference): Boolean;
|
|
begin
|
|
result:=(((ref.base=NR_IY) and (ref.index=NR_NO)) or
|
|
((ref.base=NR_NO) and (ref.index=NR_IY))) and
|
|
(ref.offset=0) and (ref.scalefactor<=1) and
|
|
(ref.symbol=nil) and (ref.relsymbol=nil);
|
|
end;
|
|
|
|
|
|
function is_ref_ix_d(const ref: treference): Boolean;
|
|
begin
|
|
result:=(((ref.base=NR_IX) and (ref.index=NR_NO)) or
|
|
((ref.base=NR_NO) and (ref.index=NR_IX))) and
|
|
(ref.offset>=-128) and (ref.offset<=127) and (ref.scalefactor<=1) and
|
|
(ref.symbol=nil) and (ref.relsymbol=nil);
|
|
end;
|
|
|
|
|
|
function is_ref_iy_d(const ref: treference): Boolean;
|
|
begin
|
|
result:=(((ref.base=NR_IY) and (ref.index=NR_NO)) or
|
|
((ref.base=NR_NO) and (ref.index=NR_IY))) and
|
|
(ref.offset>=-128) and (ref.offset<=127) and (ref.scalefactor<=1) and
|
|
(ref.symbol=nil) and (ref.relsymbol=nil);
|
|
end;
|
|
|
|
|
|
function is_ref_opertype(const ref: treference; opertype: toperandtype): Boolean;
|
|
begin
|
|
case opertype of
|
|
OT_REF_ADDR16:
|
|
result:=is_ref_addr16(ref);
|
|
OT_REF_BC:
|
|
result:=is_ref_bc(ref);
|
|
OT_REF_DE:
|
|
result:=is_ref_de(ref);
|
|
OT_REF_HL:
|
|
result:=is_ref_hl(ref);
|
|
OT_REF_SP:
|
|
result:=is_ref_sp(ref);
|
|
OT_REF_IX:
|
|
result:=is_ref_ix(ref);
|
|
OT_REF_IY:
|
|
result:=is_ref_iy(ref);
|
|
OT_REF_IX_d:
|
|
result:=is_ref_ix_d(ref);
|
|
OT_REF_IY_d:
|
|
result:=is_ref_iy_d(ref);
|
|
else
|
|
internalerror(2020041801);
|
|
end;
|
|
end;
|
|
|
|
|
|
function is_ref_in_opertypes(const ref: treference; const refopertypes: trefoperandtypes): Boolean;
|
|
var
|
|
ot: trefoperandtype;
|
|
begin
|
|
result:=true;
|
|
for ot:=low(trefoperandtypes) to high(trefoperandtypes) do
|
|
if (ot in refopertypes) and is_ref_opertype(ref,ot) then
|
|
exit;
|
|
result:=false;
|
|
end;
|
|
|
|
|
|
{****************************************************************************
|
|
Instruction table
|
|
*****************************************************************************}
|
|
|
|
procedure BuildInsTabCache;
|
|
var
|
|
i : longint;
|
|
begin
|
|
new(instabcache);
|
|
FillChar(instabcache^,sizeof(tinstabcache),$ff);
|
|
i:=0;
|
|
while (i<InsTabEntries) do
|
|
begin
|
|
if InsTabCache^[InsTab[i].OPcode]=-1 then
|
|
InsTabCache^[InsTab[i].OPcode]:=i;
|
|
inc(i);
|
|
end;
|
|
end;
|
|
|
|
|
|
procedure InitAsm;
|
|
begin
|
|
if not assigned(instabcache) then
|
|
BuildInsTabCache;
|
|
end;
|
|
|
|
|
|
procedure DoneAsm;
|
|
begin
|
|
if assigned(instabcache) then
|
|
begin
|
|
dispose(instabcache);
|
|
instabcache:=nil;
|
|
end;
|
|
end;
|
|
|
|
begin
|
|
cai_cpu:=taicpu;
|
|
cai_align:=tai_align;
|
|
end.
|