fpc/compiler/arm
Jonas Maebe 4c68ea1000 * use pocalls_cdecl and cstylearrayofconst more consistently instead of
ad hoc set constants containing varying number cdecl-like calling
    conventions
   o added pocall_sysv_abi_cdecl and pocall_ms_abi_cdecl to cstylearrayofconst
   o also allow C-style blocks with mwpascal instead of cdecl (mwpascal = cdecl
     with "const" = "constref" for record parameters)
   o did not touch cases related to name mangling and import/export names,
     because those are a real mess and easily break things left and right :/

git-svn-id: trunk@35479 -
2017-02-25 11:46:35 +00:00
..
aasmcpu.pas
agarmgas.pas * restructured the the TExternalAssembler constructors so that the 2016-11-09 19:51:20 +00:00
aoptcpu.pas
aoptcpub.pas
aoptcpud.pas
armatt.inc
armatts.inc
armins.dat
armnop.inc
armop.inc
armreg.dat
armtab.inc
cgcpu.pas * renamed t<cpuname>procinfo to tcpuprocinfo for all targets, so we can 2016-12-16 22:41:21 +00:00
cpubase.pas * renamed t<cpuname>procinfo to tcpuprocinfo for all targets, so we can 2016-12-16 22:41:21 +00:00
cpuelf.pas AROS: added arm-aros target to compiler and fpcmake 2016-11-06 10:51:45 +00:00
cpuinfo.pas Added more Nordic Semi controllers. Created a new unit for NRF52x controllers with a more precise register naming following Nordic SDK conventions. 2017-01-10 20:30:20 +00:00
cpunode.pas
cpupara.pas * use pocalls_cdecl and cstylearrayofconst more consistently instead of 2017-02-25 11:46:35 +00:00
cpupi.pas * renamed t<cpuname>procinfo to tcpuprocinfo for all targets, so we can 2016-12-16 22:41:21 +00:00
cputarg.pas AROS: added arm-aros target to compiler and fpcmake 2016-11-06 10:51:45 +00:00
hlcgcpu.pas + added volatility information to all memory references 2016-11-27 18:17:37 +00:00
itcpugas.pas
narmadd.pas
narmcal.pas syscalls: unify call reference creation across 4 different CPU archs. less copypasted code, brings x86_64 AROS support up to speed 2016-12-02 09:29:09 +00:00
narmcnv.pas * tarmtypeconvnode.first_int_to_real should call the generic method in the parent class, if soft fpu code is generated, resolves #31350 2017-02-12 16:05:13 +00:00
narmcon.pas + added volatility information to all memory references 2016-11-27 18:17:37 +00:00
narminl.pas + added volatility information to all memory references 2016-11-27 18:17:37 +00:00
narmmat.pas
narmmem.pas
narmset.pas + added volatility information to all memory references 2016-11-27 18:17:37 +00:00
pp.lpi.template
raarm.pas
raarmgas.pas * reverted r35424, wasn't ready for commit yet 2017-02-11 21:21:44 +00:00
rarmcon.inc
rarmdwa.inc
rarmnor.inc
rarmnum.inc
rarmrni.inc
rarmsri.inc
rarmsta.inc
rarmstd.inc
rarmsup.inc
rgcpu.pas * offset of vstr/vld is limited to +/- 1020, take care of this during spilling 2017-02-04 18:42:02 +00:00
symcpu.pas arm: arm-aros syscall support 2016-11-06 14:31:42 +00:00