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a64att.inc
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* corrected cosmetic ARM/AArch64 copy/paste leftovers (patch by
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2015-05-14 14:42:12 +00:00 |
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a64atts.inc
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* corrected cosmetic ARM/AArch64 copy/paste leftovers (patch by
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2015-05-14 14:42:12 +00:00 |
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a64ins.dat
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* added some missing instructions and aliases, reordered them according
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2015-02-23 22:48:24 +00:00 |
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a64nop.inc
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a64op.inc
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* corrected cosmetic ARM/AArch64 copy/paste leftovers (patch by
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2015-05-14 14:42:12 +00:00 |
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a64reg.dat
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* fixed debug register values for vector registers
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2015-02-23 22:54:15 +00:00 |
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a64tab.inc
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* corrected cosmetic ARM/AArch64 copy/paste leftovers (patch by
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2015-05-14 14:42:12 +00:00 |
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aasmcpu.pas
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+ added individual bits of the x86 flags register as subregisters
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2017-04-26 13:52:52 +00:00 |
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agcpugas.pas
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* restructured the the TExternalAssembler constructors so that the
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2016-11-09 19:51:20 +00:00 |
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aoptcpu.pas
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aoptcpub.pas
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* completed TAoptBaseCpu.RegModifiedByInstruction()
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2015-02-23 22:53:23 +00:00 |
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aoptcpud.pas
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cgcpu.pas
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* fix aarch64 building
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2017-08-22 08:44:56 +00:00 |
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cpubase.pas
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* recognise tb(n)z as branch opcode (patch by Edmund Grimley Evans)
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2015-05-14 14:42:03 +00:00 |
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cpuinfo.pas
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- removed unused constants
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2017-03-26 13:06:34 +00:00 |
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cpunode.pas
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* automatically generate necessary indirect symbols when a new assembler
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2016-07-20 20:53:03 +00:00 |
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cpupara.pas
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* simplification of and fix for AArch64 cpupara.is_hfa_internal() (patch by
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2016-08-12 16:53:02 +00:00 |
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cpupi.pas
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* renamed t<cpuname>procinfo to tcpuprocinfo for all targets, so we can
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2016-12-16 22:41:21 +00:00 |
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cputarg.pas
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+ Linux/AArch64 compiler support (patch by Edmund Grimley Evans)
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2015-05-22 09:25:05 +00:00 |
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hlcgcpu.pas
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+ added volatility information to all memory references
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2016-11-27 18:17:37 +00:00 |
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itcpugas.pas
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ncpuadd.pas
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* force constants into a registers in the 32x32->64 optimized case
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2015-02-28 22:31:03 +00:00 |
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ncpucnv.pas
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* replaced current_procinfo.currtrue/falselabel with storing the true/false
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2015-08-27 18:28:57 +00:00 |
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ncpuinl.pas
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* switched to using the stack pointer as base register for the temp allocator
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2015-02-23 22:54:03 +00:00 |
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ncpumat.pas
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* set pi_do_call for AArch64 mod/div nodes, as they call FPC_DIVBYZERO
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2015-02-28 22:30:57 +00:00 |
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ncpumem.pas
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+ added volatility information to all memory references
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2016-11-27 18:17:37 +00:00 |
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ncpuset.pas
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+ added volatility information to all memory references
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2016-11-27 18:17:37 +00:00 |
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ra64con.inc
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+ FPCR, FPSR and TPIDR registers
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2015-02-23 22:50:44 +00:00 |
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ra64dwa.inc
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* fixed debug register values for vector registers
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2015-02-23 22:54:15 +00:00 |
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ra64nor.inc
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+ FPCR, FPSR and TPIDR registers
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2015-02-23 22:50:44 +00:00 |
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ra64num.inc
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+ FPCR, FPSR and TPIDR registers
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2015-02-23 22:50:44 +00:00 |
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ra64rni.inc
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+ FPCR, FPSR and TPIDR registers
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2015-02-23 22:50:44 +00:00 |
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ra64sri.inc
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+ FPCR, FPSR and TPIDR registers
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2015-02-23 22:50:44 +00:00 |
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ra64sta.inc
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* fixed debug register values for vector registers
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2015-02-23 22:54:15 +00:00 |
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ra64std.inc
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+ FPCR, FPSR and TPIDR registers
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2015-02-23 22:50:44 +00:00 |
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ra64sup.inc
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+ FPCR, FPSR and TPIDR registers
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2015-02-23 22:50:44 +00:00 |
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racpu.pas
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+ Aarch64 assembler reader
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2015-02-23 22:52:36 +00:00 |
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racpugas.pas
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* only take into account the location of the parameter at the callee side to
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2017-05-21 20:17:11 +00:00 |
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rgcpu.pas
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+ added volatility information to all memory references
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2016-11-27 18:17:37 +00:00 |
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symcpu.pas
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o fixes handling of iso i/o parameters/program parameters:
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2015-05-01 20:58:31 +00:00 |
