fpc/compiler/i386
Jonas Maebe 77658b925b * disable regular array -> dynamic array type coversion support unless
{$modeswitch arraytodynarray} is active (mantis #35576)
   o changed compiler to compile without this modeswitch
   o added the modeswitch to a test that depends on it

git-svn-id: trunk@42118 -
2019-05-25 12:31:32 +00:00
..
aoptcpu.pas * fix case completeness and unreachable code warnings in compiler that would 2019-05-12 14:29:03 +00:00
aoptcpub.pas - get rid of MaxOps, it is redundant with max_operands 2018-11-02 21:32:29 +00:00
aoptcpud.pas * i386 peephole assembler uses largely the common peephole optimizer infrastructure, the resulting code is besides a few improvements the same 2016-04-21 20:14:01 +00:00
cgcpu.pas * fix case completeness and unreachable code warnings in compiler that would 2019-05-12 14:29:03 +00:00
cpubase.inc * replaced the saved_XXX_registers arrays with virtual methods inside 2018-04-19 21:22:16 +00:00
cpuelf.pas * fix case completeness and unreachable code warnings in compiler that would 2019-05-12 14:29:03 +00:00
cpuinfo.pas + added CPUX86_HAS_SSE2 to x86 tcpuflags 2017-09-26 16:02:56 +00:00
cpunode.pas * automatically generate necessary indirect symbols when a new assembler 2016-07-20 20:53:03 +00:00
cpupara.pas * disable regular array -> dynamic array type coversion support unless 2019-05-25 12:31:32 +00:00
cpupi.pas * i386 PIC: Do not force EBX as a GOT register if tf_section_threadvars is not set. Actually forcing EBX here is a bad idea anyway. 2019-02-25 15:05:26 +00:00
cputarg.pas
hlcgcpu.pas * Do not set pi_needs_got in current_procinfo.flags at the node level, since the GOT usage can only be estimated there. Instead set the pi_needs_got flag at places where the GOT register is accessed during the code generation. This eliminates generation of the unneeded initialization of the GOT register and fixes linker errors when the _GLOBAL_OFFSET_TABLE_ symbol is referenced but no actual GOT references are present. 2019-02-25 13:35:40 +00:00
i386att.inc + patch by Marģers to support the x86 assembler instructions blsi, blsr, blsmsk, adcx, adox, movbe, pclmulqdq, resolves #34815 and #34799 2019-01-20 18:50:12 +00:00
i386atts.inc + patch by Marģers to support the x86 assembler instructions blsi, blsr, blsmsk, adcx, adox, movbe, pclmulqdq, resolves #34815 and #34799 2019-01-20 18:50:12 +00:00
i386int.inc + patch by Marģers to support the x86 assembler instructions blsi, blsr, blsmsk, adcx, adox, movbe, pclmulqdq, resolves #34815 and #34799 2019-01-20 18:50:12 +00:00
i386nop.inc + patch by Marģers to support the x86 assembler instructions blsi, blsr, blsmsk, adcx, adox, movbe, pclmulqdq, resolves #34815 and #34799 2019-01-20 18:50:12 +00:00
i386op.inc + patch by Marģers to support the x86 assembler instructions blsi, blsr, blsmsk, adcx, adox, movbe, pclmulqdq, resolves #34815 and #34799 2019-01-20 18:50:12 +00:00
i386prop.inc + patch by Marģers to support the x86 assembler instructions blsi, blsr, blsmsk, adcx, adox, movbe, pclmulqdq, resolves #34815 and #34799 2019-01-20 18:50:12 +00:00
i386tab.inc + patch by Marģers to support the x86 assembler instructions blsi, blsr, blsmsk, adcx, adox, movbe, pclmulqdq, resolves #34815 and #34799 2019-01-20 18:50:12 +00:00
n386add.pas * fix case completeness and unreachable code warnings in compiler that would 2019-05-12 14:29:03 +00:00
n386cal.pas syscalls: unify call reference creation across 4 different CPU archs. less copypasted code, brings x86_64 AROS support up to speed 2016-12-02 09:29:09 +00:00
n386flw.pas Avoid incomplete case warning when compiled with -dTEST_WIN32_SEH 2019-05-24 10:14:51 +00:00
n386inl.pas + fast and branchless implementation of abs(int64) for i386 2017-09-10 17:25:47 +00:00
n386ld.pas
n386mat.pas + support mmx shifting 2018-02-27 21:40:12 +00:00
n386mem.pas * moved nf_typedaddr to addrnodeflags (anf_typedaddr) 2018-04-03 16:41:01 +00:00
n386set.pas * let all the case code generation work with tconstexprint instead of aint, 2019-02-24 19:58:37 +00:00
r386ari.inc + added individual bits of the x86 flags register as subregisters 2017-04-26 13:52:52 +00:00
r386att.inc + added individual bits of the x86 flags register as subregisters 2017-04-26 13:52:52 +00:00
r386con.inc * fix flag subregs after r38206 2018-03-11 20:30:11 +00:00
r386dwrf.inc + added individual bits of the x86 flags register as subregisters 2017-04-26 13:52:52 +00:00
r386int.inc + added individual bits of the x86 flags register as subregisters 2017-04-26 13:52:52 +00:00
r386iri.inc + added individual bits of the x86 flags register as subregisters 2017-04-26 13:52:52 +00:00
r386nasm.inc + added individual bits of the x86 flags register as subregisters 2017-04-26 13:52:52 +00:00
r386nor.inc + added individual bits of the x86 flags register as subregisters 2017-04-26 13:52:52 +00:00
r386nri.inc + added individual bits of the x86 flags register as subregisters 2017-04-26 13:52:52 +00:00
r386num.inc * fix flag subregs after r38206 2018-03-11 20:30:11 +00:00
r386ot.inc + added individual bits of the x86 flags register as subregisters 2017-04-26 13:52:52 +00:00
r386rni.inc + added individual bits of the x86 flags register as subregisters 2017-04-26 13:52:52 +00:00
r386sri.inc + added individual bits of the x86 flags register as subregisters 2017-04-26 13:52:52 +00:00
r386stab.inc + added individual bits of the x86 flags register as subregisters 2017-04-26 13:52:52 +00:00
r386std.inc + added individual bits of the x86 flags register as subregisters 2017-04-26 13:52:52 +00:00
ra386att.pas
ra386int.pas
rgcpu.pas
symcpu.pas * when creating wrappers, add a prefix to parameter names to prevent them 2018-12-24 22:10:06 +00:00