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124 lines
4.0 KiB
ObjectPascal
124 lines
4.0 KiB
ObjectPascal
{
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Copyright (c) 2014 Jonas Maebe
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Generate LLVM IR for math nodes
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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unit nllvmmat;
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{$i fpcdefs.inc}
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interface
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uses
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symtype,
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node, nmat, ncgmat, ncghlmat, cgbase;
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type
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tllvmmoddivnode = class(tcgmoddivnode)
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procedure pass_generate_code; override;
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end;
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Tllvmunaryminusnode = class(tcgunaryminusnode)
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procedure emit_float_sign_change(r: tregister; _size : tdef);override;
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end;
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tllvmnotnode = class(tcghlnotnode)
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end;
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implementation
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uses
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globtype, systems,
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cutils, verbose, globals,
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symconst, symdef,
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aasmbase, aasmllvm, aasmtai, aasmdata,
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defutil,
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procinfo,
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hlcgobj, pass_2,
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ncon,
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llvmbase,
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ncgutil, cgutils;
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{*****************************************************************************
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tllvmmoddivnode
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*****************************************************************************}
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procedure tllvmmoddivnode.pass_generate_code;
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var
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op: tllvmop;
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begin
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secondpass(left);
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secondpass(right);
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if is_signed(left.resultdef) then
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if nodetype=divn then
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op:=la_sdiv
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else
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op:=la_srem
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else if nodetype=divn then
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op:=la_udiv
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else
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op:=la_urem;
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hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,resultdef,true);
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if right.location.loc<>LOC_CONSTANT then
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hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,resultdef,true);
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location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
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location.register:=hlcg.getintregister(current_asmdata.CurrAsmList,resultdef);
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if right.location.loc=LOC_CONSTANT then
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current_asmdata.CurrAsmList.concat(taillvm.op_reg_size_reg_const(op,location.register,resultdef,left.location.register,right.location.value))
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else
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current_asmdata.CurrAsmList.concat(taillvm.op_reg_size_reg_reg(op,location.register,resultdef,left.location.register,right.location.register))
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end;
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{*****************************************************************************
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Tllvmunaryminusnode
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*****************************************************************************}
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procedure Tllvmunaryminusnode.emit_float_sign_change(r: tregister; _size : tdef);
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var
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zeroreg: tregister;
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begin
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if _size.typ<>floatdef then
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internalerror(2014012212);
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zeroreg:=hlcg.getfpuregister(current_asmdata.CurrAsmList,_size);
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case tfloatdef(_size).floattype of
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s32real,s64real:
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current_asmdata.CurrAsmList.concat(taillvm.op_reg_size_fpconst_size(la_bitcast,zeroreg,_size,0,_size));
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{ comp and currency are handled as int64 at the llvm level }
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s64comp,
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s64currency:
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{ sc80floattype instead of _size, see comment in thlcgllvm.a_loadfpu_ref_reg }
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current_asmdata.CurrAsmList.concat(taillvm.op_reg_size_const_size(la_sitofp,zeroreg,s64inttype,0,sc80floattype));
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{$ifdef cpuextended}
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s80real,sc80real:
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current_asmdata.CurrAsmList.concat(taillvm.op_reg_size_fpconst80_size(la_bitcast,zeroreg,_size,0.0,_size));
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{$endif cpuextended}
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end;
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current_asmdata.CurrAsmList.Concat(taillvm.op_reg_size_reg_reg(la_fsub,r,_size,zeroreg,r));
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end;
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begin
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cmoddivnode := tllvmmoddivnode;
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(*
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cshlshrnode := tllvmshlshrnode;
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*)
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cnotnode := tllvmnotnode;
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cunaryminusnode := Tllvmunaryminusnode;
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end.
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