fpc/compiler/x86
Jonas Maebe 5ef93e85b8 + added extra "orgsupreg" parameter to do_spill_read/do_spill_written/
do_spill_replace routines, will be necessary by llvm register
    allocator to determine the tdef corresponding to that register
  * replaced uses of taicpu with tai_cpu_abstract_sym in the register
    allocator so that it can work both with taicpu and taillvm instructions

git-svn-id: branches/hlcgllvm@26043 -
2013-11-11 11:15:43 +00:00
..
aasmcpu.pas + LLVM temp allocator based on new R_TEMPREGISTER register class. For every 2013-11-11 11:14:59 +00:00
agx86att.pas
agx86int.pas
agx86nsm.pas * put the i8086-msdos dwarf debug sections in USE32 class=DWARF segments because 2013-10-27 20:28:43 +00:00
cga.pas
cgx86.pas * fixed tcgx86.a_op_const_ref for shl/shr/sar/rol/ror on i8086 and x86_64 2013-11-10 20:39:47 +00:00
cpubase.pas + handle 32 bit references on x86-64 so lea can be used for 32 bit arithmetics 2013-11-01 19:01:39 +00:00
hlcgx86.pas
itcpugas.pas
itx86int.pas
nx86add.pas * make use of lea if possible 2013-11-01 19:01:11 +00:00
nx86cal.pas
nx86cnv.pas
nx86con.pas
nx86inl.pas * Mantis #17273: don't generate x87 instructions on win64 target. 2013-11-08 13:31:07 +00:00
nx86mat.pas
nx86mem.pas
nx86set.pas * tx86casenode.genjumptable: explicitly emit near pointers in the case jump table on i8086, regardless of the memory model 2013-09-16 19:58:45 +00:00
rax86.pas
rax86att.pas
rax86int.pas * convert i8086 inline asm instruction 'call symbol' to 'call far symbol' in memory models with far code 2013-09-08 16:34:12 +00:00
rgx86.pas + added extra "orgsupreg" parameter to do_spill_read/do_spill_written/ 2013-11-11 11:15:43 +00:00
x86ins.dat + handle 32 bit references on x86-64 so lea can be used for 32 bit arithmetics 2013-11-01 19:01:39 +00:00
x86reg.dat * x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files. 2013-10-03 08:08:04 +00:00