| .. |
|
aasmcpu.pas
|
* fix case completeness and unreachable code warnings in compiler that would
|
2019-05-12 14:29:03 +00:00 |
|
aoptcpu.pas
|
o patch by J. Gareth Moreton:
|
2019-11-20 22:12:26 +00:00 |
|
aoptcpub.pas
|
- get rid of MaxOps, it is redundant with max_operands
|
2018-11-02 21:32:29 +00:00 |
|
aoptcpud.pas
|
|
|
|
cgcpu.pas
|
* renamed getintparaloc to getcgtempparaloc
|
2019-12-24 22:12:25 +00:00 |
|
cpubase.pas
|
* patch by J. Gareth Moreton, issue #36271, part 3: support for the other architectures
|
2019-11-10 16:11:40 +00:00 |
|
cpuelf.pas
|
* fix case completeness and unreachable code warnings in compiler that would
|
2019-05-12 14:29:03 +00:00 |
|
cpugas.pas
|
+ introduced labelmaxlen in tasminfo and added code in ReplaceForbiddenAsmSymbolChars that limits the
|
2020-04-25 12:59:25 +00:00 |
|
cpuinfo.pas
|
* disable cs_opt_regvar on all platforms when compiled for LLVM (LLVM does
|
2020-01-29 22:21:07 +00:00 |
|
cpunode.pas
|
* automatically generate necessary indirect symbols when a new assembler
|
2016-07-20 20:53:03 +00:00 |
|
cpupara.pas
|
* disable regular array -> dynamic array type coversion support unless
|
2019-05-25 12:31:32 +00:00 |
|
cpupi.pas
|
+ MIPS: take care of setnoat
|
2019-11-09 21:58:30 +00:00 |
|
cputarg.pas
|
|
|
|
hlcgcpu.pas
|
* on Mach-O, PECOFF and ELF platforms, write local symbols as hidden/
|
2019-07-07 21:33:43 +00:00 |
|
itcpugas.pas
|
* fix case completeness and unreachable code warnings in compiler that would
|
2019-05-12 14:29:03 +00:00 |
|
mipsreg.dat
|
|
|
|
ncpuadd.pas
|
* factored out the conditions under which add nodes need to perform
|
2019-08-03 12:19:50 +00:00 |
|
ncpucall.pas
|
* use pocalls_cdecl and cstylearrayofconst more consistently instead of
|
2017-02-25 11:46:35 +00:00 |
|
ncpucnv.pas
|
|
|
|
ncpuinln.pas
|
|
|
|
ncpuld.pas
|
* fix case completeness and unreachable code warnings in compiler that would
|
2019-05-12 14:29:03 +00:00 |
|
ncpumat.pas
|
|
|
|
ncpuset.pas
|
* let all the case code generation work with tconstexprint instead of aint,
|
2019-02-24 19:58:37 +00:00 |
|
opcode.inc
|
+ MIPS: added movn and movz instructions.
|
2014-06-19 22:44:17 +00:00 |
|
racpugas.pas
|
* read more types of references properly
|
2019-11-09 21:58:31 +00:00 |
|
rgcpu.pas
|
* keep track of the temp position separately from the offset in references,
|
2018-04-22 17:03:16 +00:00 |
|
rmipscon.inc
|
* MIPS: changed superregister number for $fcc0..$fcc7 to start from 32, so that range 0..31 can be used without translating into symbolic names.
|
2014-06-22 22:01:44 +00:00 |
|
rmipsdwf.inc
|
|
|
|
rmipsgas.inc
|
* MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7).
|
2014-06-17 23:15:34 +00:00 |
|
rmipsgri.inc
|
* MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7).
|
2014-06-17 23:15:34 +00:00 |
|
rmipsgss.inc
|
|
|
|
rmipsnor.inc
|
|
|
|
rmipsnum.inc
|
|
|
|
rmipsrni.inc
|
|
|
|
rmipssri.inc
|
* MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7).
|
2014-06-17 23:15:34 +00:00 |
|
rmipssta.inc
|
|
|
|
rmipsstd.inc
|
|
|
|
rmipssup.inc
|
* MIPS: changed superregister number for $fcc0..$fcc7 to start from 32, so that range 0..31 can be used without translating into symbolic names.
|
2014-06-22 22:01:44 +00:00 |
|
strinst.inc
|
|
|
|
symcpu.pas
|
o fixes handling of iso i/o parameters/program parameters:
|
2015-05-01 20:58:31 +00:00 |
