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			555 lines
		
	
	
		
			18 KiB
		
	
	
	
		
			ObjectPascal
		
	
	
	
	
	
			
		
		
	
	
			555 lines
		
	
	
		
			18 KiB
		
	
	
	
		
			ObjectPascal
		
	
	
	
	
	
{
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						|
    $Id$
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    Copyright (c) 2000 by Florian Klaempfl
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    Type checking and register allocation for math nodes
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    This program is free software; you can redistribute it and/or modify
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						|
    it under the terms of the GNU General Public License as published by
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						|
    the Free Software Foundation; either version 2 of the License, or
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    (at your option) any later version.
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    This program is distributed in the hope that it will be useful,
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    but WITHOUT ANY WARRANTY; without even the implied warranty of
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    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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    GNU General Public License for more details.
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						|
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    You should have received a copy of the GNU General Public License
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						|
    along with this program; if not, write to the Free Software
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						|
    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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						|
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						|
 ****************************************************************************
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						|
}
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						|
unit nmat;
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						|
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{$i defines.inc}
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interface
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						|
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    uses
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						|
       node;
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						|
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						|
    type
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       tmoddivnode = class(tbinopnode)
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						|
          function pass_1 : tnode;override;
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						|
       end;
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						|
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						|
       tshlshrnode = class(tbinopnode)
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          function pass_1 : tnode;override;
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						|
       end;
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						|
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       tunaryminusnode = class(tunarynode)
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         constructor create(expr : tnode);virtual;
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          function pass_1 : tnode;override;
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						|
       end;
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						|
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       tnotnode = class(tunarynode)
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          constructor create(expr : tnode);virtual;
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          function pass_1 : tnode;override;
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       end;
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    var
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       cmoddivnode : class of tmoddivnode;
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       cshlshrnode : class of tshlshrnode;
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       cunaryminusnode : class of tunaryminusnode;
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       cnotnode : class of tnotnode;
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implementation
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						|
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    uses
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      globtype,systems,tokens,
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      cobjects,verbose,globals,
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      symconst,symtype,symtable,symdef,aasm,types,
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      htypechk,pass_1,cpubase,cpuinfo,
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						|
{$ifdef newcg}
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      cgbase,
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{$else newcg}
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      hcodegen,
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						|
{$endif newcg}
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      { for isbinaryoverloaded function }
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      nadd,
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      ncon,ncnv,ncal;
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						|
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{****************************************************************************
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                              TMODDIVNODE
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 ****************************************************************************}
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    function tmoddivnode.pass_1 : tnode;
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      var
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         t : tnode;
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         rv,lv : tconstexprint;
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         rd,ld : pdef;
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						|
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      begin
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         pass_1:=nil;
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         firstpass(left);
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						|
         set_varstate(right,true);
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						|
         firstpass(right);
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						|
         set_varstate(right,true);
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						|
         if codegenerror then
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           exit;
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						|
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         t:=self;
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						|
         if isbinaryoverloaded(t) then
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           begin
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              pass_1:=t;
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              exit;
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           end;
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						|
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         { check for division by zero }
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						|
         rv:=tordconstnode(right).value;
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						|
         lv:=tordconstnode(left).value;
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						|
         if is_constintnode(right) and (rv=0) then
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          begin
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            Message(parser_e_division_by_zero);
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						|
            { recover }
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            rv:=1;
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          end;
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         if is_constintnode(left) and is_constintnode(right) then
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           begin
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              case nodetype of
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                modn:
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                  t:=genintconstnode(lv mod rv);
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                divn:
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                  t:=genintconstnode(lv div rv);
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              end;
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              firstpass(t);
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              pass_1:=t;
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              exit;
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           end;
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         if (left.resulttype^.deftype=orddef) and (right.resulttype^.deftype=orddef) and
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            (is_64bitint(left.resulttype) or is_64bitint(right.resulttype)) then
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           begin
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              rd:=right.resulttype;
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              ld:=left.resulttype;
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              if (porddef(rd)^.typ=s64bit) or (porddef(ld)^.typ=s64bit) then
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                begin
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						|
                   if (porddef(ld)^.typ<>s64bit) then
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                     begin
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                       left:=gentypeconvnode(left,cs64bitdef);
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                       firstpass(left);
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                     end;
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                   if (porddef(rd)^.typ<>s64bit) then
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                     begin
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						|
                        right:=gentypeconvnode(right,cs64bitdef);
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                        firstpass(right);
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                     end;
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                   calcregisters(self,2,0,0);
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                end
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              else if (porddef(rd)^.typ=u64bit) or (porddef(ld)^.typ=u64bit) then
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                begin
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                   if (porddef(ld)^.typ<>u64bit) then
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                     begin
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                       left:=gentypeconvnode(left,cu64bitdef);
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                       firstpass(left);
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                     end;
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                   if (porddef(rd)^.typ<>u64bit) then
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                     begin
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                        right:=gentypeconvnode(right,cu64bitdef);
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                        firstpass(right);
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                     end;
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                   calcregisters(self,2,0,0);
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                end;
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              resulttype:=left.resulttype;
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           end
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         else
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           begin
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              if not(right.resulttype^.deftype=orddef) or
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                not(porddef(right.resulttype)^.typ in [s32bit,u32bit]) then
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                right:=gentypeconvnode(right,s32bitdef);
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              if not(left.resulttype^.deftype=orddef) or
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                not(porddef(left.resulttype)^.typ in [s32bit,u32bit]) then
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                left:=gentypeconvnode(left,s32bitdef);
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              firstpass(left);
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              firstpass(right);
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{$ifdef cardinalmulfix}
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{ if we divide a u32bit by a positive constant, the result is also u32bit (JM) }
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              if (left.resulttype^.deftype = orddef) and
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                 (left.resulttype^.deftype = orddef) then
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                begin
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                  if (porddef(left.resulttype)^.typ = u32bit) and
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                     is_constintnode(right) and
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{                     (porddef(right.resulttype)^.typ <> u32bit) and}
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                     (right.value > 0) then
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                    begin
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                      right := gentypeconvnode(right,u32bitdef);
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                      firstpass(right);
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                    end;
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{ adjust also the left resulttype if necessary }
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                  if (porddef(right.resulttype)^.typ = u32bit) and
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                     is_constintnode(left) and
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    {                 (porddef(left.resulttype)^.typ <> u32bit) and}
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                     (left.value > 0) then
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                    begin
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                      left := gentypeconvnode(left,u32bitdef);
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                      firstpass(left);
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                    end;
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                end;
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{$endif cardinalmulfix}
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              { the resulttype depends on the right side, because the left becomes }
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              { always 64 bit                                                      }
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              resulttype:=right.resulttype;
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						|
              if codegenerror then
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                exit;
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              left_right_max;
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						|
              if left.registers32<=right.registers32 then
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                inc(registers32);
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           end;
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         location.loc:=LOC_REGISTER;
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      end;
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{****************************************************************************
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                              TSHLSHRNODE
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 ****************************************************************************}
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    function tshlshrnode.pass_1 : tnode;
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      var
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						|
         t : tnode;
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         regs : longint;
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						|
      begin
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						|
         pass_1:=nil;
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         firstpass(left);
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						|
         set_varstate(left,true);
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						|
         firstpass(right);
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						|
         set_varstate(right,true);
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						|
         if codegenerror then
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						|
           exit;
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         t:=self;
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						|
         if isbinaryoverloaded(t) then
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						|
           begin
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						|
              pass_1:=t;
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              exit;
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						|
           end;
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         if is_constintnode(left) and is_constintnode(right) then
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           begin
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              case nodetype of
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                 shrn:
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                   t:=genintconstnode(tordconstnode(left).value shr tordconstnode(right).value);
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                 shln:
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                   t:=genintconstnode(tordconstnode(left).value shl tordconstnode(right).value);
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              end;
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              firstpass(t);
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              pass_1:=t;
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              exit;
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           end;
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         { 64 bit ints have their own shift handling }
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						|
         if not(is_64bitint(left.resulttype)) then
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           begin
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              left:=gentypeconvnode(left,s32bitdef);
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						|
              firstpass(left);
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              regs:=1;
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              resulttype:=s32bitdef;
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           end
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         else
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           begin
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              resulttype:=left.resulttype;
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              regs:=2;
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           end;
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         right:=gentypeconvnode(right,s32bitdef);
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         firstpass(right);
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						|
         if codegenerror then
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						|
           exit;
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						|
         if (right.nodetype<>ordconstn) then
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          inc(regs);
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         calcregisters(self,regs,0,0);
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         location.loc:=LOC_REGISTER;
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      end;
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{****************************************************************************
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                            TUNARYMINUSNODE
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 ****************************************************************************}
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    constructor tunaryminusnode.create(expr : tnode);
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      begin
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         inherited create(unaryminusn,expr);
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      end;
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   function tunaryminusnode.pass_1 : tnode;
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      var
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         t : tnode;
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         minusdef : pprocdef;
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      begin
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						|
         pass_1:=nil;
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         firstpass(left);
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						|
         set_varstate(left,true);
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         registers32:=left.registers32;
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						|
         registersfpu:=left.registersfpu;
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						|
{$ifdef SUPPORT_MMX}
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         registersmmx:=left.registersmmx;
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						|
{$endif SUPPORT_MMX}
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						|
         resulttype:=left.resulttype;
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						|
         if codegenerror then
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						|
           exit;
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						|
         if is_constintnode(left) then
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						|
           begin
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						|
              t:=genintconstnode(-tordconstnode(left).value);
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						|
              firstpass(t);
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              pass_1:=t;
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						|
              exit;
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						|
           end;
 | 
						|
           { nasm can not cope with negativ reals !! }
 | 
						|
         if is_constrealnode(left)
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{$ifdef i386}
 | 
						|
           and not(aktoutputformat in [as_i386_nasmcoff,as_i386_nasmelf,as_i386_nasmobj])
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						|
{$endif i386}
 | 
						|
             then
 | 
						|
           begin
 | 
						|
              t:=genrealconstnode(-trealconstnode(left).value_real,bestrealdef^);
 | 
						|
              firstpass(t);
 | 
						|
              pass_1:=t;
 | 
						|
              exit;
 | 
						|
           end;
 | 
						|
         if (left.resulttype^.deftype=floatdef) then
 | 
						|
           begin
 | 
						|
              if pfloatdef(left.resulttype)^.typ=f32bit then
 | 
						|
                begin
 | 
						|
                   if (left.location.loc<>LOC_REGISTER) and
 | 
						|
                     (registers32<1) then
 | 
						|
                     registers32:=1;
 | 
						|
                   location.loc:=LOC_REGISTER;
 | 
						|
                end
 | 
						|
              else
 | 
						|
                location.loc:=LOC_FPU;
 | 
						|
           end
 | 
						|
{$ifdef SUPPORT_MMX}
 | 
						|
         else if (cs_mmx in aktlocalswitches) and
 | 
						|
           is_mmx_able_array(left.resulttype) then
 | 
						|
             begin
 | 
						|
               if (left.location.loc<>LOC_MMXREGISTER) and
 | 
						|
                 (registersmmx<1) then
 | 
						|
                 registersmmx:=1;
 | 
						|
               { if saturation is on, left.resulttype isn't
 | 
						|
                 "mmx able" (FK)
 | 
						|
               if (cs_mmx_saturation in aktlocalswitches^) and
 | 
						|
                 (porddef(parraydef(resulttype)^.definition)^.typ in
 | 
						|
                 [s32bit,u32bit]) then
 | 
						|
                 CGMessage(type_e_mismatch);
 | 
						|
               }
 | 
						|
             end
 | 
						|
{$endif SUPPORT_MMX}
 | 
						|
         else if is_64bitint(left.resulttype) then
 | 
						|
           begin
 | 
						|
              firstpass(left);
 | 
						|
              registersfpu:=left.registersfpu;
 | 
						|
{$ifdef SUPPORT_MMX}
 | 
						|
              registersmmx:=left.registersmmx;
 | 
						|
{$endif SUPPORT_MMX}
 | 
						|
              registers32:=left.registers32;
 | 
						|
              if codegenerror then
 | 
						|
                exit;
 | 
						|
              if (left.location.loc<>LOC_REGISTER) and
 | 
						|
                (registers32<2) then
 | 
						|
              registers32:=2;
 | 
						|
              location.loc:=LOC_REGISTER;
 | 
						|
              resulttype:=left.resulttype;
 | 
						|
           end
 | 
						|
         else if (left.resulttype^.deftype=orddef) then
 | 
						|
           begin
 | 
						|
              left:=gentypeconvnode(left,s32bitdef);
 | 
						|
              firstpass(left);
 | 
						|
              registersfpu:=left.registersfpu;
 | 
						|
{$ifdef SUPPORT_MMX}
 | 
						|
              registersmmx:=left.registersmmx;
 | 
						|
{$endif SUPPORT_MMX}
 | 
						|
              registers32:=left.registers32;
 | 
						|
              if codegenerror then
 | 
						|
                exit;
 | 
						|
              if (left.location.loc<>LOC_REGISTER) and
 | 
						|
                (registers32<1) then
 | 
						|
              registers32:=1;
 | 
						|
              location.loc:=LOC_REGISTER;
 | 
						|
              resulttype:=left.resulttype;
 | 
						|
           end
 | 
						|
         else
 | 
						|
           begin
 | 
						|
              if assigned(overloaded_operators[_minus]) then
 | 
						|
                minusdef:=overloaded_operators[_minus]^.definition
 | 
						|
              else
 | 
						|
                minusdef:=nil;
 | 
						|
              while assigned(minusdef) do
 | 
						|
                begin
 | 
						|
                   if is_equal(pparaitem(minusdef^.para^.first)^.paratype.def,left.resulttype) and
 | 
						|
                      (pparaitem(minusdef^.para^.first)^.next=nil) then
 | 
						|
                     begin
 | 
						|
                        t:=gencallnode(overloaded_operators[_minus],nil);
 | 
						|
                        tcallnode(t).left:=gencallparanode(left,nil);
 | 
						|
                        left:=nil;
 | 
						|
                        firstpass(t);
 | 
						|
                        pass_1:=t;
 | 
						|
                        exit;
 | 
						|
                     end;
 | 
						|
                   minusdef:=minusdef^.nextoverloaded;
 | 
						|
                end;
 | 
						|
              CGMessage(type_e_mismatch);
 | 
						|
           end;
 | 
						|
      end;
 | 
						|
 | 
						|
 | 
						|
{****************************************************************************
 | 
						|
                               TNOTNODE
 | 
						|
 ****************************************************************************}
 | 
						|
 | 
						|
    constructor tnotnode.create(expr : tnode);
 | 
						|
 | 
						|
      begin
 | 
						|
         inherited create(notn,expr);
 | 
						|
      end;
 | 
						|
 | 
						|
    function tnotnode.pass_1 : tnode;
 | 
						|
      var
 | 
						|
         t : tnode;
 | 
						|
         notdef : pprocdef;
 | 
						|
      begin
 | 
						|
         pass_1:=nil;
 | 
						|
         firstpass(left);
 | 
						|
         set_varstate(left,true);
 | 
						|
         if codegenerror then
 | 
						|
           exit;
 | 
						|
 | 
						|
         if (left.nodetype=ordconstn) then
 | 
						|
           begin
 | 
						|
              if is_boolean(left.resulttype) then
 | 
						|
                { here we do a boolena(byte(..)) type cast because }
 | 
						|
                { boolean(<int64>) is buggy in 1.00                }
 | 
						|
                t:=genordinalconstnode(byte(not(boolean(byte(tordconstnode(left).value)))),left.resulttype)
 | 
						|
              else
 | 
						|
                t:=genordinalconstnode(not(tordconstnode(left).value),left.resulttype);
 | 
						|
              firstpass(t);
 | 
						|
              pass_1:=t;
 | 
						|
              exit;
 | 
						|
           end;
 | 
						|
         resulttype:=left.resulttype;
 | 
						|
         location.loc:=left.location.loc;
 | 
						|
{$ifdef SUPPORT_MMX}
 | 
						|
         registersmmx:=left.registersmmx;
 | 
						|
{$endif SUPPORT_MMX}
 | 
						|
         if is_boolean(resulttype) then
 | 
						|
           begin
 | 
						|
             registers32:=left.registers32;
 | 
						|
             if (location.loc in [LOC_REFERENCE,LOC_MEM,LOC_CREGISTER]) then
 | 
						|
              begin
 | 
						|
                location.loc:=LOC_REGISTER;
 | 
						|
                if (registers32<1) then
 | 
						|
                 registers32:=1;
 | 
						|
              end;
 | 
						|
            { before loading it into flags we need to load it into
 | 
						|
              a register thus 1 register is need PM }
 | 
						|
{$ifdef i386}
 | 
						|
             if left.location.loc<>LOC_JUMP then
 | 
						|
               location.loc:=LOC_FLAGS;
 | 
						|
{$endif def i386}
 | 
						|
           end
 | 
						|
         else
 | 
						|
{$ifdef SUPPORT_MMX}
 | 
						|
           if (cs_mmx in aktlocalswitches) and
 | 
						|
             is_mmx_able_array(left.resulttype) then
 | 
						|
             begin
 | 
						|
               if (left.location.loc<>LOC_MMXREGISTER) and
 | 
						|
                 (registersmmx<1) then
 | 
						|
                 registersmmx:=1;
 | 
						|
             end
 | 
						|
         else
 | 
						|
{$endif SUPPORT_MMX}
 | 
						|
           if is_64bitint(left.resulttype) then
 | 
						|
             begin
 | 
						|
                registers32:=left.registers32;
 | 
						|
                if (location.loc in [LOC_REFERENCE,LOC_MEM,LOC_CREGISTER]) then
 | 
						|
                 begin
 | 
						|
                   location.loc:=LOC_REGISTER;
 | 
						|
                   if (registers32<2) then
 | 
						|
                    registers32:=2;
 | 
						|
                 end;
 | 
						|
             end
 | 
						|
         else if is_integer(left.resulttype) then
 | 
						|
           begin
 | 
						|
              left:=gentypeconvnode(left,s32bitdef);
 | 
						|
              firstpass(left);
 | 
						|
              if codegenerror then
 | 
						|
                exit;
 | 
						|
 | 
						|
              resulttype:=left.resulttype;
 | 
						|
              registers32:=left.registers32;
 | 
						|
{$ifdef SUPPORT_MMX}
 | 
						|
              registersmmx:=left.registersmmx;
 | 
						|
{$endif SUPPORT_MMX}
 | 
						|
 | 
						|
              if (left.location.loc<>LOC_REGISTER) and
 | 
						|
                 (registers32<1) then
 | 
						|
                registers32:=1;
 | 
						|
              location.loc:=LOC_REGISTER;
 | 
						|
           end
 | 
						|
         else
 | 
						|
           begin
 | 
						|
              if assigned(overloaded_operators[_op_not]) then
 | 
						|
                notdef:=overloaded_operators[_op_not]^.definition
 | 
						|
              else
 | 
						|
                notdef:=nil;
 | 
						|
              while assigned(notdef) do
 | 
						|
                begin
 | 
						|
                   if is_equal(pparaitem(notdef^.para^.first)^.paratype.def,left.resulttype) and
 | 
						|
                      (pparaitem(notdef^.para^.first)^.next=nil) then
 | 
						|
                     begin
 | 
						|
                        t:=gencallnode(overloaded_operators[_op_not],nil);
 | 
						|
                        tcallnode(t).left:=gencallparanode(left,nil);
 | 
						|
                        left:=nil;
 | 
						|
                        firstpass(t);
 | 
						|
                        pass_1:=t;
 | 
						|
                        exit;
 | 
						|
                     end;
 | 
						|
                   notdef:=notdef^.nextoverloaded;
 | 
						|
                end;
 | 
						|
              CGMessage(type_e_mismatch);
 | 
						|
           end;
 | 
						|
 | 
						|
         registersfpu:=left.registersfpu;
 | 
						|
      end;
 | 
						|
 | 
						|
 | 
						|
begin
 | 
						|
   cmoddivnode:=tmoddivnode;
 | 
						|
   cshlshrnode:=tshlshrnode;
 | 
						|
   cunaryminusnode:=tunaryminusnode;
 | 
						|
   cnotnode:=tnotnode;
 | 
						|
end.
 | 
						|
{
 | 
						|
  $Log$
 | 
						|
  Revision 1.8  2000-10-31 22:02:49  peter
 | 
						|
    * symtable splitted, no real code changes
 | 
						|
 | 
						|
  Revision 1.7  2000/10/01 19:48:24  peter
 | 
						|
    * lot of compile updates for cg11
 | 
						|
 | 
						|
  Revision 1.6  2000/09/27 21:33:22  florian
 | 
						|
    * finally nadd.pas compiles
 | 
						|
 | 
						|
  Revision 1.5  2000/09/27 20:25:44  florian
 | 
						|
    * more stuff fixed
 | 
						|
 | 
						|
  Revision 1.4  2000/09/24 15:06:19  peter
 | 
						|
    * use defines.inc
 | 
						|
 | 
						|
  Revision 1.3  2000/09/22 22:48:54  florian
 | 
						|
    * some fixes
 | 
						|
 | 
						|
  Revision 1.2  2000/09/22 22:09:54  florian
 | 
						|
    * more stuff converted
 | 
						|
 | 
						|
  Revision 1.1  2000/09/20 21:35:12  florian
 | 
						|
    * initial revision
 | 
						|
} |