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https://gitlab.com/freepascal.org/fpc/source.git
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414 lines
17 KiB
ObjectPascal
414 lines
17 KiB
ObjectPascal
{
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Copyright (c) 1998-2002 by Florian Klaempfl
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Generate i8086 inline nodes
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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unit n8086inl;
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{$i fpcdefs.inc}
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interface
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uses
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nx86inl,node;
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type
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{ ti8086inlinenode }
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ti8086inlinenode = class(tx86inlinenode)
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function pass_typecheck_cpu: tnode; override;
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function typecheck_faraddr: tnode;
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function typecheck_seg: tnode; override;
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function first_seg: tnode; override;
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procedure second_seg; override;
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procedure second_get_frame;override;
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function first_IncDec: tnode;override;
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procedure second_incdec;override;
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procedure second_abs_long;override;
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end;
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implementation
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uses
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ninl,
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systems,
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globtype,globals,
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cutils,verbose,compinnr,
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constexp,
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symconst,
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defutil,
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aasmbase,aasmtai,aasmdata,aasmcpu,
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symtype,symdef,symsym,symcpu,
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cgbase,pass_1,pass_2,
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cpuinfo,cpubase,paramgr,
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nbas,nadd,ncon,ncal,ncnv,nld,nmem,nmat,ncgutil,
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tgobj,
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cga,cgutils,cgx86,cgobj,hlcgobj,
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htypechk,procinfo;
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function ti8086inlinenode.pass_typecheck_cpu: tnode;
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begin
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case inlinenumber of
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in_faraddr_x:
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result:=typecheck_faraddr;
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else
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inherited;
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end;
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end;
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function ti8086inlinenode.typecheck_faraddr: tnode;
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var
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addr_node: tnode;
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addr_node_resultdef: tdef;
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seg_node: tnode;
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begin
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addr_node:=caddrnode.create(left);
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typecheckpass(addr_node);
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addr_node_resultdef:=addr_node.resultdef;
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if is_farpointer(addr_node.resultdef) or is_farprocvar(addr_node.resultdef) then
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begin
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left:=nil;
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result:=addr_node;
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end
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else
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begin
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seg_node:=geninlinenode(in_seg_x,false,left.getcopy);
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inserttypeconv_internal(seg_node,u32inttype);
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seg_node:=cshlshrnode.create(shln,seg_node,cordconstnode.create(16,u8inttype,false));
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inserttypeconv_internal(addr_node,u32inttype);
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left:=nil;
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result:=caddnode.create(addn,seg_node,addr_node);
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if addr_node_resultdef.typ=pointerdef then
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inserttypeconv_internal(result,tcpupointerdef.getreusablex86(tpointerdef(addr_node_resultdef).pointeddef,x86pt_far))
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else
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inserttypeconv_internal(result,voidfarpointertype);
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end;
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end;
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function ti8086inlinenode.typecheck_seg: tnode;
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var
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isprocvar: Boolean;
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procpointertype: tdef;
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hsym: tfieldvarsym;
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begin
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result := nil;
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resultdef:=u16inttype;
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{ don't allow constants }
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if is_constnode(left) then
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begin
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CGMessagePos(left.fileinfo,type_e_no_addr_of_constant);
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exit;
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end;
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{ Handle Seg(proc) special, also Seg(procvar) in tp-mode needs
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special handling }
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if (left.resultdef.typ=procdef) or
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(
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{ in case of nf_internal, follow the normal FPC semantics so that
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we can easily get the actual address of a procvar }
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not(nf_internal in flags) and
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(left.resultdef.typ=procvardef) and
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((m_tp_procvar in current_settings.modeswitches) or
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(m_mac_procvar in current_settings.modeswitches))
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) then
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begin
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isprocvar:=(left.resultdef.typ=procvardef);
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if not isprocvar then
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begin
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if current_settings.x86memorymodel in x86_far_code_models then
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begin
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left:=ctypeconvnode.create_proc_to_procvar(left);
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left.fileinfo:=fileinfo;
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typecheckpass(left);
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end
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else
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exit;
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end;
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{ In tp procvar mode for methodpointers we need to load the proc field }
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if (m_tp_procvar in current_settings.modeswitches) or
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(m_mac_procvar in current_settings.modeswitches) then
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begin
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if not tabstractprocdef(left.resultdef).is_addressonly then
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begin
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{ For procvars and for nested routines we need to return
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the proc field of the methodpointer }
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if isprocvar or
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is_nested_pd(tabstractprocdef(left.resultdef)) then
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begin
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if tabstractprocdef(left.resultdef).is_methodpointer then
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procpointertype:=methodpointertype
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else
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procpointertype:=nestedprocpointertype;
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{ find proc field in methodpointer record }
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hsym:=tfieldvarsym(trecorddef(procpointertype).symtable.Find('proc'));
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if not assigned(hsym) then
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internalerror(200412041);
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{ Load tmehodpointer(left).proc }
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result:=csubscriptnode.create(
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hsym,
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ctypeconvnode.create_internal(left,procpointertype));
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left:=nil;
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end
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else
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CGMessage(type_e_variable_id_expected);
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end;
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end;
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(* else
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begin
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{ Return the typeconvn only }
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result:=left;
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left:=nil;
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end;*)
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end;
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end;
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function ti8086inlinenode.first_seg: tnode;
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begin
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expectloc:=LOC_REGISTER;
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result:=nil;
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end;
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procedure ti8086inlinenode.second_seg;
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var
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segref: treference;
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begin
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secondpass(left);
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if left.resultdef.typ=procvardef then
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begin
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if left.resultdef.size<>4 then
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internalerror(2017121302);
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case left.location.loc of
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LOC_REGISTER,LOC_CREGISTER:
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begin
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location_reset(location,LOC_REGISTER,OS_16);
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location.register:=cg.GetNextReg(left.location.register);
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end;
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LOC_CREFERENCE,LOC_REFERENCE:
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begin
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location_reset(location,LOC_REGISTER,OS_16);
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segref:=left.location.reference;
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inc(segref.offset,2);
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location.register:=cg.getintregister(current_asmdata.CurrAsmList,OS_16);
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current_asmdata.CurrAsmList.concat(Taicpu.op_ref_reg(A_MOV,S_W,segref,location.register));
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end;
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else
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internalerror(2017121301);
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end;
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end
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else
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begin
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if not(left.location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
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internalerror(2013040101);
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{ if a segment register is specified in ref, we use that }
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if left.location.reference.segment<>NR_NO then
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begin
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location_reset(location,LOC_REGISTER,OS_16);
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if is_segment_reg(left.location.reference.segment) then
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begin
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location.register:=cg.getintregister(current_asmdata.CurrAsmList,OS_16);
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current_asmdata.CurrAsmList.Concat(Taicpu.op_reg_reg(A_MOV,S_W,left.location.reference.segment,location.register));
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end
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else
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location.register:=left.location.reference.segment;
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end
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else
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begin
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location_reset(location,LOC_REGISTER,OS_16);
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location.register:=cg.getintregister(current_asmdata.CurrAsmList,OS_16);
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current_asmdata.CurrAsmList.concat(Taicpu.op_reg_reg(A_MOV,S_W,get_default_segment_of_ref(left.location.reference),location.register));
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end;
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end;
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end;
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procedure ti8086inlinenode.second_get_frame;
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begin
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if current_settings.x86memorymodel in x86_far_data_models then
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begin
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if current_procinfo.framepointer=NR_STACK_POINTER_REG then
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internalerror(2014030201);
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location_reset(location,LOC_REGISTER,OS_32);
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location.register:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
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emit_reg_reg(A_MOV,S_W,current_procinfo.framepointer,location.register);
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current_asmdata.CurrAsmList.Concat(Taicpu.op_reg_reg(A_MOV,S_W,NR_SS,cg.GetNextReg(location.register)));
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end
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else
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inherited second_get_frame;
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end;
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function ti8086inlinenode.first_IncDec: tnode;
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var
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procname:string;
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elesize: Tconstexprint;
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hp: tnode;
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begin
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if is_hugepointer(tcallparanode(left).left.resultdef) then
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begin
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case inlinenumber of
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in_inc_x:
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procname:='fpc_hugeptr_inc_longint';
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in_dec_x:
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procname:='fpc_hugeptr_dec_longint';
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else
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internalerror(2014121001);
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end;
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if cs_hugeptr_arithmetic_normalization in current_settings.localswitches then
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procname:=procname+'_normalized';
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if is_void(tpointerdef(tcallparanode(left).left.resultdef).pointeddef) then
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elesize:=1
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else
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elesize:=tpointerdef(tcallparanode(left).left.resultdef).pointeddef.size;
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hp := cordconstnode.create(elesize,s32inttype,false);
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{ extra parameter? }
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if assigned(tcallparanode(left).right) then
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hp:=caddnode.create(muln,hp,tcallparanode(tcallparanode(left).right).left.getcopy);
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result:=ccallnode.createintern(procname,
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ccallparanode.create(hp,
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ccallparanode.create(tcallparanode(left).left.getcopy,nil)));
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typecheckpass(result);
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firstpass(result);
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end
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else
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result:=inherited;
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end;
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procedure ti8086inlinenode.second_incdec;
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const
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addsubop:array[in_inc_x..in_dec_x] of TOpCG=(OP_ADD,OP_SUB);
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var
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addvalue : TConstExprInt;
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addconstant : boolean;
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hregister : tregister;
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tmploc: tlocation;
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begin
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if is_farpointer(tcallparanode(left).left.resultdef) then
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begin
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{ set defaults }
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addconstant:=true;
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hregister:=NR_NO;
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{ first secondpass second argument, because if the first arg }
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{ is used in that expression then SSL may move it to another }
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{ register }
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if assigned(tcallparanode(left).right) then
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secondpass(tcallparanode(tcallparanode(left).right).left);
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{ load first parameter, must be a reference }
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secondpass(tcallparanode(left).left);
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tmploc:=tcallparanode(left).left.location;
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tmploc.size:=OS_S16;
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{ get addvalue }
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case tcallparanode(left).left.resultdef.typ of
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pointerdef :
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begin
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if is_void(tpointerdef(tcallparanode(left).left.resultdef).pointeddef) then
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addvalue:=1
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else
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addvalue:=tpointerdef(tcallparanode(left).left.resultdef).pointeddef.size;
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end;
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else
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internalerror(10081);
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end;
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{ second_ argument specified?, must be a s16bit in register }
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if assigned(tcallparanode(left).right) then
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begin
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{ when constant, just multiply the addvalue }
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if is_constintnode(tcallparanode(tcallparanode(left).right).left) then
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addvalue:=addvalue*get_ordinal_value(tcallparanode(tcallparanode(left).right).left)
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else if is_constpointernode(tcallparanode(tcallparanode(left).right).left) then
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addvalue:=addvalue*tpointerconstnode(tcallparanode(tcallparanode(left).right).left).value
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else
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begin
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hlcg.location_force_reg(current_asmdata.CurrAsmList,tcallparanode(tcallparanode(left).right).left.location,tcallparanode(tcallparanode(left).right).left.resultdef,s16inttype,addvalue<=1);
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hregister:=tcallparanode(tcallparanode(left).right).left.location.register;
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{ insert multiply with addvalue if its >1 }
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if addvalue>1 then
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hlcg.a_op_const_reg(current_asmdata.CurrAsmList,OP_IMUL,s16inttype,addvalue.svalue,hregister);
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addconstant:=false;
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end;
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end;
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{ write the add instruction }
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if addconstant then
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begin
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hlcg.a_op_const_loc(current_asmdata.CurrAsmList,addsubop[inlinenumber],s16inttype,
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smallint(addvalue.svalue),
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tmploc);
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end
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else
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begin
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hlcg.a_op_reg_loc(current_asmdata.CurrAsmList,addsubop[inlinenumber],s16inttype,
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hregister,tmploc);
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end;
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end
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else
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inherited second_incdec;
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end;
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procedure ti8086inlinenode.second_abs_long;
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var
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opsize: TCgSize;
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begin
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opsize:=def_cgsize(left.resultdef);
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if opsize in [OS_64,OS_S64] then
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begin
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secondpass(left);
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hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,false);
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location:=left.location;
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location.register64.reglo:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
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location.register64.reghi:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
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cg64.a_load64_reg_reg(current_asmdata.CurrAsmList,left.location.register64,location.register64);
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cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_SAR,OS_16,15,cg.GetNextReg(left.location.register64.reghi));
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cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_XOR,OS_16,cg.GetNextReg(left.location.register64.reghi),location.register64.reglo);
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cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_XOR,OS_16,cg.GetNextReg(left.location.register64.reghi),cg.GetNextReg(location.register64.reglo));
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cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_XOR,OS_16,cg.GetNextReg(left.location.register64.reghi),location.register64.reghi);
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cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_XOR,OS_16,cg.GetNextReg(left.location.register64.reghi),cg.GetNextReg(location.register64.reghi));
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emit_reg_reg(A_SUB,S_W,cg.GetNextReg(left.location.register64.reghi),location.register64.reglo);
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emit_reg_reg(A_SBB,S_W,cg.GetNextReg(left.location.register64.reghi),cg.GetNextReg(location.register64.reglo));
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emit_reg_reg(A_SBB,S_W,cg.GetNextReg(left.location.register64.reghi),location.register64.reghi);
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emit_reg_reg(A_SBB,S_W,cg.GetNextReg(left.location.register64.reghi),cg.GetNextReg(location.register64.reghi));
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end
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else if opsize in [OS_32,OS_S32] then
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begin
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secondpass(left);
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hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,false);
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location:=left.location;
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location.register:=cg.getintregister(current_asmdata.CurrAsmList,opsize);
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cg.a_load_reg_reg(current_asmdata.CurrAsmList,opsize,opsize,left.location.register,location.register);
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cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_SAR,OS_16,15,cg.GetNextReg(left.location.register));
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cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_XOR,OS_16,cg.GetNextReg(left.location.register),location.register);
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cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_XOR,OS_16,cg.GetNextReg(left.location.register),cg.GetNextReg(location.register));
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emit_reg_reg(A_SUB,S_W,cg.GetNextReg(left.location.register),location.register);
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emit_reg_reg(A_SBB,S_W,cg.GetNextReg(left.location.register),cg.GetNextReg(location.register));
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end
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else
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inherited second_abs_long;
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end;
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begin
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cinlinenode:=ti8086inlinenode;
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end.
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