mirror of
https://gitlab.com/freepascal.org/fpc/source.git
synced 2025-05-18 01:02:35 +02:00

* unified darwin/i386 and darwin/x86_64 signal handling like for ppc32 and ppc64 * moved some common record definitions for all architectures to signal.inc git-svn-id: trunk@9197 -
705 lines
20 KiB
PHP
705 lines
20 KiB
PHP
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{$IFDEF FPC}
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{$PACKRECORDS C}
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{$ENDIF}
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{
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* Copyright (c) 2000-2005 Apple Computer, Inc. All rights reserved.
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*
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* @APPLE_LICENSE_HEADER_START@
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*
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* The contents of this file constitute Original Code as defined in and
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* are subject to the Apple Public Source License Version 1.1 (the
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* "License"). You may not use this file except in compliance with the
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* License. Please obtain a copy of the License at
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* http://www.apple.com/publicsource and read it before using this file.
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*
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* This Original Code and all software distributed under the License are
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* distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
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* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
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* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
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* License for the specific language governing rights and limitations
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* under the License.
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*
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* @APPLE_LICENSE_HEADER_END@
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}
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{
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* @OSF_COPYRIGHT@
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}
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{
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* Mach Operating System
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* Copyright (c) 1991,1990,1989 Carnegie Mellon University
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* All Rights Reserved.
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*
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* Permission to use, copy, modify and distribute this software and its
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* documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
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* ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie Mellon
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* the rights to redistribute these changes.
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}
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{
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}
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{
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* File: thread_status.h
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* Author: Avadis Tevanian, Jr.
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* Date: 1985
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*
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* This file contains the structure definitions for the thread
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* state as applied to I386 processors.
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}
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{
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* i386_thread_state this is the structure that is exported
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* to user threads for use in status/mutate
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* calls. This structure should never
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* change.
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*
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* i386_float_state exported to use threads for access to
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* floating point registers. Try not to
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* change this one, either.
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*
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}
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{ THREAD_STATE_FLAVOR_LIST 0 }
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{
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const
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i386_THREAD_STATE = 1;
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i386_FLOAT_STATE = 2;
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i386_EXCEPTION_STATE = 3;
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THREAD_STATE_NONE = 4;
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}
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{
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* Main thread state consists of
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* general registers, segment registers,
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* eip and eflags.
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}
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type
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i386_thread_state = record
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eax : cuint;
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ebx : cuint;
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ecx : cuint;
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edx : cuint;
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edi : cuint;
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esi : cuint;
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ebp : cuint;
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esp : cuint;
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ss : cuint;
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eflags : cuint;
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eip : cuint;
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cs : cuint;
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ds : cuint;
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es : cuint;
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fs : cuint;
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gs : cuint;
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end;
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i386_thread_state_t = i386_thread_state;
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type
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x86_64_thread_state = record
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rax : cuint64;
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rbx : cuint64;
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rcx : cuint64;
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rdx : cuint64;
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rdi : cuint64;
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rsi : cuint64;
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rbp : cuint64;
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rsp : cuint64;
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r8 : cuint64;
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r9 : cuint64;
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r10 : cuint64;
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r11 : cuint64;
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r12 : cuint64;
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r13 : cuint64;
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r14 : cuint64;
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r15 : cuint64;
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rip : cuint64;
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rflags : cuint64;
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cs : cuint64;
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fs : cuint64;
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gs : cuint64;
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end;
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x86_64_thread_state_t = x86_64_thread_state;
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{
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* Default segment register values.
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}
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const
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USER_CODE_SELECTOR = $0017;
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USER_DATA_SELECTOR = $001f;
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KERN_CODE_SELECTOR = $0008;
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KERN_DATA_SELECTOR = $0010;
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FP_PREC_24B = 0;
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FP_PREC_53B = 2;
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FP_PREC_64B = 3;
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FP_RND_NEAR = 0;
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FP_RND_DOWN = 1;
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FP_RND_UP = 2;
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FP_CHOP = 3;
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type
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fp_control = record
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flag0 : cushort;
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end;
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fp_control_t = fp_control;
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const
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bm_fp_control_invalid = $1;
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bp_fp_control_invalid = 0;
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bm_fp_control_denorm = $2;
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bp_fp_control_denorm = 1;
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bm_fp_control_zdiv = $4;
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bp_fp_control_zdiv = 2;
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bm_fp_control_ovrfl = $8;
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bp_fp_control_ovrfl = 3;
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bm_fp_control_undfl = $10;
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bp_fp_control_undfl = 4;
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bm_fp_control_precis = $20;
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bp_fp_control_precis = 5;
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bm_fp_control_x = $C0;
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bp_fp_control_x = 6;
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bm_fp_control_pc = $300;
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bp_fp_control_pc = 8;
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bm_fp_control_rc = $C00;
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bp_fp_control_rc = 10;
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bm_fp_control_inf = $1000;
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bp_fp_control_inf = 12;
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bm_fp_control_y = $E000;
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bp_fp_control_y = 13;
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(*
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function invalid(var a : fp_control) : word;
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procedure set_invalid(var a : fp_control; __invalid : word);
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function denorm(var a : fp_control) : word;
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procedure set_denorm(var a : fp_control; __denorm : word);
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function zdiv(var a : fp_control) : word;
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procedure set_zdiv(var a : fp_control; __zdiv : word);
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function ovrfl(var a : fp_control) : word;
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procedure set_ovrfl(var a : fp_control; __ovrfl : word);
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function undfl(var a : fp_control) : word;
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procedure set_undfl(var a : fp_control; __undfl : word);
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function precis(var a : fp_control) : word;
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procedure set_precis(var a : fp_control; __precis : word);
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function pc(var a : fp_control) : word;
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procedure set_pc(var a : fp_control; __pc : word);
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function rc(var a : fp_control) : word;
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procedure set_rc(var a : fp_control; __rc : word);
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function inf(var a : fp_control) : word;
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procedure set_inf(var a : fp_control; __inf : word);
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*)
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{
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* Status word.
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}
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type
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fp_status = record
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flag0 : cushort;
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end;
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fp_status_t = fp_status;
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const
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bm_fp_status_invalid = $1;
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bp_fp_status_invalid = 0;
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bm_fp_status_denorm = $2;
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bp_fp_status_denorm = 1;
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bm_fp_status_zdiv = $4;
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bp_fp_status_zdiv = 2;
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bm_fp_status_ovrfl = $8;
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bp_fp_status_ovrfl = 3;
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bm_fp_status_undfl = $10;
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bp_fp_status_undfl = 4;
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bm_fp_status_precis = $20;
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bp_fp_status_precis = 5;
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bm_fp_status_stkflt = $40;
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bp_fp_status_stkflt = 6;
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bm_fp_status_errsumm = $80;
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bp_fp_status_errsumm = 7;
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bm_fp_status_c0 = $100;
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bp_fp_status_c0 = 8;
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bm_fp_status_c1 = $200;
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bp_fp_status_c1 = 9;
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bm_fp_status_c2 = $400;
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bp_fp_status_c2 = 10;
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bm_fp_status_tos = $3800;
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bp_fp_status_tos = 11;
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bm_fp_status_c3 = $4000;
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bp_fp_status_c3 = 14;
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bm_fp_status_busy = $8000;
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bp_fp_status_busy = 15;
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{
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function invalid(var a : fp_status) : word;
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procedure set_invalid(var a : fp_status; __invalid : word);
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function denorm(var a : fp_status) : word;
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procedure set_denorm(var a : fp_status; __denorm : word);
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function zdiv(var a : fp_status) : word;
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procedure set_zdiv(var a : fp_status; __zdiv : word);
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function ovrfl(var a : fp_status) : word;
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procedure set_ovrfl(var a : fp_status; __ovrfl : word);
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function undfl(var a : fp_status) : word;
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procedure set_undfl(var a : fp_status; __undfl : word);
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function precis(var a : fp_status) : word;
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procedure set_precis(var a : fp_status; __precis : word);
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function stkflt(var a : fp_status) : word;
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procedure set_stkflt(var a : fp_status; __stkflt : word);
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function errsumm(var a : fp_status) : word;
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procedure set_errsumm(var a : fp_status; __errsumm : word);
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function c0(var a : fp_status) : word;
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procedure set_c0(var a : fp_status; __c0 : word);
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function c1(var a : fp_status) : word;
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procedure set_c1(var a : fp_status; __c1 : word);
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function c2(var a : fp_status) : word;
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procedure set_c2(var a : fp_status; __c2 : word);
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function tos(var a : fp_status) : word;
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procedure set_tos(var a : fp_status; __tos : word);
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function c3(var a : fp_status) : word;
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procedure set_c3(var a : fp_status; __c3 : word);
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function busy(var a : fp_status) : word;
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procedure set_busy(var a : fp_status; __busy : word);
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}
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{ defn of 80bit x87 FPU or MMX register }
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type
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mmst_reg = record
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mmst_reg : array[0..9] of byte;
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mmst_rsrv : array[0..5] of byte;
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end;
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{ defn of 128 bit XMM regs }
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xmm_reg = record
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xmm_reg : array[0..15] of byte;
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end;
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{
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* Floating point state.
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}
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{ number of chars worth of data from fpu_fcw }
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const
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FP_STATE_BYTES = 512;
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{ For legacy reasons we need to leave the hw_state as char bytes }
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{ x87 FPU control word }
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{ x87 FPU status word }
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{ x87 FPU tag word }
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{ reserved } { x87 FPU Opcode }
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{ x87 FPU Instruction Pointer offset }
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{ x87 FPU Instruction Pointer Selector }
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{ reserved }
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{ x87 FPU Instruction Operand(Data) Pointer offset }
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{ x87 FPU Instruction Operand(Data) Pointer Selector }
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{ reserved }
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{ MXCSR Register state }
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{ MXCSR mask }
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{ ST0/MM0 }
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{ ST1/MM1 }
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{ ST2/MM2 }
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{ ST3/MM3 }
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{ ST4/MM4 }
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{ ST5/MM5 }
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{ ST6/MM6 }
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{ ST7/MM7 }
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{ XMM 0 }
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{ XMM 1 }
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{ XMM 2 }
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{ XMM 3 }
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{ XMM 4 }
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{ XMM 5 }
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{ XMM 6 }
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{ XMM 7 }
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{ reserved }
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type
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i386_float_state = record
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fpu_reserved : array[0..1] of cint;
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fpu_fcw : fp_control_t;
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fpu_fsw : fp_status_t;
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fpu_ftw : cuint8;
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fpu_rsrv1 : cuint8;
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fpu_fop : cuint16;
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fpu_ip : cuint32;
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fpu_cs : cuint16;
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fpu_rsrv2 : cuint16;
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fpu_dp : cuint32;
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fpu_ds : cuint16;
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fpu_rsrv3 : cuint16;
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fpu_mxcsr : cuint32;
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fpu_mxcsrmask : cuint32;
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fpu_stmm0 : mmst_reg;
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fpu_stmm1 : mmst_reg;
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fpu_stmm2 : mmst_reg;
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fpu_stmm3 : mmst_reg;
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fpu_stmm4 : mmst_reg;
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fpu_stmm5 : mmst_reg;
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fpu_stmm6 : mmst_reg;
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fpu_stmm7 : mmst_reg;
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fpu_xmm0 : xmm_reg;
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fpu_xmm1 : xmm_reg;
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fpu_xmm2 : xmm_reg;
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fpu_xmm3 : xmm_reg;
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fpu_xmm4 : xmm_reg;
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fpu_xmm5 : xmm_reg;
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fpu_xmm6 : xmm_reg;
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fpu_xmm7 : xmm_reg;
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fpu_rsrv4 : array[0..(14*16)-1] of byte;
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fpu_reserved1 : cint;
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end;
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i386_float_state_t = i386_float_state;
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{
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* Extra state that may be
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* useful to exception handlers.
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}
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i386_exception_state = record
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trapno : cuint;
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err : cuint;
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faultvaddr : cuint;
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end;
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i386_exception_state_t = i386_exception_state;
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type
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x86_64_float_state = record
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fpu_reserved : array[0..1] of cint;
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fpu_fcw : fp_control_t;
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fpu_fsw : fp_status_t;
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fpu_ftw : cuint8;
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fpu_rsrv1 : cuint8;
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fpu_fop : cuint16;
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fpu_ip : cuint32;
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fpu_cs : cuint16;
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fpu_rsrv2 : cuint16;
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fpu_dp : cuint32;
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fpu_ds : cuint16;
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fpu_rsrv3 : cuint16;
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fpu_mxcsr : cuint32;
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fpu_mxcsrmask : cuint32;
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fpu_stmm0 : mmst_reg;
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fpu_stmm1 : mmst_reg;
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fpu_stmm2 : mmst_reg;
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fpu_stmm3 : mmst_reg;
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fpu_stmm4 : mmst_reg;
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fpu_stmm5 : mmst_reg;
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fpu_stmm6 : mmst_reg;
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fpu_stmm7 : mmst_reg;
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fpu_xmm0 : xmm_reg;
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fpu_xmm1 : xmm_reg;
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fpu_xmm2 : xmm_reg;
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fpu_xmm3 : xmm_reg;
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fpu_xmm4 : xmm_reg;
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fpu_xmm5 : xmm_reg;
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fpu_xmm6 : xmm_reg;
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fpu_xmm7 : xmm_reg;
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fpu_xmm8 : xmm_reg;
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fpu_xmm9 : xmm_reg;
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fpu_xmm10 : xmm_reg;
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fpu_xmm11 : xmm_reg;
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fpu_xmm12 : xmm_reg;
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fpu_xmm13 : xmm_reg;
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fpu_xmm14 : xmm_reg;
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fpu_xmm15 : xmm_reg;
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fpu_rsrv4 : array[0..(6*16)-1] of byte;
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fpu_reserved1 : cint;
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end;
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x86_64_float_state_t = x86_64_float_state;
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{
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* Extra state that may be
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* useful to exception handlers.
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}
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x86_64_exception_state = record
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trapno : cuint;
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err : cuint;
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faultvaddr : cuint64;
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end;
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x86_64_exception_state_t = x86_64_exception_state;
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(*
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function invalid(var a : fp_control) : word;
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begin
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invalid:=(a.flag0 and bm_fp_control_invalid) shr bp_fp_control_invalid;
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end;
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procedure set_invalid(var a : fp_control; __invalid : word);
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begin
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a.flag0:=a.flag0 or ((__invalid shl bp_fp_control_invalid) and bm_fp_control_invalid);
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end;
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function denorm(var a : fp_control) : word;
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begin
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denorm:=(a.flag0 and bm_fp_control_denorm) shr bp_fp_control_denorm;
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end;
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procedure set_denorm(var a : fp_control; __denorm : word);
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begin
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a.flag0:=a.flag0 or ((__denorm shl bp_fp_control_denorm) and bm_fp_control_denorm);
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end;
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function zdiv(var a : fp_control) : word;
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begin
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zdiv:=(a.flag0 and bm_fp_control_zdiv) shr bp_fp_control_zdiv;
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end;
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procedure set_zdiv(var a : fp_control; __zdiv : word);
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begin
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a.flag0:=a.flag0 or ((__zdiv shl bp_fp_control_zdiv) and bm_fp_control_zdiv);
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end;
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function ovrfl(var a : fp_control) : word;
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begin
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ovrfl:=(a.flag0 and bm_fp_control_ovrfl) shr bp_fp_control_ovrfl;
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end;
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procedure set_ovrfl(var a : fp_control; __ovrfl : word);
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begin
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a.flag0:=a.flag0 or ((__ovrfl shl bp_fp_control_ovrfl) and bm_fp_control_ovrfl);
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end;
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function undfl(var a : fp_control) : word;
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begin
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undfl:=(a.flag0 and bm_fp_control_undfl) shr bp_fp_control_undfl;
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end;
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procedure set_undfl(var a : fp_control; __undfl : word);
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begin
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a.flag0:=a.flag0 or ((__undfl shl bp_fp_control_undfl) and bm_fp_control_undfl);
|
|
end;
|
|
|
|
function precis(var a : fp_control) : word;
|
|
begin
|
|
precis:=(a.flag0 and bm_fp_control_precis) shr bp_fp_control_precis;
|
|
end;
|
|
|
|
procedure set_precis(var a : fp_control; __precis : word);
|
|
begin
|
|
a.flag0:=a.flag0 or ((__precis shl bp_fp_control_precis) and bm_fp_control_precis);
|
|
end;
|
|
|
|
function x(var a : fp_control) : word;
|
|
begin
|
|
x:=(a.flag0 and bm_fp_control_x) shr bp_fp_control_x;
|
|
end;
|
|
|
|
procedure set_x(var a : fp_control; __x : word);
|
|
begin
|
|
a.flag0:=a.flag0 or ((__x shl bp_fp_control_x) and bm_fp_control_x);
|
|
end;
|
|
|
|
function pc(var a : fp_control) : word;
|
|
begin
|
|
pc:=(a.flag0 and bm_fp_control_pc) shr bp_fp_control_pc;
|
|
end;
|
|
|
|
procedure set_pc(var a : fp_control; __pc : word);
|
|
begin
|
|
a.flag0:=a.flag0 or ((__pc shl bp_fp_control_pc) and bm_fp_control_pc);
|
|
end;
|
|
|
|
function rc(var a : fp_control) : word;
|
|
begin
|
|
rc:=(a.flag0 and bm_fp_control_rc) shr bp_fp_control_rc;
|
|
end;
|
|
|
|
procedure set_rc(var a : fp_control; __rc : word);
|
|
begin
|
|
a.flag0:=a.flag0 or ((__rc shl bp_fp_control_rc) and bm_fp_control_rc);
|
|
end;
|
|
|
|
function inf(var a : fp_control) : word;
|
|
begin
|
|
inf:=(a.flag0 and bm_fp_control_inf) shr bp_fp_control_inf;
|
|
end;
|
|
|
|
procedure set_inf(var a : fp_control; __inf : word);
|
|
begin
|
|
a.flag0:=a.flag0 or ((__inf shl bp_fp_control_inf) and bm_fp_control_inf);
|
|
end;
|
|
|
|
function y(var a : fp_control) : word;
|
|
begin
|
|
y:=(a.flag0 and bm_fp_control_y) shr bp_fp_control_y;
|
|
end;
|
|
|
|
procedure set_y(var a : fp_control; __y : word);
|
|
begin
|
|
a.flag0:=a.flag0 or ((__y shl bp_fp_control_y) and bm_fp_control_y);
|
|
end;
|
|
|
|
function invalid(var a : fp_status) : word;
|
|
begin
|
|
invalid:=(a.flag0 and bm_fp_status_invalid) shr bp_fp_status_invalid;
|
|
end;
|
|
|
|
procedure set_invalid(var a : fp_status; __invalid : word);
|
|
begin
|
|
a.flag0:=a.flag0 or ((__invalid shl bp_fp_status_invalid) and bm_fp_status_invalid);
|
|
end;
|
|
|
|
function denorm(var a : fp_status) : word;
|
|
begin
|
|
denorm:=(a.flag0 and bm_fp_status_denorm) shr bp_fp_status_denorm;
|
|
end;
|
|
|
|
procedure set_denorm(var a : fp_status; __denorm : word);
|
|
begin
|
|
a.flag0:=a.flag0 or ((__denorm shl bp_fp_status_denorm) and bm_fp_status_denorm);
|
|
end;
|
|
|
|
function zdiv(var a : fp_status) : word;
|
|
begin
|
|
zdiv:=(a.flag0 and bm_fp_status_zdiv) shr bp_fp_status_zdiv;
|
|
end;
|
|
|
|
procedure set_zdiv(var a : fp_status; __zdiv : word);
|
|
begin
|
|
a.flag0:=a.flag0 or ((__zdiv shl bp_fp_status_zdiv) and bm_fp_status_zdiv);
|
|
end;
|
|
|
|
function ovrfl(var a : fp_status) : word;
|
|
begin
|
|
ovrfl:=(a.flag0 and bm_fp_status_ovrfl) shr bp_fp_status_ovrfl;
|
|
end;
|
|
|
|
procedure set_ovrfl(var a : fp_status; __ovrfl : word);
|
|
begin
|
|
a.flag0:=a.flag0 or ((__ovrfl shl bp_fp_status_ovrfl) and bm_fp_status_ovrfl);
|
|
end;
|
|
|
|
function undfl(var a : fp_status) : word;
|
|
begin
|
|
undfl:=(a.flag0 and bm_fp_status_undfl) shr bp_fp_status_undfl;
|
|
end;
|
|
|
|
procedure set_undfl(var a : fp_status; __undfl : word);
|
|
begin
|
|
a.flag0:=a.flag0 or ((__undfl shl bp_fp_status_undfl) and bm_fp_status_undfl);
|
|
end;
|
|
|
|
function precis(var a : fp_status) : word;
|
|
begin
|
|
precis:=(a.flag0 and bm_fp_status_precis) shr bp_fp_status_precis;
|
|
end;
|
|
|
|
procedure set_precis(var a : fp_status; __precis : word);
|
|
begin
|
|
a.flag0:=a.flag0 or ((__precis shl bp_fp_status_precis) and bm_fp_status_precis);
|
|
end;
|
|
|
|
function stkflt(var a : fp_status) : word;
|
|
begin
|
|
stkflt:=(a.flag0 and bm_fp_status_stkflt) shr bp_fp_status_stkflt;
|
|
end;
|
|
|
|
procedure set_stkflt(var a : fp_status; __stkflt : word);
|
|
begin
|
|
a.flag0:=a.flag0 or ((__stkflt shl bp_fp_status_stkflt) and bm_fp_status_stkflt);
|
|
end;
|
|
|
|
function errsumm(var a : fp_status) : word;
|
|
begin
|
|
errsumm:=(a.flag0 and bm_fp_status_errsumm) shr bp_fp_status_errsumm;
|
|
end;
|
|
|
|
procedure set_errsumm(var a : fp_status; __errsumm : word);
|
|
begin
|
|
a.flag0:=a.flag0 or ((__errsumm shl bp_fp_status_errsumm) and bm_fp_status_errsumm);
|
|
end;
|
|
|
|
function c0(var a : fp_status) : word;
|
|
begin
|
|
c0:=(a.flag0 and bm_fp_status_c0) shr bp_fp_status_c0;
|
|
end;
|
|
|
|
procedure set_c0(var a : fp_status; __c0 : word);
|
|
begin
|
|
a.flag0:=a.flag0 or ((__c0 shl bp_fp_status_c0) and bm_fp_status_c0);
|
|
end;
|
|
|
|
function c1(var a : fp_status) : word;
|
|
begin
|
|
c1:=(a.flag0 and bm_fp_status_c1) shr bp_fp_status_c1;
|
|
end;
|
|
|
|
procedure set_c1(var a : fp_status; __c1 : word);
|
|
begin
|
|
a.flag0:=a.flag0 or ((__c1 shl bp_fp_status_c1) and bm_fp_status_c1);
|
|
end;
|
|
|
|
function c2(var a : fp_status) : word;
|
|
begin
|
|
c2:=(a.flag0 and bm_fp_status_c2) shr bp_fp_status_c2;
|
|
end;
|
|
|
|
procedure set_c2(var a : fp_status; __c2 : word);
|
|
begin
|
|
a.flag0:=a.flag0 or ((__c2 shl bp_fp_status_c2) and bm_fp_status_c2);
|
|
end;
|
|
|
|
function tos(var a : fp_status) : word;
|
|
begin
|
|
tos:=(a.flag0 and bm_fp_status_tos) shr bp_fp_status_tos;
|
|
end;
|
|
|
|
procedure set_tos(var a : fp_status; __tos : word);
|
|
begin
|
|
a.flag0:=a.flag0 or ((__tos shl bp_fp_status_tos) and bm_fp_status_tos);
|
|
end;
|
|
|
|
function c3(var a : fp_status) : word;
|
|
begin
|
|
c3:=(a.flag0 and bm_fp_status_c3) shr bp_fp_status_c3;
|
|
end;
|
|
|
|
procedure set_c3(var a : fp_status; __c3 : word);
|
|
begin
|
|
a.flag0:=a.flag0 or ((__c3 shl bp_fp_status_c3) and bm_fp_status_c3);
|
|
end;
|
|
|
|
function busy(var a : fp_status) : word;
|
|
begin
|
|
busy:=(a.flag0 and bm_fp_status_busy) shr bp_fp_status_busy;
|
|
end;
|
|
|
|
procedure set_busy(var a : fp_status; __busy : word);
|
|
begin
|
|
a.flag0:=a.flag0 or ((__busy shl bp_fp_status_busy) and bm_fp_status_busy);
|
|
end;
|
|
|
|
*)
|
|
|
|
{$ifdef cpu64}
|
|
mcontext_t = record
|
|
es: x86_64_exception_state_t;
|
|
ts: x86_64_thread_state_t;
|
|
fs: x86_64_float_state_t;
|
|
end;
|
|
{$else cpu64}
|
|
mcontext_t = record
|
|
es: i386_exception_state_t;
|
|
ts: i386_thread_state_t;
|
|
fs: i386_float_state_t;
|
|
end;
|
|
{$endif cpu64}
|