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516 lines
18 KiB
ObjectPascal
516 lines
18 KiB
ObjectPascal
{*****************************************************************************}
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{ File : naddcpu.pas }
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{ Author : Mazen NEIFER }
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{ Project : Free Pascal Compiler (FPC) }
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{ Creation date : 2002\07\14 }
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{ Last modification date : 2002\07\26 }
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{ Licence : GPL }
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{ Bug report : mazen.neifer.01@supaero.org }
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{*****************************************************************************}
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{
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$Id$
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Copyright (c) 2000-2002 by Florian Klaempfl
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Code generation for add nodes on the i386
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; IF not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************}
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UNIT naddcpu;
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{$INCLUDE fpcdefs.inc}
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INTERFACE
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USES
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node,nadd,cpubase,cginfo;
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TYPE
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TSparcAddNode=CLASS(TAddNode)
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PROCEDURE pass_2;OVERRIDE;
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PRIVATE
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FUNCTION GetResFlags(unsigned:Boolean):TResFlags;
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PROCEDURE left_must_be_reg(OpSize:TOpSize;NoSwap:Boolean);
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PROCEDURE emit_generic_code(op:TAsmOp;OpSize:TOpSize;unsigned,extra_not,mboverflow:Boolean);
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PROCEDURE emit_op_right_left(op:TAsmOp;OpSize:TOpsize);
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PROCEDURE set_result_location(cmpOp,unsigned:Boolean);
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END;
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IMPLEMENTATION
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USES
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globtype,systems,
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cutils,verbose,globals,
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symconst,symdef,paramgr,
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aasmbase,aasmtai,aasmcpu,defbase,htypechk,
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cgbase,pass_2,regvars,
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cpupara,
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ncon,nset,
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cga,ncgutil,tgobj,rgobj,rgcpu,cgobj,cg64f32;
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CONST
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opsize_2_cgSize:ARRAY[S_B..S_L]OF TCgSize=(OS_8,OS_16,OS_32);
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FUNCTION TSparcAddNode.GetResFlags(unsigned:Boolean):TResFlags;
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BEGIN
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CASE NodeType OF
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equaln:
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GetResFlags:=F_E;
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unequaln:
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GetResFlags:=F_NE;
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ELSE
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IF NOT(unsigned)
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THEN
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BEGIN
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IF nf_swaped IN flags
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THEN
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CASE NodeType OF
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ltn:
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GetResFlags:=F_G;
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lten:
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GetResFlags:=F_GE;
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gtn:
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GetResFlags:=F_L;
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gten:
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GetResFlags:=F_LE;
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END
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ELSE
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CASE NodeType OF
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ltn:
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GetResFlags:=F_L;
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lten:
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GetResFlags:=F_LE;
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gtn:
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GetResFlags:=F_G;
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gten:
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GetResFlags:=F_GE;
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END;
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END
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ELSE
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BEGIN
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IF nf_swaped IN Flags
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THEN
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CASE NodeType OF
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ltn:
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GetResFlags:=F_A;
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lten:
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GetResFlags:=F_AE;
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gtn:
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GetResFlags:=F_B;
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gten:
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GetResFlags:=F_BE;
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END
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ELSE
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CASE NodeType OF
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ltn:
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GetResFlags:=F_B;
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lten:
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GetResFlags:=F_BE;
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gtn:
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GetResFlags:=F_A;
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gten:
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GetResFlags:=F_AE;
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END;
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END;
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END;
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END;
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PROCEDURE TSparcAddNode.left_must_be_reg(OpSize:TOpSize;NoSwap:Boolean);
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BEGIN
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IF(left.location.loc<>LOC_REGISTER)
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THEN{left location is not a register}
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BEGIN
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IF(NOT NoSwap)AND(right.location.loc=LOC_REGISTER)
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THEN{right is register so we can swap the locations}
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BEGIN
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location_swap(left.location,right.location);
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toggleflag(nf_swaped);
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END
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ELSE
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BEGIN
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{maybe we can reuse a constant register when the operation is a comparison that
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doesn't change the value of the register}
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location_force_reg(exprasmlist,left.location,opsize_2_cgsize[opsize],(nodetype IN [ltn,lten,gtn,gten,equaln,unequaln]));
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END;
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END;
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END;
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PROCEDURE TSparcAddNode.emit_generic_code(op:TAsmOp;OpSize:TOpSize;unsigned,extra_not,mboverflow:Boolean);
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VAR
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power:LongInt;
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hl4:TAsmLabel;
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BEGIN
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{ at this point, left.location.loc should be LOC_REGISTER }
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IF right.location.loc=LOC_REGISTER
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THEN
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BEGIN
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{ right.location is a LOC_REGISTER }
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{ when swapped another result register }
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IF(nodetype=subn)AND(nf_swaped IN flags)
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THEN
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BEGIN
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IF extra_not
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THEN
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emit_reg(A_NOT,S_L,left.location.register);
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emit_reg_reg(op,opsize,left.location.register,right.location.register);
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{ newly swapped also set swapped flag }
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location_swap(left.location,right.location);
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toggleflag(nf_swaped);
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END
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ELSE
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BEGIN
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IF extra_not
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THEN
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emit_reg(A_NOT,S_L,right.location.register);
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emit_reg_reg(op,opsize,right.location.register,left.location.register);
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END;
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END
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ELSE
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BEGIN
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{ right.location is not a LOC_REGISTER }
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IF(nodetype=subn)AND(nf_swaped IN flags)
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THEN
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BEGIN
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IF extra_not
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THEN
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emit_reg(A_NOT,opsize,left.location.register);
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// rg.getexplicitregisterint(exprasmlist,R_EDI);
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// cg.a_load_loc_reg(exprasmlist,right.location,R_EDI);
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// emit_reg_reg(op,opsize,left.location.register,R_EDI);
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// emit_reg_reg(A_MOV,opsize,R_EDI,left.location.register);
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// rg.ungetregisterint(exprasmlist,R_EDI);
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END
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ELSE
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BEGIN
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{ Optimizations when right.location is a constant value }
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IF(op=A_CMP)AND(nodetype IN [equaln,unequaln])AND(right.location.loc=LOC_CONSTANT)AND(right.location.value=0)
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THEN
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BEGIN
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// emit_reg_reg(A_TEST,opsize,left.location.register,left.location.register);
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END
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ELSE IF(op=A_ADD)AND(right.location.loc=LOC_CONSTANT)AND(right.location.value=1)AND NOT(cs_check_overflow in aktlocalswitches)
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THEN
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BEGIN
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emit_reg(A_INC,opsize,left.location.register);
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END
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ELSE IF(op=A_SUB)AND(right.location.loc=LOC_CONSTANT)AND(right.location.value=1)AND NOT(cs_check_overflow in aktlocalswitches)
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THEN
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BEGIN
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emit_reg(A_DEC,opsize,left.location.register);
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END
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ELSE IF(op=A_SMUL)AND(right.location.loc=LOC_CONSTANT)AND(ispowerof2(right.location.value,power))AND NOT(cs_check_overflow in aktlocalswitches)
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THEN
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BEGIN
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emit_const_reg(A_SLL,opsize,power,left.location.register);
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END
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ELSE
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BEGIN
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IF extra_not
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THEN
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BEGIN
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// rg.getexplicitregisterint(exprasmlist,R_EDI);
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// cg.a_load_loc_reg(exprasmlist,right.location,R_EDI);
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// emit_reg(A_NOT,S_L,R_EDI);
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// emit_reg_reg(A_AND,S_L,R_EDI,left.location.register);
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// rg.ungetregisterint(exprasmlist,R_EDI);
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END
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ELSE
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BEGIN
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emit_op_right_left(op,opsize);
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END;
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END;
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END;
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END;
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{ only in case of overflow operations }
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{ produce overflow code }
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{ we must put it here directly, because sign of operation }
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{ is in unsigned VAR!! }
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IF mboverflow
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THEN
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BEGIN
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IF cs_check_overflow IN aktlocalswitches
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THEN
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BEGIN
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// getlabel(hl4);
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IF unsigned
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THEN
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emitjmp(C_NB,hl4)
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ELSE
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emitjmp(C_NO,hl4);
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cg.a_call_name(exprasmlist,'FPC_OVERFLOW');
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cg.a_label(exprasmlist,hl4);
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END;
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END;
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END;
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PROCEDURE TSparcAddNode.emit_op_right_left(op:TAsmOp;OpSize:TOpsize);
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BEGIN
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{left must be a register}
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CASE right.location.loc OF
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LOC_REGISTER,LOC_CREGISTER:
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exprasmlist.concat(taicpu.op_reg_reg(op,opsize,right.location.register,left.location.register));
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LOC_REFERENCE,LOC_CREFERENCE :
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exprasmlist.concat(taicpu.op_ref_reg(op,opsize,right.location.reference,left.location.register));
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LOC_CONSTANT:
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exprasmlist.concat(taicpu.op_const_reg(op,opsize,right.location.value,left.location.register));
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ELSE
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InternalError(200203232);
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END;
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END;
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PROCEDURE TSparcAddNode.set_result_location(cmpOp,unsigned:Boolean);
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BEGIN
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IF cmpOp
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THEN
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BEGIN
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location_reset(location,LOC_FLAGS,OS_NO);
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location.resflags:=GetResFlags(unsigned);
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END
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ELSE
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location_copy(location,left.location);
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END;
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PROCEDURE TSparcAddNode.pass_2;
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{is also being used for "xor", and "mul", "sub", or and comparative operators}
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VAR
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popeax,popedx,pushedfpu,mboverflow,cmpop:Boolean;
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op:TAsmOp;
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power:LongInt;
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OpSize:TOpSize;
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unsigned:Boolean;{true, if unsigned types are compared}
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{ is_in_dest if the result is put directly into }
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{ the resulting refernce or varregister }
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{is_in_dest : boolean;}
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{ true, if for sets subtractions the extra not should generated }
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extra_not:Boolean;
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BEGIN
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{to make it more readable, string and set (not smallset!) have their own
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procedures }
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CASE left.resulttype.def.deftype OF
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orddef:
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BEGIN
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IF is_boolean(left.resulttype.def)AND is_boolean(right.resulttype.def)
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THEN{handling boolean expressions}
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BEGIN
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InternalError(20020726);//second_addboolean;
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exit;
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END
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ELSE IF is_64bitint(left.resulttype.def)
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THEN{64bit operations}
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BEGIN
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InternalError(20020726);//second_add64bit;
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exit;
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END;
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END;
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stringdef:
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BEGIN
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InternalError(20020726);//second_addstring;
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exit;
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END;
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setdef:
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BEGIN
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{normalsets are already handled in pass1}
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IF(tsetdef(left.resulttype.def).settype<>smallset)
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THEN
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internalerror(200109041);
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InternalError(20020726);//second_addsmallset;
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exit;
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END;
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arraydef :
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BEGIN
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{$ifdef SUPPORT_MMX}
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if is_mmx_able_array(left.resulttype.def) then
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begin
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InternalError(20020726);//second_addmmx;
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exit;
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end;
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{$endif SUPPORT_MMX}
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END;
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floatdef :
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BEGIN
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InternalError(20020726);//second_addfloat;
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exit;
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END;
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END;
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{defaults}
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{is_in_dest:=false;}
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extra_not:=false;
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mboverflow:=false;
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cmpop:=false;
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unsigned:=not(is_signed(left.resulttype.def))or not(is_signed(right.resulttype.def));
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opsize:=def_opsize(left.resulttype.def);
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//pass_left_and_right(pushedfpu);
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IF(left.resulttype.def.deftype=pointerdef)OR
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(right.resulttype.def.deftype=pointerdef) or
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(is_class_or_interface(right.resulttype.def) and is_class_or_interface(left.resulttype.def)) or
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(left.resulttype.def.deftype=classrefdef) or
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(left.resulttype.def.deftype=procvardef) or
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((left.resulttype.def.deftype=enumdef)and(left.resulttype.def.size=4)) or
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((left.resulttype.def.deftype=orddef)and(torddef(left.resulttype.def).typ in [s32bit,u32bit])) or
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((right.resulttype.def.deftype=orddef)and(torddef(right.resulttype.def).typ in [s32bit,u32bit]))
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THEN
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BEGIN
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CASE NodeType OF
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addn:
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BEGIN
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op:=A_ADD;
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mboverflow:=true;
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END;
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muln:
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BEGIN
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IF unsigned
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THEN
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op:=A_UMUL
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ELSE
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op:=A_SMUL;
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mboverflow:=true;
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END;
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subn:
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BEGIN
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op:=A_SUB;
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mboverflow:=true;
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END;
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ltn,lten,
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gtn,gten,
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equaln,unequaln:
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BEGIN
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op:=A_CMP;
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cmpop:=true;
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END;
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xorn:
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op:=A_XOR;
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orn:
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op:=A_OR;
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andn:
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op:=A_AND;
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ELSE
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CGMessage(type_e_mismatch);
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END;
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{ filter MUL, which requires special handling }
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IF op=A_UMUL
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THEN
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BEGIN
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popeax:=false;
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popedx:=false;
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{ here you need to free the symbol first }
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{ left.location and right.location must }
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{ only be freed when they are really released, }
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{ because the optimizer NEEDS correct regalloc }
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{ info!!! (JM) }
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{ the location.register will be filled in later (JM) }
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location_reset(location,LOC_REGISTER,OS_INT);
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{$IfNDef NoShlMul}
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IF right.nodetype=ordconstn
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THEN
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swapleftright;
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IF(left.nodetype=ordconstn)and
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ispowerof2(tordconstnode(left).value, power)and
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not(cs_check_overflow in aktlocalswitches)
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THEN
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BEGIN
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{ This release will be moved after the next }
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{ instruction by the optimizer. No need to }
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{ release left.location, since it's a }
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{ constant (JM) }
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location_release(exprasmlist,right.location);
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location.register:=rg.getregisterint(exprasmlist);
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cg.a_load_loc_reg(exprasmlist,right.location,location.register);
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cg.a_op_const_reg(exprasmlist,OP_SHL,power,location.register);
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END
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ELSE
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BEGIN
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{$EndIf NoShlMul}
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{In SPARC there is no push/pop mechanism. There is a windowing mechanism using
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SAVE and RESTORE instructions.}
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//regstopush:=all_registers;
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//remove_non_regvars_from_loc(right.location,regstopush);
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//remove_non_regvars_from_loc(left.location,regstopush);
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{left.location can be R_EAX !!!}
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// rg.GetExplicitRegisterInt(exprasmlist,R_EDI);
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{load the left value}
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// cg.a_load_loc_reg(exprasmlist,left.location,R_EDI);
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// location_release(exprasmlist,left.location);
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{ allocate EAX }
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// if R_EAX in rg.unusedregsint then
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// exprasmList.concat(tai_regalloc.Alloc(R_EAX));
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{ load he right value }
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// cg.a_load_loc_reg(exprasmlist,right.location,R_EAX);
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// location_release(exprasmlist,right.location);
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{ allocate EAX if it isn't yet allocated (JM) }
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// if (R_EAX in rg.unusedregsint) then
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// exprasmList.concat(tai_regalloc.Alloc(R_EAX));
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{ also allocate EDX, since it is also modified by }
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{ a mul (JM) }
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{ if R_EDX in rg.unusedregsint then
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exprasmList.concat(tai_regalloc.Alloc(R_EDX));
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emit_reg(A_MUL,S_L,R_EDI);
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rg.ungetregisterint(exprasmlist,R_EDI);
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if R_EDX in rg.unusedregsint then
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exprasmList.concat(tai_regalloc.DeAlloc(R_EDX));
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if R_EAX in rg.unusedregsint then
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exprasmList.concat(tai_regalloc.DeAlloc(R_EAX));
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location.register:=rg.getregisterint(exprasmlist);
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emit_reg_reg(A_MOV,S_L,R_EAX,location.register);
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if popedx then
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emit_reg(A_POP,S_L,R_EDX);
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if popeax then
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emit_reg(A_POP,S_L,R_EAX);}
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{$IfNDef NoShlMul}
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End;
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{$endif NoShlMul}
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location_freetemp(exprasmlist,left.location);
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location_freetemp(exprasmlist,right.location);
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exit;
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end;
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{ Convert flags to register first }
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if (left.location.loc=LOC_FLAGS) then
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location_force_reg(exprasmlist,left.location,opsize_2_cgsize[opsize],false);
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if (right.location.loc=LOC_FLAGS) then
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location_force_reg(exprasmlist,right.location,opsize_2_cgsize[opsize],false);
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left_must_be_reg(OpSize,false);
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emit_generic_code(op,opsize,unsigned,extra_not,mboverflow);
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location_freetemp(exprasmlist,right.location);
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location_release(exprasmlist,right.location);
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if cmpop and
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(left.location.loc<>LOC_CREGISTER) then
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begin
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location_freetemp(exprasmlist,left.location);
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location_release(exprasmlist,left.location);
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end;
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set_result_location(cmpop,unsigned);
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end
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|
{ 8/16 bit enum,char,wchar types }
|
|
{ else
|
|
if ((left.resulttype.def.deftype=orddef) and
|
|
(torddef(left.resulttype.def).typ in [uchar,uwidechar])) or
|
|
((left.resulttype.def.deftype=enumdef) and
|
|
((left.resulttype.def.size=1) or
|
|
(left.resulttype.def.size=2))) then
|
|
begin
|
|
case nodetype of
|
|
ltn,lten,gtn,gten,
|
|
equaln,unequaln :
|
|
cmpop:=true;
|
|
else
|
|
CGMessage(type_e_mismatch);
|
|
end;
|
|
left_must_be_reg(opsize,false);
|
|
emit_op_right_left(A_CMP,opsize);
|
|
location_freetemp(exprasmlist,right.location);
|
|
location_release(exprasmlist,right.location);
|
|
if left.location.loc<>LOC_CREGISTER then
|
|
begin
|
|
location_freetemp(exprasmlist,left.location);
|
|
location_release(exprasmlist,left.location);
|
|
end;
|
|
set_result_location(true,true);
|
|
end
|
|
else
|
|
CGMessage(type_e_mismatch);}
|
|
end;
|
|
BEGIN
|
|
cAddNode:=TSparcAddNode;
|
|
END.
|